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a67da96bee
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broker.json: Adapt to 9M
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2023-09-16 12:56:41 +02:00 |
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ca55ade211
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Merge branch 'fpga_easy_recover' into 'main'
Recent updates
See merge request jungfraujoch/nextgendcu!6
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2023-09-15 12:35:36 +02:00 |
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90cd9602e2
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Update slsDetectorPackage to 7.0.2
Signed-off-by: Filip Leonarski <filip.leonarski@psi.ch>
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2023-09-15 12:21:31 +02:00 |
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16bbf54f2a
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Remove open source license (for now)
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2023-09-15 10:47:21 +02:00 |
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46c1cebab5
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Merge branch 'fpga_frame_generator' into 'fpga_easy_recover'
FPGA: Replace internal_packet_generator with frame_generator
See merge request jungfraujoch/nextgendcu!5
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2023-09-15 09:53:34 +02:00 |
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362eb62d4b
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FPGA: Use own function to merge streams instead of AXI-Switch + more FIFO status saved
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2023-09-14 23:58:17 +02:00 |
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7a026b89d0
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FPGAIntegrationTest: Use blocking mode for one remaining test
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2023-09-14 23:48:02 +02:00 |
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0a152f7b5a
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PCIe driver: check Ethernet aligned twice
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2023-09-14 23:43:01 +02:00 |
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aee9d0e6fc
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jfjoch_action_test: Set IPv4 and MAC addresses
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2023-09-14 17:54:33 +02:00 |
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ab1a8fbfca
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PCIExpressDevice: Get MAC/IPv4 Address for internal packet generator via ioctl
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2023-09-14 17:48:30 +02:00 |
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48ee2ca305
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FPGAAcquisitionDevice: Fix reporting of FIFO status
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2023-09-14 16:31:24 +02:00 |
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886a84ee9f
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PCIExpressDevice: Wrong function parameter
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2023-09-14 16:16:30 +02:00 |
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5d8a85071e
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PCIe driver: Fix missing return value in a function
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2023-09-14 15:56:52 +02:00 |
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aa263a329e
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Make test more repeatable by removing non-blocking mode in HLS simulation
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2023-09-13 21:51:40 +02:00 |
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0b95456d3d
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Adapt PCIe driver and tests for the new frame generator
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2023-09-13 21:44:20 +02:00 |
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f3e85deb31
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FPGA: Increase PCIe BAR size to 16 MB
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2023-09-13 20:55:10 +02:00 |
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0c471b3760
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FPGA: Some clean-up of frame generator
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2023-09-13 20:53:55 +02:00 |
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496d016c31
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FPGA: Replace internal_packet_generator with frame_generator (generating UDP packets, instead of internal JFJoch packets)
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2023-09-13 20:06:09 +02:00 |
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95d20085dd
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FPGA: Use volatile variable for counter
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2023-09-13 10:35:02 +02:00 |
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33a15e87df
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PCIe driver: minor fixes
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2023-09-13 08:00:55 +02:00 |
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0b4320c381
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PCIe driver: enable DMA
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2023-09-13 07:58:20 +02:00 |
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56993d3597
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FPGA: minor clean-up of network routines
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2023-09-12 21:35:37 +02:00 |
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b7239331ac
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FPGA: remove script from OC-Accel
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2023-09-12 21:10:15 +02:00 |
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5e137a514a
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FPGA: add more FIFOs to monitoring
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2023-09-12 20:35:48 +02:00 |
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8626195091
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FPGA: fix to deadlock
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2023-09-12 20:09:11 +02:00 |
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9d01630cfc
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FPGA: load calibration works as dedicated function of the card
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2023-09-12 14:34:42 +02:00 |
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7a635f1ee8
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FPGA: load_calibration clean-up + simplification
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2023-09-12 09:16:45 +02:00 |
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2b29381f87
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FPGA: update in timer code
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2023-09-12 08:16:44 +02:00 |
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8c3a25a8ad
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FPGA: load calibration operates directly on HBM
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2023-09-11 21:47:29 +02:00 |
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f98b5fe389
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FPGA: use only two HBM channels to write calibration in JF conversion
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2023-09-11 20:30:46 +02:00 |
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05000bab1f
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FPGA: remove transfer to HBM for the time being
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2023-09-11 20:24:20 +02:00 |
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0c524f9a3c
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FPGA: Add module to load images from HBM
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2023-09-11 12:42:38 +02:00 |
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253b409d38
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FPGA: Mark last completion saved to HBM
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2023-09-11 12:20:07 +02:00 |
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309dabd32b
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FPGA: Use dedicated struct for address exchange
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2023-09-11 11:19:05 +02:00 |
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9ff8e039d7
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FPGA: use HBM channels 12 and 13 for save_to_hbm
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2023-09-11 10:50:30 +02:00 |
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6cd8d768ea
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FPGA: save_to_hbm uses dedicated data structure for completion
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2023-09-11 10:50:15 +02:00 |
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ae7ccfdcec
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FPGA: Fix to save_to_hbm test
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2023-09-10 21:37:20 +02:00 |
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36444f4c8f
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FPGA: Use different memory controllers for save to HBM
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2023-09-10 20:19:15 +02:00 |
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48861aafcb
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FPGAAcquisitionDevice: Report HBM size
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2023-09-10 16:38:25 +02:00 |
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6e299c5a15
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FPGA: Save to HBM uses fixed sizes of HBM to calculate offset in memory
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2023-09-10 10:11:59 +02:00 |
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175aefc4b8
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FPGA: Save to HBM uses only 2 channels
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2023-09-10 09:54:32 +02:00 |
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929f6c6544
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FPGA: Handle HBM offsets internally in Jungfraujoch logic
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2023-09-09 20:50:41 +02:00 |
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d4bcfb9f9e
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hls_burst_maxi.h: Allow for multiple operations on the same channel
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2023-09-09 18:41:05 +02:00 |
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aca1bbda0e
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HLSSimulatedDevice: moving towards continuous HBM representation
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2023-09-09 13:10:06 +02:00 |
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6251c58f32
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FPGA: Add function to transfer data from HBM to AXI-Lite accessible buffer
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2023-09-08 19:08:37 +02:00 |
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e8c0500ea8
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FPGA: Use HBM switch to access full HBM
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2023-09-08 17:09:33 +02:00 |
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c2eaee6d8a
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FPGA: Save to HBM operates in parallel to host writer
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2023-09-08 13:07:49 +02:00 |
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5d566aeb4b
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FPGAIntegrationTest: Added blocking mode to one more test
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2023-09-07 22:15:21 +02:00 |
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38df621cf6
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FPGA: Add save to HBM (work in progress)
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2023-09-07 22:15:20 +02:00 |
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347bfd3f2c
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HLSSimulateDevice: Remove reference to UltraRAM
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2023-09-07 21:39:14 +02:00 |
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