FPGA: Mark last completion saved to HBM
This commit is contained in:
@@ -82,6 +82,7 @@ struct axis_completion {
|
||||
ap_uint<16> packet_count;
|
||||
ap_uint<5> module;
|
||||
ap_uint<1> flushing;
|
||||
ap_uint<1> last;
|
||||
};
|
||||
|
||||
void setup_datamover (hls::stream<axis_datamover_ctrl> &datamover_cmd_stream, uint64_t address, size_t bytes_to_write);
|
||||
|
||||
@@ -34,6 +34,7 @@ inline void write_completion(hls::stream<axis_completion> &m_axis_completion,
|
||||
cmpl.exptime = exptime;
|
||||
cmpl.data_collection_id = data_collection_id;
|
||||
cmpl.flushing = flushing;
|
||||
cmpl.last = 0;
|
||||
}
|
||||
|
||||
void save_to_hbm(STREAM_512 &data_in,
|
||||
@@ -198,6 +199,12 @@ void save_to_hbm(STREAM_512 &data_in,
|
||||
debug[m], timestamp[m], jf_bunchid[m],
|
||||
exptime[m], data_collection_id, 1);
|
||||
}
|
||||
|
||||
data_in >> packet_in;
|
||||
|
||||
axis_completion cmpl;
|
||||
cmpl.last = 1;
|
||||
completion_out << cmpl;
|
||||
|
||||
idle = 1;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user