Commit Graph

219 Commits

Author SHA1 Message Date
79aef71ce3 FPGA: spot_finder added 2023-09-26 18:54:31 +02:00
84bf69b8a6 FPGA: frame generator reads from HBM (work in progress) 2023-09-26 13:14:43 +02:00
0f7c14c267 FPGA: integration calculates sum^2 2023-09-25 22:23:06 +02:00
7e3b9cfeba Revert "FPGA: add spot finder to the design"
This reverts commit df0b0d8b96.
2023-09-25 21:52:55 +02:00
4028a59c4a PCIe driver: add option to read/write register 2023-09-24 22:58:16 +02:00
df0b0d8b96 FPGA: add spot finder to the design 2023-09-24 19:04:58 +02:00
f4f4b50be7 FPGA: frame_generator has 8 module specific frames 2023-09-24 15:43:04 +02:00
a70e3cf444 FPGA: integration & jf_conversion use hbm_size_bytes as external signal - hbm_size_bytes is constant, so to allow constant propagation in synthesis 2023-09-22 21:49:41 +02:00
5cf0d30603 AcquisitionDevice: Enable access to integration results 2023-09-22 20:32:13 +02:00
f06e92fd1b FPGA: load_calibration allows to upload integration map 2023-09-22 18:28:35 +02:00
2c9d623265 integration: use separate FIFO for integration results 2023-09-22 17:49:14 +02:00
2eb85496f2 FPGA: add integration routine (work in progress) 2023-09-21 17:12:01 +02:00
ffa3a2cdac FPGAAcquisitionDevice: Put warning for wrong data collection ID 2023-09-20 16:52:59 +02:00
8c1bc9d89d FPGA: Remove non-blocking mode 2023-09-20 16:41:14 +02:00
88e837a33a FPGAAcquisitionDevice: Remove non-blocking mode 2023-09-20 16:29:50 +02:00
809d655382 jfjoch_action_test: Add option for raw data (-R) + modules are total, not per stream 2023-09-19 13:18:31 +02:00
8e0edab0ee AcquisitionDevice: Count completed descriptors 2023-09-19 12:53:59 +02:00
86123eb2fe FPGA: Use datamover for save_to_hbm and load_from_hbm 2023-09-19 07:36:56 +02:00
98877e5bb3 FPGA: Monitor HBM completion and handle FIFOs 2023-09-19 07:36:56 +02:00
a94bdacea9 Revert "FPGA: use 4 HBM interfaces for load and save to HBM"
This reverts commit 28a29ea3183a35d8ba0dda0628ac727f8bfe4f17.
2023-09-19 07:36:56 +02:00
1fe5c474ee FPGA: use 4 HBM interfaces for load and save to HBM 2023-09-19 07:36:56 +02:00
2982097b8c FPGA: Use HBM as intermediary cache for images 2023-09-19 07:36:56 +02:00
16bbf54f2a Remove open source license (for now) 2023-09-15 10:47:21 +02:00
362eb62d4b FPGA: Use own function to merge streams instead of AXI-Switch + more FIFO status saved 2023-09-14 23:58:17 +02:00
aee9d0e6fc jfjoch_action_test: Set IPv4 and MAC addresses 2023-09-14 17:54:33 +02:00
ab1a8fbfca PCIExpressDevice: Get MAC/IPv4 Address for internal packet generator via ioctl 2023-09-14 17:48:30 +02:00
48ee2ca305 FPGAAcquisitionDevice: Fix reporting of FIFO status 2023-09-14 16:31:24 +02:00
886a84ee9f PCIExpressDevice: Wrong function parameter 2023-09-14 16:16:30 +02:00
0b95456d3d Adapt PCIe driver and tests for the new frame generator 2023-09-13 21:44:20 +02:00
496d016c31 FPGA: Replace internal_packet_generator with frame_generator (generating UDP packets, instead of internal JFJoch packets) 2023-09-13 20:06:09 +02:00
5e137a514a FPGA: add more FIFOs to monitoring 2023-09-12 20:35:48 +02:00
9d01630cfc FPGA: load calibration works as dedicated function of the card 2023-09-12 14:34:42 +02:00
7a635f1ee8 FPGA: load_calibration clean-up + simplification 2023-09-12 09:16:45 +02:00
8c3a25a8ad FPGA: load calibration operates directly on HBM 2023-09-11 21:47:29 +02:00
05000bab1f FPGA: remove transfer to HBM for the time being 2023-09-11 20:24:20 +02:00
309dabd32b FPGA: Use dedicated struct for address exchange 2023-09-11 11:19:05 +02:00
6cd8d768ea FPGA: save_to_hbm uses dedicated data structure for completion 2023-09-11 10:50:15 +02:00
48861aafcb FPGAAcquisitionDevice: Report HBM size 2023-09-10 16:38:25 +02:00
175aefc4b8 FPGA: Save to HBM uses only 2 channels 2023-09-10 09:54:32 +02:00
929f6c6544 FPGA: Handle HBM offsets internally in Jungfraujoch logic 2023-09-09 20:50:41 +02:00
aca1bbda0e HLSSimulatedDevice: moving towards continuous HBM representation 2023-09-09 13:10:06 +02:00
6251c58f32 FPGA: Add function to transfer data from HBM to AXI-Lite accessible buffer 2023-09-08 19:08:37 +02:00
c2eaee6d8a FPGA: Save to HBM operates in parallel to host writer 2023-09-08 13:07:49 +02:00
38df621cf6 FPGA: Add save to HBM (work in progress) 2023-09-07 22:15:20 +02:00
347bfd3f2c HLSSimulateDevice: Remove reference to UltraRAM 2023-09-07 21:39:14 +02:00
3aeb3e09ee FPGA: Do not load internal packet generator frame via DMA 2023-09-06 11:57:16 +02:00
7904a03e4b PCIe driver: add functions to load/save internal packet generator memory 2023-09-06 09:30:27 +02:00
caf950f99f FPGA: Internal packet generator uses external memory to store image, and this memory is accessible via PCIe BAR 2023-09-06 08:19:03 +02:00
ac5052073e JFJochReceiver: Option for local conversion 2023-08-05 15:23:45 +02:00
184d136158 JFJochReceiver: Prepare to have fixed_point_conversion locally 2023-08-04 21:41:07 +02:00