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FPGA: spot_finder added

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This commit is contained in:
leonarski_f
2023-09-26 18:54:31 +02:00
parent 84bf69b8a6
commit 79aef71ce3
9 changed files with 104 additions and 28 deletions
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2
common/Definitions.h
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@@ -49,7 +49,7 @@
// For FPGA
#define ACTION_TYPE 0x52324158
#define RELEASE_LEVEL 0x0040
#define RELEASE_LEVEL 0x0041
#define MODE_CONV 0x0001L

5
fpga/hls/CMakeLists.txt
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@@ -18,7 +18,8 @@ ADD_LIBRARY( HLSSimulation STATIC
load_from_hbm.cpp
integration.cpp
mask_missing.cpp
spot_finder.cpp)
spot_finder.cpp
axis_broadcast.cpp)
TARGET_INCLUDE_DIRECTORIES(HLSSimulation PUBLIC ../include)
TARGET_LINK_LIBRARIES(HLSSimulation CommonFunctions)
@@ -56,6 +57,7 @@ MAKE_HLS_MODULE(save_to_hbm.cpp save_to_hbm)
MAKE_HLS_MODULE(mask_missing.cpp mask_missing)
MAKE_HLS_MODULE(integration.cpp integration)
MAKE_HLS_MODULE(spot_finder.cpp spot_finder)
MAKE_HLS_MODULE(axis_broadcast.cpp axis_broadcast)
SET (HLS_IPS psi_ch_hls_data_collection_fsm_1_0.zip
psi_ch_hls_timer_host_1_0.zip
@@ -74,6 +76,7 @@ SET (HLS_IPS psi_ch_hls_data_collection_fsm_1_0.zip
psi_ch_hls_frame_generator_1_0.zip
psi_ch_hls_spot_finder_1_0.zip
psi_ch_hls_integration_1_0.zip
psi_ch_hls_axis_broadcast_1_0.zip
psi_ch_hls_stream_merge_1_0.zip)
SET (HLS_IPS ${HLS_IPS} PARENT_SCOPE)

26
fpga/hls/axis_broadcast.cpp Normal file
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@@ -0,0 +1,26 @@
// Copyright (2019-2023) Paul Scherrer Institute
#include "hls_jfjoch.h"
void axis_broadcast(STREAM_512 &data_in,
STREAM_512 &data_out_0,
STREAM_512 &data_out_1) {
#pragma HLS INTERFACE ap_ctrl_none port=return
#pragma HLS INTERFACE axis register both port=data_in
#pragma HLS INTERFACE axis register both port=data_out_0
#pragma HLS INTERFACE axis register both port=data_out_1
packet_512_t packet;
data_in >> packet;
data_out_0 << packet;
data_out_1 << packet;
data_in >> packet;
while (!packet.user) {
#pragma HLS PIPELINE II=1
data_out_0 << packet;
data_out_1 << packet;
data_in >> packet;
}
data_out_0 << packet;
data_out_1 << packet;
}

6
fpga/hls/hls_jfjoch.h
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@@ -135,6 +135,7 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out,
void host_writer(STREAM_512 &data_in,
hls::stream<ap_uint<192>> &integration_in,
hls::stream<ap_uint<512>> &spot_finder_in,
hls::stream<axis_completion > &s_axis_completion,
hls::stream<ap_axiu<512,1,1,1> > &host_memory_out,
hls::stream<axis_datamover_ctrl> &datamover_out_cmd,
@@ -189,9 +190,12 @@ void integration(STREAM_512 &data_in,
ap_uint<32> hbm_size_bytes);
void spot_finder(STREAM_512 &data_in,
STREAM_512 &data_out,
hls::stream<ap_uint<512>> &result_out);
void axis_broadcast(STREAM_512 &data_in,
STREAM_512 &data_out_0,
STREAM_512 &data_out_1);
template<int N> ap_uint<N*32> pack32(ap_int<N> in[32]) {
#pragma HLS INLINE
ap_uint<N*32> out;

12
fpga/hls/host_writer.cpp
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@@ -75,6 +75,7 @@ inline ap_uint<1> read_request(hls::stream<ap_uint<32> > &s_axis_work_request,
void host_writer(STREAM_512 &data_in,
hls::stream<ap_uint<192>> &integration_in,
hls::stream<ap_uint<512>> &spot_finder_in,
hls::stream<axis_completion > &s_axis_completion,
hls::stream<ap_axiu<512,1,1,1> > &host_memory_out,
hls::stream<axis_datamover_ctrl> &datamover_out_cmd,
@@ -86,6 +87,7 @@ void host_writer(STREAM_512 &data_in,
#pragma HLS INTERFACE ap_ctrl_none port=return
#pragma HLS INTERFACE register both axis port=data_in
#pragma HLS INTERFACE register both axis port=integration_in
#pragma HLS INTERFACE register both axis port=spot_finder_in
#pragma HLS INTERFACE register both axis port=s_axis_completion
#pragma HLS INTERFACE register both axis port=host_memory_out
#pragma HLS INTERFACE register both axis port=datamover_out_cmd
@@ -124,8 +126,8 @@ void host_writer(STREAM_512 &data_in,
s_axis_completion >> cmpl;
while (!cmpl.last) {
read_request(s_axis_work_request, req_handle, req_host_offset);
setup_datamover(datamover_out_cmd, req_host_offset, RAW_MODULE_SIZE * sizeof(uint16_t)
+ (FPGA_INTEGRATION_BIN_COUNT)*64);
setup_datamover(datamover_out_cmd, req_host_offset,
RAW_MODULE_SIZE * sizeof(uint16_t) * (16 + 1) / 16 + (FPGA_INTEGRATION_BIN_COUNT)*64);
packet_512_t packet_out;
packet_out.strb = UINT64_MAX;
@@ -142,6 +144,12 @@ void host_writer(STREAM_512 &data_in,
host_memory_out << packet_out;
}
for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / (64 * 16); i++) {
#pragma HLS PIPELINE II=1
spot_finder_in >> packet_out.data;
host_memory_out << packet_out;
}
for (int i = 0; i < FPGA_INTEGRATION_BIN_COUNT; i++) {
#pragma HLS PIPELINE II=1
ap_uint<192> tmp;

5
fpga/hls/spot_finder.cpp
View File

@@ -3,16 +3,13 @@
#include "hls_jfjoch.h"
void spot_finder(STREAM_512 &data_in,
STREAM_512 &data_out,
hls::stream<ap_uint<512>> &result_out) {
#pragma HLS INTERFACE ap_ctrl_none port=return
#pragma HLS INTERFACE register both axis port=data_in
#pragma HLS INTERFACE register both axis port=data_out
#pragma HLS INTERFACE register both axis port=result_out
packet_512_t packet;
data_in >> packet;
data_out << packet;
ap_int<16> threshold = ACT_REG_SPOT_FINDER_THRESHOLD(packet.data);
ap_uint<32> result[RAW_MODULE_SIZE * sizeof(uint16_t) / 64];
@@ -23,7 +20,6 @@ void spot_finder(STREAM_512 &data_in,
while (!packet.user) {
for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / 64; i++) {
#pragma HLS PIPELINE II=1
data_out << packet;
unpack32(packet.data, val);
ap_uint<32> output;
@@ -41,5 +37,4 @@ void spot_finder(STREAM_512 &data_in,
result_out << output;
}
}
data_out << packet;
}

53
fpga/scripts/jfjoch.tcl
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@@ -166,6 +166,9 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
CONFIG.HAS_AFULL {1} \
] $axis_addr_fifo_1
# Create instance: axis_broadcast_0, and set properties
set axis_broadcast_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:axis_broadcast:1.0 axis_broadcast_0 ]
# Create instance: axis_compl_fifo_0, and set properties
set axis_compl_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_compl_fifo_0 ]
set_property -dict [ list \
@@ -230,9 +233,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
# Create instance: axis_data_fifo_5, and set properties
set axis_data_fifo_5 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_5 ]
set_property -dict [ list \
CONFIG.FIFO_DEPTH {256} \
] $axis_data_fifo_5
# Create instance: axis_data_fifo_6, and set properties
set axis_data_fifo_6 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_6 ]
@@ -242,12 +242,28 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
# Create instance: axis_data_fifo_7, and set properties
set axis_data_fifo_7 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_7 ]
set_property -dict [ list \
CONFIG.FIFO_DEPTH {256} \
] $axis_data_fifo_7
# Create instance: axis_data_fifo_8, and set properties
set axis_data_fifo_8 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_8 ]
set_property -dict [ list \
CONFIG.FIFO_DEPTH {32768} \
CONFIG.FIFO_MEMORY_TYPE {ultra} \
CONFIG.HAS_AEMPTY {1} \
CONFIG.HAS_AFULL {1} \
] $axis_data_fifo_7
] $axis_data_fifo_8
# Create instance: axis_data_fifo_9, and set properties
set axis_data_fifo_9 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_9 ]
# Create instance: axis_data_fifo_10, and set properties
set axis_data_fifo_10 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_10 ]
set_property -dict [ list \
CONFIG.FIFO_DEPTH {2048} \
CONFIG.FIFO_MEMORY_TYPE {ultra} \
] $axis_data_fifo_10
# Create instance: axis_data_fifo_c2h_cmd, and set properties
set axis_data_fifo_c2h_cmd [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_c2h_cmd ]
@@ -495,6 +511,9 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
# Create instance: smartconnect_2, and set properties
set smartconnect_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_2 ]
# Create instance: spot_finder_0, and set properties
set spot_finder_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:spot_finder:1.0 spot_finder_0 ]
# Create instance: stream_merge_0, and set properties
set stream_merge_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:stream_merge:1.0 stream_merge_0 ]
@@ -515,18 +534,23 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
connect_bd_intf_net -intf_net axi_datamover_1_M_AXI_S2MM [get_bd_intf_pins m_axi_d_hbm_p15] [get_bd_intf_pins axi_datamover_1/M_AXI_S2MM]
connect_bd_intf_net -intf_net axis_addr_fifo_0_M_AXIS [get_bd_intf_pins axis_addr_fifo_0/M_AXIS] [get_bd_intf_pins axis_register_slice_1/S_AXIS]
connect_bd_intf_net -intf_net axis_addr_fifo_1_M_AXIS [get_bd_intf_pins axis_addr_fifo_1/M_AXIS] [get_bd_intf_pins axis_register_slice_2/S_AXIS]
connect_bd_intf_net -intf_net axis_broadcast_0_data_out_0 [get_bd_intf_pins axis_broadcast_0/data_out_0] [get_bd_intf_pins axis_data_fifo_6/S_AXIS]
connect_bd_intf_net -intf_net axis_broadcast_0_data_out_1 [get_bd_intf_pins axis_broadcast_0/data_out_1] [get_bd_intf_pins axis_data_fifo_9/S_AXIS]
connect_bd_intf_net -intf_net axis_compl_fifo_0_M_AXIS [get_bd_intf_pins axis_compl_fifo_0/M_AXIS] [get_bd_intf_pins load_from_hbm_0/s_axis_completion]
connect_bd_intf_net -intf_net axis_compl_fifo_1_M_AXIS [get_bd_intf_pins axis_compl_fifo_1/M_AXIS] [get_bd_intf_pins mask_missing_0/s_axis_completion]
connect_bd_intf_net -intf_net axis_compl_fifo_2_M_AXIS [get_bd_intf_pins axis_compl_fifo_2/M_AXIS] [get_bd_intf_pins integration_0/s_axis_completion]
connect_bd_intf_net -intf_net axis_compl_fifo_3_M_AXIS [get_bd_intf_pins axis_compl_fifo_3/M_AXIS] [get_bd_intf_pins host_writer_0/s_axis_completion]
connect_bd_intf_net -intf_net axis_data_fifo_0_M_AXIS [get_bd_intf_pins axis_data_fifo_0/M_AXIS] [get_bd_intf_pins timer_hbm/data_in]
connect_bd_intf_net -intf_net axis_data_fifo_10_M_AXIS [get_bd_intf_pins axis_data_fifo_10/M_AXIS] [get_bd_intf_pins host_writer_0/spot_finder_in]
connect_bd_intf_net -intf_net axis_data_fifo_1_M_AXIS [get_bd_intf_pins axis_data_fifo_1/M_AXIS] [get_bd_intf_pins axis_register_slice_0/S_AXIS]
connect_bd_intf_net -intf_net axis_data_fifo_2_M_AXIS [get_bd_intf_pins axis_data_fifo_2/M_AXIS] [get_bd_intf_pins axis_register_slice_3/S_AXIS]
connect_bd_intf_net -intf_net axis_data_fifo_3_M_AXIS [get_bd_intf_pins axis_data_fifo_3/M_AXIS] [get_bd_intf_pins load_from_hbm_0/data_in]
connect_bd_intf_net -intf_net axis_data_fifo_4_M_AXIS [get_bd_intf_pins axis_data_fifo_4/M_AXIS] [get_bd_intf_pins mask_missing_0/data_in]
connect_bd_intf_net -intf_net axis_data_fifo_5_M_AXIS [get_bd_intf_pins axis_data_fifo_5/M_AXIS] [get_bd_intf_pins integration_0/data_in]
connect_bd_intf_net -intf_net axis_data_fifo_6_M_AXIS [get_bd_intf_pins axis_data_fifo_6/M_AXIS] [get_bd_intf_pins timer_host/data_in]
connect_bd_intf_net -intf_net axis_data_fifo_7_M_AXIS [get_bd_intf_pins axis_data_fifo_7/M_AXIS] [get_bd_intf_pins host_writer_0/data_in]
connect_bd_intf_net -intf_net axis_data_fifo_5_M_AXIS [get_bd_intf_pins axis_data_fifo_6/M_AXIS] [get_bd_intf_pins integration_0/data_in]
connect_bd_intf_net -intf_net axis_data_fifo_5_M_AXIS1 [get_bd_intf_pins axis_broadcast_0/data_in] [get_bd_intf_pins axis_data_fifo_5/M_AXIS]
connect_bd_intf_net -intf_net axis_data_fifo_6_M_AXIS [get_bd_intf_pins axis_data_fifo_7/M_AXIS] [get_bd_intf_pins timer_host/data_in]
connect_bd_intf_net -intf_net axis_data_fifo_7_M_AXIS [get_bd_intf_pins axis_data_fifo_8/M_AXIS] [get_bd_intf_pins host_writer_0/data_in]
connect_bd_intf_net -intf_net axis_data_fifo_8_M_AXIS [get_bd_intf_pins axis_data_fifo_9/M_AXIS] [get_bd_intf_pins spot_finder_0/data_in]
connect_bd_intf_net -intf_net axis_data_fifo_c2h_cmd_M_AXIS [get_bd_intf_pins m_axis_c2h_datamover_cmd] [get_bd_intf_pins axis_data_fifo_c2h_cmd/M_AXIS]
connect_bd_intf_net -intf_net axis_data_fifo_c2h_data_M_AXIS [get_bd_intf_pins m_axis_c2h_data] [get_bd_intf_pins axis_data_fifo_c2h_data/M_AXIS]
connect_bd_intf_net -intf_net axis_data_fifo_h2c_cmd_M_AXIS [get_bd_intf_pins m_axis_h2c_datamover_cmd] [get_bd_intf_pins axis_data_fifo_h2c_cmd/M_AXIS]
@@ -563,7 +587,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
connect_bd_intf_net -intf_net host_writer_0_datamover_out_cmd [get_bd_intf_pins axis_data_fifo_c2h_cmd/S_AXIS] [get_bd_intf_pins host_writer_0/datamover_out_cmd]
connect_bd_intf_net -intf_net host_writer_0_host_memory_out [get_bd_intf_pins axis_register_slice_host_mem/S_AXIS] [get_bd_intf_pins host_writer_0/host_memory_out]
connect_bd_intf_net -intf_net host_writer_0_m_axis_completion [get_bd_intf_pins axis_work_completion_fifo_0/S_AXIS] [get_bd_intf_pins host_writer_0/m_axis_completion]
connect_bd_intf_net -intf_net integration_0_data_out [get_bd_intf_pins axis_data_fifo_6/S_AXIS] [get_bd_intf_pins integration_0/data_out]
connect_bd_intf_net -intf_net integration_0_data_out [get_bd_intf_pins axis_data_fifo_7/S_AXIS] [get_bd_intf_pins integration_0/data_out]
connect_bd_intf_net -intf_net integration_0_m_axi_d_hbm_p0 [get_bd_intf_pins m_axi_d_hbm_p16] [get_bd_intf_pins integration_0/m_axi_d_hbm_p0]
connect_bd_intf_net -intf_net integration_0_m_axi_d_hbm_p1 [get_bd_intf_pins m_axi_d_hbm_p17] [get_bd_intf_pins integration_0/m_axi_d_hbm_p1]
connect_bd_intf_net -intf_net integration_0_m_axis_completion [get_bd_intf_pins axis_compl_fifo_3/S_AXIS] [get_bd_intf_pins integration_0/m_axis_completion]
@@ -608,9 +632,10 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
connect_bd_intf_net -intf_net smartconnect_0_M04_AXI [get_bd_intf_pins frame_generator_0/s_axi_control] [get_bd_intf_pins smartconnect_0/M03_AXI]
connect_bd_intf_net -intf_net smartconnect_1_M00_AXI [get_bd_intf_pins m_axi_d_hbm_p0] [get_bd_intf_pins smartconnect_1/M00_AXI]
connect_bd_intf_net -intf_net smartconnect_2_M00_AXI [get_bd_intf_pins m_axi_d_hbm_p2] [get_bd_intf_pins smartconnect_2/M00_AXI]
connect_bd_intf_net -intf_net spot_finder_0_result_out [get_bd_intf_pins axis_data_fifo_10/S_AXIS] [get_bd_intf_pins spot_finder_0/result_out]
connect_bd_intf_net -intf_net stream_merge_0_output_r [get_bd_intf_pins axis_eth_in_fifo/S_AXIS] [get_bd_intf_pins stream_merge_0/output_r]
connect_bd_intf_net -intf_net timer_hbm_data_out [get_bd_intf_pins axis_data_fifo_1/S_AXIS] [get_bd_intf_pins timer_hbm/data_out]
connect_bd_intf_net -intf_net timer_host_data_out [get_bd_intf_pins axis_data_fifo_7/S_AXIS] [get_bd_intf_pins timer_host/data_out]
connect_bd_intf_net -intf_net timer_host_data_out [get_bd_intf_pins axis_data_fifo_8/S_AXIS] [get_bd_intf_pins timer_host/data_out]
# Create port connections
connect_bd_net -net action_config_0_clear_counters [get_bd_pins action_config_0/clear_counters] [get_bd_pins network_stack/clear_counters]
@@ -624,15 +649,15 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
connect_bd_net -net action_config_0_nmodules [get_bd_pins action_config_0/nmodules] [get_bd_pins data_collection_fsm_0/nmodules]
connect_bd_net -net action_config_0_nstorage_cells [get_bd_pins action_config_0/nstorage_cells] [get_bd_pins data_collection_fsm_0/nstorage_cells]
connect_bd_net -net action_config_0_one_over_energy [get_bd_pins action_config_0/one_over_energy] [get_bd_pins data_collection_fsm_0/one_over_energy]
connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_datamover_0/m_axi_mm2s_aclk] [get_bd_pins axi_datamover_0/m_axi_s2mm_aclk] [get_bd_pins axi_datamover_0/m_axis_mm2s_cmdsts_aclk] [get_bd_pins axi_datamover_0/m_axis_s2mm_cmdsts_awclk] [get_bd_pins axi_datamover_1/m_axi_mm2s_aclk] [get_bd_pins axi_datamover_1/m_axi_s2mm_aclk] [get_bd_pins axi_datamover_1/m_axis_mm2s_cmdsts_aclk] [get_bd_pins axi_datamover_1/m_axis_s2mm_cmdsts_awclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_1/s_axis_aclk] [get_bd_pins axis_compl_fifo_0/s_axis_aclk] [get_bd_pins axis_compl_fifo_1/s_axis_aclk] [get_bd_pins axis_compl_fifo_2/s_axis_aclk] [get_bd_pins axis_compl_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_5/s_axis_aclk] [get_bd_pins axis_data_fifo_6/s_axis_aclk] [get_bd_pins axis_data_fifo_7/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_datamover_cmd_fifo_0/s_axis_aclk] [get_bd_pins axis_datamover_cmd_fifo_1/s_axis_aclk] [get_bd_pins axis_datamover_cmd_fifo_2/s_axis_aclk] [get_bd_pins axis_datamover_cmd_fifo_3/s_axis_aclk] [get_bd_pins axis_datamover_fifo_0/s_axis_aclk] [get_bd_pins axis_datamover_fifo_1/s_axis_aclk] [get_bd_pins axis_datamover_fifo_2/s_axis_aclk] [get_bd_pins axis_datamover_fifo_3/s_axis_aclk] [get_bd_pins axis_eth_in_fifo/s_axis_aclk] [get_bd_pins axis_frame_generator_fifo_0/s_axis_aclk] [get_bd_pins axis_hbm_handles_fifo/s_axis_aclk] [get_bd_pins axis_integration_result_fifo/s_axis_aclk] [get_bd_pins axis_register_slice_0/aclk] [get_bd_pins axis_register_slice_1/aclk] [get_bd_pins axis_register_slice_2/aclk] [get_bd_pins axis_register_slice_3/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins frame_generator_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins integration_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins load_from_hbm_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins mask_missing_0/ap_clk] [get_bd_pins network_stack/axiclk] [get_bd_pins save_to_hbm_0/ap_clk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins smartconnect_1/aclk] [get_bd_pins smartconnect_2/aclk] [get_bd_pins stream_merge_0/ap_clk] [get_bd_pins timer_hbm/ap_clk] [get_bd_pins timer_host/ap_clk]
connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_datamover_0/m_axi_mm2s_aclk] [get_bd_pins axi_datamover_0/m_axi_s2mm_aclk] [get_bd_pins axi_datamover_0/m_axis_mm2s_cmdsts_aclk] [get_bd_pins axi_datamover_0/m_axis_s2mm_cmdsts_awclk] [get_bd_pins axi_datamover_1/m_axi_mm2s_aclk] [get_bd_pins axi_datamover_1/m_axi_s2mm_aclk] [get_bd_pins axi_datamover_1/m_axis_mm2s_cmdsts_aclk] [get_bd_pins axi_datamover_1/m_axis_s2mm_cmdsts_awclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_1/s_axis_aclk] [get_bd_pins axis_broadcast_0/ap_clk] [get_bd_pins axis_compl_fifo_0/s_axis_aclk] [get_bd_pins axis_compl_fifo_1/s_axis_aclk] [get_bd_pins axis_compl_fifo_2/s_axis_aclk] [get_bd_pins axis_compl_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_10/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_5/s_axis_aclk] [get_bd_pins axis_data_fifo_6/s_axis_aclk] [get_bd_pins axis_data_fifo_7/s_axis_aclk] [get_bd_pins axis_data_fifo_8/s_axis_aclk] [get_bd_pins axis_data_fifo_9/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_datamover_cmd_fifo_0/s_axis_aclk] [get_bd_pins axis_datamover_cmd_fifo_1/s_axis_aclk] [get_bd_pins axis_datamover_cmd_fifo_2/s_axis_aclk] [get_bd_pins axis_datamover_cmd_fifo_3/s_axis_aclk] [get_bd_pins axis_datamover_fifo_0/s_axis_aclk] [get_bd_pins axis_datamover_fifo_1/s_axis_aclk] [get_bd_pins axis_datamover_fifo_2/s_axis_aclk] [get_bd_pins axis_datamover_fifo_3/s_axis_aclk] [get_bd_pins axis_eth_in_fifo/s_axis_aclk] [get_bd_pins axis_frame_generator_fifo_0/s_axis_aclk] [get_bd_pins axis_hbm_handles_fifo/s_axis_aclk] [get_bd_pins axis_integration_result_fifo/s_axis_aclk] [get_bd_pins axis_register_slice_0/aclk] [get_bd_pins axis_register_slice_1/aclk] [get_bd_pins axis_register_slice_2/aclk] [get_bd_pins axis_register_slice_3/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins frame_generator_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins integration_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins load_from_hbm_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins mask_missing_0/ap_clk] [get_bd_pins network_stack/axiclk] [get_bd_pins save_to_hbm_0/ap_clk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins smartconnect_1/aclk] [get_bd_pins smartconnect_2/aclk] [get_bd_pins spot_finder_0/ap_clk] [get_bd_pins stream_merge_0/ap_clk] [get_bd_pins timer_hbm/ap_clk] [get_bd_pins timer_host/ap_clk]
connect_bd_net -net axis_addr_fifo_0_almost_empty [get_bd_pins action_config_0/calib_addr_fifo_empty] [get_bd_pins axis_addr_fifo_0/almost_empty]
connect_bd_net -net axis_addr_fifo_0_almost_full [get_bd_pins action_config_0/calib_addr_fifo_full] [get_bd_pins axis_addr_fifo_0/almost_full]
connect_bd_net -net axis_addr_fifo_4_almost_empty [get_bd_pins action_config_0/last_addr_fifo_empty] [get_bd_pins axis_addr_fifo_1/almost_empty]
connect_bd_net -net axis_addr_fifo_4_almost_full [get_bd_pins action_config_0/last_addr_fifo_full] [get_bd_pins axis_addr_fifo_1/almost_full]
connect_bd_net -net axis_compl_fifo_0_almost_empty [get_bd_pins action_config_0/hbm_compl_fifo_empty] [get_bd_pins axis_compl_fifo_0/almost_empty]
connect_bd_net -net axis_compl_fifo_0_almost_full [get_bd_pins action_config_0/hbm_compl_fifo_full] [get_bd_pins axis_compl_fifo_0/almost_full]
connect_bd_net -net axis_data_fifo_10_almost_empty [get_bd_pins action_config_0/last_data_fifo_empty] [get_bd_pins axis_data_fifo_7/almost_empty]
connect_bd_net -net axis_data_fifo_10_almost_full [get_bd_pins action_config_0/last_data_fifo_full] [get_bd_pins axis_data_fifo_7/almost_full]
connect_bd_net -net axis_data_fifo_10_almost_empty [get_bd_pins action_config_0/last_data_fifo_empty] [get_bd_pins axis_data_fifo_8/almost_empty]
connect_bd_net -net axis_data_fifo_10_almost_full [get_bd_pins action_config_0/last_data_fifo_full] [get_bd_pins axis_data_fifo_8/almost_full]
connect_bd_net -net axis_data_fifo_4_almost_empty [get_bd_pins action_config_0/calib_data_fifo_empty] [get_bd_pins axis_data_fifo_1/almost_empty]
connect_bd_net -net axis_data_fifo_4_almost_full [get_bd_pins action_config_0/calib_data_fifo_full] [get_bd_pins axis_data_fifo_1/almost_full]
connect_bd_net -net axis_data_fifo_c2h_cmd_almost_empty [get_bd_pins action_config_0/c2h_cmd_fifo_empty] [get_bd_pins axis_data_fifo_c2h_cmd/almost_empty]
@@ -676,8 +701,8 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
connect_bd_net -net network_stack_packets_udp [get_bd_pins action_config_0/packets_udp] [get_bd_pins network_stack/packets_udp]
connect_bd_net -net network_stack_packets_udp_ap_vld [get_bd_pins action_config_0/packets_udp_valid] [get_bd_pins network_stack/packets_udp_ap_vld]
connect_bd_net -net one_dout [get_bd_pins axi_datamover_0/m_axis_mm2s_sts_tready] [get_bd_pins axi_datamover_0/m_axis_s2mm_sts_tready] [get_bd_pins axi_datamover_1/m_axis_mm2s_sts_tready] [get_bd_pins axi_datamover_1/m_axis_s2mm_sts_tready] [get_bd_pins one/dout]
connect_bd_net -net reset_axi [get_bd_pins axi_rst_n] [get_bd_pins action_config_0/resetn] [get_bd_pins axis_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_addr_fifo_1/s_axis_aresetn] [get_bd_pins axis_compl_fifo_0/s_axis_aresetn] [get_bd_pins axis_compl_fifo_1/s_axis_aresetn] [get_bd_pins axis_compl_fifo_2/s_axis_aresetn] [get_bd_pins axis_compl_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins axis_data_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_5/s_axis_aresetn] [get_bd_pins axis_data_fifo_6/s_axis_aresetn] [get_bd_pins axis_data_fifo_7/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aresetn] [get_bd_pins axis_datamover_cmd_fifo_0/s_axis_aresetn] [get_bd_pins axis_datamover_cmd_fifo_1/s_axis_aresetn] [get_bd_pins axis_datamover_cmd_fifo_2/s_axis_aresetn] [get_bd_pins axis_datamover_cmd_fifo_3/s_axis_aresetn] [get_bd_pins axis_datamover_fifo_0/s_axis_aresetn] [get_bd_pins axis_datamover_fifo_1/s_axis_aresetn] [get_bd_pins axis_datamover_fifo_2/s_axis_aresetn] [get_bd_pins axis_datamover_fifo_3/s_axis_aresetn] [get_bd_pins axis_eth_in_fifo/s_axis_aresetn] [get_bd_pins axis_frame_generator_fifo_0/s_axis_aresetn] [get_bd_pins axis_hbm_handles_fifo/s_axis_aresetn] [get_bd_pins axis_integration_result_fifo/s_axis_aresetn] [get_bd_pins axis_register_slice_0/aresetn] [get_bd_pins axis_register_slice_1/aresetn] [get_bd_pins axis_register_slice_2/aresetn] [get_bd_pins axis_register_slice_3/aresetn] [get_bd_pins axis_register_slice_data_in_0/aresetn] [get_bd_pins axis_register_slice_host_mem/aresetn] [get_bd_pins axis_register_slice_udp/aresetn] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_udp_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_completion_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_request_fifo_0/s_axis_aresetn] [get_bd_pins network_stack/resetn] [get_bd_pins smartconnect_0/aresetn] [get_bd_pins smartconnect_1/aresetn] [get_bd_pins smartconnect_2/aresetn]
connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins axi_datamover_0/m_axi_mm2s_aresetn] [get_bd_pins axi_datamover_0/m_axi_s2mm_aresetn] [get_bd_pins axi_datamover_0/m_axis_mm2s_cmdsts_aresetn] [get_bd_pins axi_datamover_0/m_axis_s2mm_cmdsts_aresetn] [get_bd_pins axi_datamover_1/m_axi_mm2s_aresetn] [get_bd_pins axi_datamover_1/m_axi_s2mm_aresetn] [get_bd_pins axi_datamover_1/m_axis_mm2s_cmdsts_aresetn] [get_bd_pins axi_datamover_1/m_axis_s2mm_cmdsts_aresetn] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins frame_generator_0/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins integration_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins load_from_hbm_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins mask_missing_0/ap_rst_n] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins save_to_hbm_0/ap_rst_n] [get_bd_pins stream_merge_0/ap_rst_n] [get_bd_pins timer_hbm/ap_rst_n] [get_bd_pins timer_host/ap_rst_n]
connect_bd_net -net reset_axi [get_bd_pins axi_rst_n] [get_bd_pins action_config_0/resetn] [get_bd_pins axis_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_addr_fifo_1/s_axis_aresetn] [get_bd_pins axis_compl_fifo_0/s_axis_aresetn] [get_bd_pins axis_compl_fifo_1/s_axis_aresetn] [get_bd_pins axis_compl_fifo_2/s_axis_aresetn] [get_bd_pins axis_compl_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins axis_data_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_10/s_axis_aresetn] [get_bd_pins axis_data_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_5/s_axis_aresetn] [get_bd_pins axis_data_fifo_6/s_axis_aresetn] [get_bd_pins axis_data_fifo_7/s_axis_aresetn] [get_bd_pins axis_data_fifo_8/s_axis_aresetn] [get_bd_pins axis_data_fifo_9/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aresetn] [get_bd_pins axis_datamover_cmd_fifo_0/s_axis_aresetn] [get_bd_pins axis_datamover_cmd_fifo_1/s_axis_aresetn] [get_bd_pins axis_datamover_cmd_fifo_2/s_axis_aresetn] [get_bd_pins axis_datamover_cmd_fifo_3/s_axis_aresetn] [get_bd_pins axis_datamover_fifo_0/s_axis_aresetn] [get_bd_pins axis_datamover_fifo_1/s_axis_aresetn] [get_bd_pins axis_datamover_fifo_2/s_axis_aresetn] [get_bd_pins axis_datamover_fifo_3/s_axis_aresetn] [get_bd_pins axis_eth_in_fifo/s_axis_aresetn] [get_bd_pins axis_frame_generator_fifo_0/s_axis_aresetn] [get_bd_pins axis_hbm_handles_fifo/s_axis_aresetn] [get_bd_pins axis_integration_result_fifo/s_axis_aresetn] [get_bd_pins axis_register_slice_0/aresetn] [get_bd_pins axis_register_slice_1/aresetn] [get_bd_pins axis_register_slice_2/aresetn] [get_bd_pins axis_register_slice_3/aresetn] [get_bd_pins axis_register_slice_data_in_0/aresetn] [get_bd_pins axis_register_slice_host_mem/aresetn] [get_bd_pins axis_register_slice_udp/aresetn] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_udp_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_completion_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_request_fifo_0/s_axis_aresetn] [get_bd_pins network_stack/resetn] [get_bd_pins smartconnect_0/aresetn] [get_bd_pins smartconnect_1/aresetn] [get_bd_pins smartconnect_2/aresetn]
connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins axi_datamover_0/m_axi_mm2s_aresetn] [get_bd_pins axi_datamover_0/m_axi_s2mm_aresetn] [get_bd_pins axi_datamover_0/m_axis_mm2s_cmdsts_aresetn] [get_bd_pins axi_datamover_0/m_axis_s2mm_cmdsts_aresetn] [get_bd_pins axi_datamover_1/m_axi_mm2s_aresetn] [get_bd_pins axi_datamover_1/m_axi_s2mm_aresetn] [get_bd_pins axi_datamover_1/m_axis_mm2s_cmdsts_aresetn] [get_bd_pins axi_datamover_1/m_axis_s2mm_cmdsts_aresetn] [get_bd_pins axis_broadcast_0/ap_rst_n] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins frame_generator_0/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins integration_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins load_from_hbm_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins mask_missing_0/ap_rst_n] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins save_to_hbm_0/ap_rst_n] [get_bd_pins spot_finder_0/ap_rst_n] [get_bd_pins stream_merge_0/ap_rst_n] [get_bd_pins timer_hbm/ap_rst_n] [get_bd_pins timer_host/ap_rst_n]
connect_bd_net -net timer_hbm_counter [get_bd_pins action_config_0/stalls_hbm] [get_bd_pins timer_hbm/counter]
connect_bd_net -net timer_hbm_counter_ap_vld [get_bd_pins action_config_0/stalls_hbm_valid] [get_bd_pins timer_hbm/counter_ap_vld]
connect_bd_net -net timer_host_counter [get_bd_pins action_config_0/stalls_host] [get_bd_pins timer_host/counter]

3
receiver/AcquisitionDevice.cpp
View File

@@ -162,7 +162,8 @@ const int16_t *AcquisitionDevice::GetFrameBuffer(size_t frame_number, uint16_t m
}
const IntegrationResult *AcquisitionDevice::GetIntegrationResult(size_t frame_number, uint16_t module_number) const {
return reinterpret_cast<const IntegrationResult *>(GetFrameBuffer(frame_number, module_number) + RAW_MODULE_SIZE);
return reinterpret_cast<const IntegrationResult *>(GetFrameBuffer(frame_number, module_number)
+ 17 * RAW_MODULE_SIZE / 16);
}
const int16_t *AcquisitionDevice::GetErrorFrameBuffer() const {

20
receiver/HLSSimulatedDevice.cpp
View File

@@ -226,6 +226,8 @@ void HLSSimulatedDevice::HLSMainThread() {
STREAM_512 converted_3;
STREAM_512 converted_4;
STREAM_512 converted_5;
STREAM_512 converted_6;
STREAM_512 converted_7;
hls::stream<axis_addr> addr0;
hls::stream<axis_addr> addr1;
@@ -235,6 +237,7 @@ void HLSSimulatedDevice::HLSMainThread() {
hls::stream<axis_completion> compl0, compl1, compl2, compl3;
hls::stream<ap_uint<16>> hbm_handles;
hls::stream<ap_uint<192>> integration_result;
hls::stream<ap_uint<512>> spot_finder_result;
hls::stream<ap_uint<UDP_METADATA_STREAM_WIDTH> > udp_metadata;
ap_uint<1> idle_data_collection;
@@ -332,16 +335,21 @@ void HLSSimulatedDevice::HLSMainThread() {
// 4. Mask missing pixels
hls_cores.emplace_back([&] { mask_missing(converted_2, converted_3, compl1, compl2);});
hls_cores.emplace_back([&] { axis_broadcast(converted_3, converted_4, converted_7);});
// 5. Spot finding
hls_cores.emplace_back([&] { spot_finder(converted_7, spot_finder_result);});
// 5. Integration of pixels
hls_cores.emplace_back([&] { integration(converted_3, converted_4, integration_result, compl2, compl3,
hls_cores.emplace_back([&] { integration(converted_4, converted_5, integration_result, compl2, compl3,
hbm.data(), hbm.data(), hbm_if_size);});
// Timer procedure - count how many times write_data is not accepting input (to help track down latency issues)
hls_cores.emplace_back([&] { timer_host(converted_4, converted_5, counter_host); });
hls_cores.emplace_back([&] { timer_host(converted_5, converted_6, counter_host); });
// 6. Prepare data to write to host memory
hls_cores.emplace_back([&] {
host_writer(converted_5, integration_result,
host_writer(converted_6, integration_result, spot_finder_result,
compl3, datamover_out.GetDataStream(),
datamover_out.GetCtrlStream(), work_request_stream, completion_stream,
packets_processed, host_writer_idle, err_reg); });
@@ -388,6 +396,12 @@ void HLSSimulatedDevice::HLSMainThread() {
if (!converted_5.empty())
throw std::runtime_error("Converted_5 queue not empty");
if (!converted_6.empty())
throw std::runtime_error("Converted_6 queue not empty");
if (!converted_7.empty())
throw std::runtime_error("Converted_7 queue not empty");
if (!compl0.empty())
throw std::runtime_error("Compl0 queue not empty");