FPGA: Do not load internal packet generator frame via DMA

common/Definitions.h

@@ -50,7 +50,7 @@
 
 // For FPGA
 #define ACTION_TYPE   0x52324158
-#define RELEASE_LEVEL 0x0038
+#define RELEASE_LEVEL 0x0039
 
 #define MODE_CONV                    0x0001L
 #define MODE_INTERNAL_PACKET_GEN     0x0002L

fpga/hls/internal_packet_generator.cpp

@@ -34,13 +34,6 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out,
     addr_in >> addr;
     addr_out << addr;
 
-    save_frame:
-    for (int i = 0; i < RAW_MODULE_SIZE * 2 / 64; i++) {
-#pragma HLS PIPELINE II=1
-        data_in >> packet_in;
-        module_cache[i] = packet_in.data;
-    }
-
     if (conversion) {
         forward_gain:
         for (int i = 0; i < modules * (3 + storage_cells * 3) * (RAW_MODULE_SIZE * 2 / 64); i++) {

fpga/hls/load_calibration.cpp

@@ -50,8 +50,6 @@ void load_calibration(STREAM_512 &data_in, STREAM_512 &data_out,
     ap_uint<1> conversion    = (ACT_REG_MODE(packet_in.data) & MODE_CONV) ? 1 : 0;
     data_out << packet_in;
 
-    load_data(data_out, datamover_in_cmd, host_memory_in, in_mem_location[0], RAW_MODULE_SIZE * sizeof(int16_t) / 64);
-
     if (conversion) {
         read_gain:
         for (int c = 0; c < 3; c++) {

receiver/FPGAAcquisitionDevice.cpp

@@ -132,9 +132,6 @@ void FPGAAcquisitionDevice::Start(const DiffractionExperiment &experiment) {
     HW_WriteActionRegister(&cfg_in);
     HW_ReadActionRegister(&cfg_out);
 
-    if (experiment.IsUsingInternalPacketGen())
-        memcpy(buffer_device[0], internal_pkt_gen_frame.data(), RAW_MODULE_SIZE * sizeof(uint16_t));
-
     if (cfg_out.mode != cfg_in.mode)
         throw JFJochException(JFJochExceptionCategory::AcquisitionDeviceError,
                               "Mismatch between expected and actual values of configuration registers (mode)");

receiver/FPGAAcquisitionDevice.h

@@ -10,7 +10,6 @@
 class FPGAAcquisitionDevice : public AcquisitionDevice {
     uint16_t data_collection_id = 0;
     bool fpga_non_blocking_mode = true;
-    std::vector<uint16_t> internal_pkt_gen_frame;
 
     virtual void FPGA_StartAction() = 0;
     virtual void FPGA_EndAction() = 0;
@@ -34,6 +33,7 @@ class FPGAAcquisitionDevice : public AcquisitionDevice {
     void StartSendingWorkRequests() override;
     void Start(const DiffractionExperiment &experiment) override;
 protected:
+    std::vector<uint16_t> internal_pkt_gen_frame;
     explicit FPGAAcquisitionDevice(uint16_t data_stream);
     virtual void HW_GetStatus(ActionStatus *status) const = 0;
     virtual void HW_GetEnvParams(ActionEnvParams *status) const {

receiver/HLSSimulatedDevice.cpp

@@ -51,8 +51,6 @@ HLSSimulatedDevice::HLSSimulatedDevice(uint16_t data_stream, size_t in_frame_buf
     for (auto &i: hbm_memory)
         // i.resize(SIZE_OF_HBM_BLOCK_IN_BYTES);
         i.resize(32*1024*1024); // only 32 MiB instead of 256 MiB per HBM interface (should be more than enough for all the tests anyway)
-
-    internal_packet_generator_uram.resize(RAW_MODULE_SIZE * sizeof(uint16_t) / 512 * 8);
 }
 
 void HLSSimulatedDevice::CreateFinalPacket(const DiffractionExperiment& experiment) {
@@ -291,7 +289,8 @@ void HLSSimulatedDevice::HLSMainThread() {
                                                   calibration_addr_bram); });
 
     // Generate internal packets
-    hls_cores.emplace_back([&] { internal_packet_generator(raw2, raw3, addr1, addr2, internal_packet_generator_uram.data(),
+    hls_cores.emplace_back([&] { internal_packet_generator(raw2, raw3, addr1, addr2,
+                                                           reinterpret_cast<ap_uint<512> *>(internal_pkt_gen_frame.data()),
                                                            cancel_data_collection); });
 
     // Timer procedure - count how many times pedestal_corr/gain_corr is not accepting input (to help track down latency issues)

receiver/HLSSimulatedDevice.h

@@ -22,7 +22,6 @@ class HLSSimulatedDevice : public FPGAAcquisitionDevice {
 
     volatile bool idle;
     std::vector<char> hbm_memory[10];
-    std::vector<ap_uint<512>> internal_packet_generator_uram;
 
     hls::stream<ap_uint<32> > work_request_stream;
     hls::stream<ap_uint<32> > completion_stream;

receiver/PCIExpressDevice.cpp

@@ -93,6 +93,10 @@ bool PCIExpressDevice::HW_SendWorkRequest(uint32_t handle) {
 }
 
 void PCIExpressDevice::FPGA_StartAction() {
+    if (ioctl(fd, IOCTL_JFJOCH_SET_INT_PKT, internal_pkt_gen_frame.data()) != 0)
+        throw JFJochException(JFJochExceptionCategory::PCIeError,
+                              "Failed loading internal packet generator frame", errno);
+
     if (ioctl(fd, IOCTL_JFJOCH_START) != 0)
         throw JFJochException(JFJochExceptionCategory::PCIeError,
                               "Failed starting action", errno);