* jf: if bit 14 in reg 0x5d (electron mode collection bit) is changed, configure chip if v1.1 and powered on. so touch writeregister (setbit/clearbit also calls write register in the end). replace when electroncollectionmode command introduced
* jf: rewrite of status reg bits, waiting state includes both wati for trigger and start frame, blocking trigger only waits if its not in waiting for trigger and run busy enabled, error state connected in firmware
* merge fix from 7.0.2: new jungfrau fw versions, incremented binary, hdf5 and json versions
* moench: changed dac names and default values to old moench values
* moench: remove interface clk polarity at start up
* moench: default speed is half speed, default values for adc offset and adc phase for different speeds (only half speed confirmed), adc vref voltage to 2.0 like G1
* moench: connected adc pipeline to client
* moench: receiver- default frames per file is 100k and discard partial frames as default
* moench binary in
* using tostring in gui for dacs
* moved frame discard policy as a parameter to be configured with a default depending on detector
* moench: 300 degrees for adc phase in full speed
* transceiverenable, tsamples, romode for tranceiver and digital_transceiver
* 202 spec instr only for transceiver mode
* removed check for empty in trans readout and clean memory before reading from fifo
* ctb read fifo strobe for all after reading all channels, adding 1us after selecting channel, changing fw date
* updated 10gb transceiver enable
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* added transceiver (tsamples, romode(transceiver, digital_transceiver), transceiverenable (mask)
* clean memory before reading from fifo (for analog and digital as well)
* read fifo then read strobe (also corresp fw) fixes number of reads (also for analg and digital)-> increases all pipelines by 1
* fixed bug in rearranging digital data in receiver
* fixed bug in streaming size of data after rearranging
* fixed bug in setbit, clearbit,and getbit
* status checks fifo before returning idle (transmitting if data in fifo if transceiver more enabled)
* soem matterhorn specifics that will need to be put into pattern in a month or two. this is temporary.
* NOTE: breaking api. rxParameters struct has transceiverenabel and tsamples given from det to receiver
* when dbit list is enabled, the size of data in zmq stream is changed to only the digital bits enabled size. now fixed to also include analog size
* allowing to set 0xffffffffffffffff to pat io control. prevously was used to do a get. fixed also for pat bit mask and pat mask
- start acq list: mixup with master pos #743 : fix that only master starts second and not all (for start acq), typo with pos and masters list
- synced master status running when setting to slave #747: synced master status running when setting to slave
* moench, removed chip version, filter resistor, filter cells, currentsoures, gain mode, setttings(modes), dbitphase, maxdbitphase, autocompdisable, comparatordisabletime, made acq start and stop a pulse, removed unused registers
* added parallel command
* remove gain plot for moench
* moench: updated adc invert val
* moench: update adcoffset to 0xf and adcphase to 140 degrees
* removed sync clock in moench
* updated min fw version
* removing config file in moench server
* Revert "Ctb: allow adc mask enable to be 0 for 1 and 10GbE (#750)"
This reverts commit a0f250a4876937ebb2a96c8948fdea380625a86e.
* better error message about setting adc mask to 0. Cannot set it to 0 due to ram allocation
* merge fix from #721 PR (sync) 7.0.2.rc -> developer
* row and column for jungfrau mixed up
* multi module jungfrau sync must do slaves first then master for start acquisition and send software trigger, and master first and then slaves for stopacquisition
* non blocking to slaves first and only then blocking/nonblocking to the master for sending software trigger(jungfrau multi mod sync)
* fixed get/set timing jungfrau when sync enabled, getsync during blocking acquire (for trigger or stop) will get stuck as it should ask the stop server
* switching between 1 and 2 interfaces did not set gui/client zmq port properly. Resulted in dummy streaming forever. fixed
* formatting, refactoring: const & for positions, multi mod M3 stop first master first
* adding missing cstdint for gcc 13
* Refactoring handle sync out, handling synchronization also for softwaretrigger for m3, for start/sync/stop for g2/g1
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Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
* fixed row and col for moench 2 interfaces
* fix moench getTiming and also allow moench to handle sync
---------
Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
Firmware updated. spi moved to firmware. In Software, configuring, then a pulse to start, wait for done bit and convert the values read from a regiter.
* eiger: hardwareversion, fix firmware version unable to read version scenarios, check to see if febl, febr and beb have same fw version
* feb versions can be picked up only after feb initialization
* eiger: adding mask to read/write registers. useful for setting quad parameters as they might have different values for left and right fpga registers.
** fix quad position
* fix quad flipping
* formatting
