mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-06-23 10:07:59 +02:00
Fix ctb slow adc fw (#713)
Firmware updated. spi moved to firmware. In Software, configuring, then a pulse to start, wait for done bit and convert the values read from a regiter.
This commit is contained in:
Dhanya Thattil
@ -10,7 +10,6 @@ add_executable(ctbDetectorServer_virtual
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../slsDetectorServer/src/commonServerFunctions.c
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../slsDetectorServer/src/communication_funcs_UDP.c
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../slsDetectorServer/src/UDPPacketHeaderGenerator.c
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../slsDetectorServer/src/AD7689.c
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../slsDetectorServer/src/AD9257.c
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../slsDetectorServer/src/ALTERA_PLL.c
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../slsDetectorServer/src/I2C.c
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@ -16,7 +16,7 @@ DESTDIR ?= bin
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INSTMODE = 0777
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SRCS = slsDetectorFunctionList.c
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SRCS += $(main_src)slsDetectorServer.c $(main_src)slsDetectorServer_funcs.c $(main_src)communication_funcs.c $(main_src)blackfin.c $(main_src)common.c $(main_src)commonServerFunctions.c $(main_src)communication_funcs_UDP.c $(main_src)UDPPacketHeaderGenerator.c $(main_src)AD7689.c $(main_src)AD9257.c $(main_src)ALTERA_PLL.c $(main_src)I2C.c $(main_src)INA226.c $(main_src)LTC2620.c $(main_src)MAX1932.c $(main_src)programViaBlackfin.c $(main_src)/sharedMemory.c $(main_src)/loadPattern.c $(md5_dir)md5.c
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SRCS += $(main_src)slsDetectorServer.c $(main_src)slsDetectorServer_funcs.c $(main_src)communication_funcs.c $(main_src)blackfin.c $(main_src)common.c $(main_src)commonServerFunctions.c $(main_src)communication_funcs_UDP.c $(main_src)UDPPacketHeaderGenerator.c $(main_src)AD9257.c $(main_src)ALTERA_PLL.c $(main_src)I2C.c $(main_src)INA226.c $(main_src)LTC2620.c $(main_src)MAX1932.c $(main_src)programViaBlackfin.c $(main_src)/sharedMemory.c $(main_src)/loadPattern.c $(md5_dir)md5.c
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OBJS = $(SRCS:.c=.o)
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@ -184,12 +184,6 @@
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#define POWER_STATUS_ALRT_OFST (27)
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#define POWER_STATUS_ALRT_MSK (0x0000001F << POWER_STATUS_ALRT_OFST)
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/* DAC Value Out RO register */
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//#define DAC_VAL_OUT_REG (0x2A << MEM_MAP_SHIFT)
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/* Slow ADC SPI Value RO register */
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#define ADC_SPI_SLOW_VAL_REG (0x2B << MEM_MAP_SHIFT)
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/* FIFO Digital In Status RO register */
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#define FIFO_DIN_STATUS_REG (0x3B << MEM_MAP_SHIFT)
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#define FIFO_DIN_STATUS_FIFO_FULL_OFST (30)
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@ -228,12 +222,6 @@
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#define ADC_SPI_SRL_DT_OTPT_MSK (0x00000001 << ADC_SPI_SRL_DT_OTPT_OFST)
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#define ADC_SPI_SRL_CS_OTPT_OFST (2)
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#define ADC_SPI_SRL_CS_OTPT_MSK (0x0000000F << ADC_SPI_SRL_CS_OTPT_OFST)
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#define ADC_SPI_SLOW_SRL_DT_OFST (8)
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#define ADC_SPI_SLOW_SRL_DT_MSK (0x00000001 << ADC_SPI_SLOW_SRL_DT_OFST)
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#define ADC_SPI_SLOW_SRL_CLK_OFST (9)
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#define ADC_SPI_SLOW_SRL_CLK_MSK (0x00000001 << ADC_SPI_SLOW_SRL_CLK_OFST)
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#define ADC_SPI_SLOW_SRL_CNV_OFST (10)
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#define ADC_SPI_SLOW_SRL_CNV_MSK (0x00000001 << ADC_SPI_SLOW_SRL_CNV_OFST)
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/* ADC Offset RW register */
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#define ADC_OFFSET_REG (0x42 << MEM_MAP_SHIFT)
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@ -634,6 +622,98 @@
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#define PATTERN_WAIT_TIMER_5_LSB_REG (0x91 << MEM_MAP_SHIFT)
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#define PATTERN_WAIT_TIMER_5_MSB_REG (0x92 << MEM_MAP_SHIFT)
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/* Slow ADC SPI Value RO register */
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#define ADC_SLOW_DATA_REG (0x93 << MEM_MAP_SHIFT)
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/* Slow ADC SPI Value Config register */
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#define ADC_SLOW_CFG_REG (0x94 << MEM_MAP_SHIFT)
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/** Read back CFG Register */
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#define ADC_SLOW_CFG_RB_OFST (2)
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#define ADC_SLOW_CFG_RB_MSK (0x00000001 << ADC_SLOW_CFG_RB_OFST)
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/** Channel sequencer */
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#define ADC_SLOW_CFG_SEQ_OFST (3)
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#define ADC_SLOW_CFG_SEQ_MSK (0x00000003 << ADC_SLOW_CFG_SEQ_OFST)
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#define ADC_SLOW_CFG_SEQ_DSBLE_VAL \
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((0x0 << ADC_SLOW_CFG_SEQ_OFST) & ADC_SLOW_CFG_SEQ_MSK)
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#define ADC_SLOW_CFG_SEQ_UPDTE_DRNG_SQNCE_VAL \
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((0x1 << ADC_SLOW_CFG_SEQ_OFST) & ADC_SLOW_CFG_SEQ_MSK)
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#define ADC_SLOW_CFG_SEQ_SCN_WTH_TMP_VAL \
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((0x2 << ADC_SLOW_CFG_SEQ_OFST) & ADC_SLOW_CFG_SEQ_MSK)
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#define ADC_SLOW_CFG_SEQ_SCN_WTHT_TMP_VAL \
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((0x3 << ADC_SLOW_CFG_SEQ_OFST) & ADC_SLOW_CFG_SEQ_MSK)
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/** Reference/ buffer selection */
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#define ADC_SLOW_CFG_REF_OFST (5)
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#define ADC_SLOW_CFG_REF_MSK (0x00000007 << ADC_SLOW_CFG_REF_OFST)
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/** Internal reference. REF = 2.5V buffered output. Temperature sensor enabled.
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*/
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#define ADC_SLOW_CFG_REF_INT_2500MV_VAL \
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((0x0 << ADC_SLOW_CFG_REF_OFST) & ADC_SLOW_CFG_REF_OFST)
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/** Internal reference. REF = 4.096V buffered output. Temperature sensor
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* enabled. */
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#define ADC_SLOW_CFG_REF_INT_4096MV_VAL \
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((0x1 << ADC_SLOW_CFG_REF_OFST) & ADC_SLOW_CFG_REF_MSK)
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/** External reference. Temperature sensor enabled. Internal buffer disabled. */
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#define ADC_SLOW_CFG_REF_EXT_TMP_VAL \
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((0x2 << ADC_SLOW_CFG_REF_OFST) & ADC_SLOW_CFG_REF_MSK)
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/** External reference. Temperature sensor enabled. Internal buffer enabled. */
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#define ADC_SLOW_CFG_REF_EXT_TMP_INTBUF_VAL \
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((0x3 << ADC_SLOW_CFG_REF_OFST) & ADC_SLOW_CFG_REF_MSK)
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/** External reference. Temperature sensor disabled. Internal buffer disabled.
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*/
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#define ADC_SLOW_CFG_REF_EXT_VAL \
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((0x6 << ADC_SLOW_CFG_REF_OFST) & ADC_SLOW_CFG_REF_MSK)
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/** External reference. Temperature sensor disabled. Internal buffer enabled. */
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#define ADC_SLOW_CFG_REF_EXT_INTBUF_VAL \
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((0x7 << ADC_SLOW_CFG_REF_OFST) & ADC_SLOW_CFG_REF_MSK)
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/** bandwidth of low pass filter */
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#define ADC_SLOW_CFG_BW_OFST (8)
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#define ADC_SLOW_CFG_BW_MSK (0x00000001 << ADC_SLOW_CFG_REF_OFST)
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#define ADC_SLOW_CFG_BW_ONE_FOURTH_VAL \
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((0x0 << ADC_SLOW_CFG_BW_OFST) & ADC_SLOW_CFG_BW_MSK)
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#define ADC_SLOW_CFG_BW_FULL_VAL ((0x1 << ADC_SLOW_CFG_BW_OFST) & ADC_SLOW_CFG_BW_MSK)
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/** input channel selection IN0 - IN7 */
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#define ADC_SLOW_CFG_IN_OFST (9)
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#define ADC_SLOW_CFG_IN_MSK (0x00000007 << ADC_SLOW_CFG_IN_OFST)
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/** input channel configuration */
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#define ADC_SLOW_CFG_INCC_OFST (12)
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#define ADC_SLOW_CFG_INCC_MSK (0x00000007 << ADC_SLOW_CFG_INCC_OFST)
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#define ADC_SLOW_CFG_INCC_BPLR_DFFRNTL_PRS_VAL \
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((0x0 << ADC_SLOW_CFG_INCC_OFST) & ADC_SLOW_CFG_INCC_MSK)
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#define ADC_SLOW_CFG_INCC_BPLR_IN_COM_VAL \
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((0x2 << ADC_SLOW_CFG_INCC_OFST) & ADC_SLOW_CFG_INCC_MSK)
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#define ADC_SLOW_CFG_INCC_TMP_VAL \
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((0x3 << ADC_SLOW_CFG_INCC_OFST) & ADC_SLOW_CFG_INCC_MSK)
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#define ADC_SLOW_CFG_INCC_UNPLR_DFFRNTL_PRS_VAL \
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((0x4 << ADC_SLOW_CFG_INCC_OFST) & ADC_SLOW_CFG_INCC_MSK)
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#define ADC_SLOW_CFG_INCC_UNPLR_IN_COM_VAL \
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((0x6 << ADC_SLOW_CFG_INCC_OFST) & ADC_SLOW_CFG_INCC_MSK)
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#define ADC_SLOW_CFG_INCC_UNPLR_IN_GND_VAL \
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((0x7 << ADC_SLOW_CFG_INCC_OFST) & ADC_SLOW_CFG_INCC_MSK)
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/** configuration update */
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#define ADC_SLOW_CFG_CFG_OFST (15)
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#define ADC_SLOW_CFG_CFG_MSK (0x00000001 << ADC_SLOW_CFG_CFG_OFST)
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#define ADC_SLOW_CFG_CFG_NO_UPDATE_VAL \
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((0x0 << ADC_SLOW_CFG_CFG_OFST) & ADC_SLOW_CFG_CFG_MSK)
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#define ADC_SLOW_CFG_CFG_OVRWRTE_VAL \
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((0x1 << ADC_SLOW_CFG_CFG_OFST) & ADC_SLOW_CFG_CFG_MSK)
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/* Slow ADC SPI Value Control register */
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#define ADC_SLOW_CTRL_REG (0x95 << MEM_MAP_SHIFT)
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#define ADC_SLOW_CTRL_STRT_OFST (0)
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#define ADC_SLOW_CTRL_STRT_MSK (0x00000001 << ADC_SLOW_CTRL_STRT_OFST)
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#define ADC_SLOW_CTRL_DONE_OFST (1)
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#define ADC_SLOW_CTRL_DONE_MSK (0x00000001 << ADC_SLOW_CTRL_DONE_OFST)
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/** I2C Control register */
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#define I2C_TRANSFER_COMMAND_FIFO_REG (0x100 << MEM_MAP_SHIFT)
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#define I2C_RX_DATA_FIFO_REG (0x101 << MEM_MAP_SHIFT)
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Binary file not shown.
@ -5,7 +5,6 @@
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#include "sharedMemory.h"
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#include "sls/versionAPI.h"
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#include "AD7689.h" // slow adcs
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#include "ALTERA_PLL.h" // pll
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#include "INA226.h" // i2c
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#include "LTC2620.h" // dacs
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@ -534,13 +533,6 @@ void setupDetector() {
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AD9257_Disable();
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AD9257_Configure();
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// slow adcs
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AD7689_SetDefines(ADC_SPI_REG, ADC_SPI_SLOW_VAL_REG,
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ADC_SPI_SLOW_SRL_CNV_MSK, ADC_SPI_SLOW_SRL_CLK_MSK,
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ADC_SPI_SLOW_SRL_DT_MSK, ADC_SPI_SLOW_SRL_DT_OFST);
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AD7689_Disable();
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AD7689_Configure();
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// dacs
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LTC2620_SetDefines(SPI_REG, SPI_DAC_SRL_CS_OTPT_MSK,
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SPI_DAC_SRL_CLK_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_MSK,
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@ -1473,7 +1465,7 @@ int getADC(enum ADCINDEX ind) {
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// slow adcs
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case S_TMP:
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LOG(logDEBUG1, ("Reading Slow ADC Temperature\n"));
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return AD7689_GetTemperature();
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return getSlowADCTemperature();
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case S_ADC0:
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case S_ADC1:
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case S_ADC2:
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@ -1483,13 +1475,120 @@ int getADC(enum ADCINDEX ind) {
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case S_ADC6:
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case S_ADC7:
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LOG(logDEBUG1, ("Reading Slow ADC Channel %d\n", (int)ind - S_ADC0));
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return AD7689_GetChannel((int)ind - S_ADC0);
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return getSlowADC((int)ind - S_ADC0);
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default:
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LOG(logERROR, ("Adc Index %d not defined \n", (int)ind));
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return -1;
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}
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}
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int getSlowADC(int ichan) {
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LOG(logDEBUG1, ("Getting slow adc channel %d\n", ichan));
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// configure for channel
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bus_w(ADC_SLOW_CFG_REG,
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// don't read back config reg
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ADC_SLOW_CFG_RB_MSK |
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// disable sequencer (different from config)
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ADC_SLOW_CFG_SEQ_DSBLE_VAL |
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// Internal reference. REF = 2.5V buffered output. Temperature sensor
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// enabled.
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ADC_SLOW_CFG_REF_INT_2500MV_VAL |
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// full bandwidth of low pass filter
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ADC_SLOW_CFG_BW_FULL_VAL |
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// specific channel (different from config)
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((ichan << ADC_SLOW_CFG_IN_OFST) & ADC_SLOW_CFG_IN_MSK) |
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// input channel configuration (unipolar. inx to gnd)
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ADC_SLOW_CFG_INCC_UNPLR_IN_GND_VAL |
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// overwrite configuration
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ADC_SLOW_CFG_CFG_OVRWRTE_VAL);
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// start converting
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bus_w(ADC_SLOW_CTRL_REG, bus_r(ADC_SLOW_CTRL_REG) | ADC_SLOW_CTRL_STRT_MSK);
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bus_w(ADC_SLOW_CTRL_REG, bus_r(ADC_SLOW_CTRL_REG) & ~ADC_SLOW_CTRL_STRT_MSK);
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// wait for it to be done
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volatile int done = ((bus_r(ADC_SLOW_CTRL_REG) & ADC_SLOW_CTRL_DONE_MSK) >> ADC_SLOW_CTRL_DONE_OFST);
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while (!done) {
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done = ((bus_r(ADC_SLOW_CTRL_REG) & ADC_SLOW_CTRL_DONE_MSK) >> ADC_SLOW_CTRL_DONE_OFST);
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}
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// readout
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int regval = bus_r(ADC_SLOW_DATA_REG);
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// value in uV
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int refMaxuv = 2500 * 1000;
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int regMinuv = 0;
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int maxSteps = 0xFFFF + 1;
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int retval = 0;
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if (ConvertToDifferentRange(0, maxSteps, regMinuv, refMaxuv, regval, &retval) == FAIL) {
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LOG(logERROR, ("Could not convert slow adc channel (regval:0x%x) to uv\n", regval));
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return -1;
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}
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LOG(logINFO,
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("\tRead slow adc [%d]: %d uV (reg: 0x%x)\n", ichan, retval, regval));
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return retval;
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}
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int getSlowADCTemperature() {
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LOG(logDEBUG1, ("Getting slow adc temperature\n"));
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// configure for channel
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bus_w(ADC_SLOW_CFG_REG,
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// don't read back config reg
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ADC_SLOW_CFG_RB_MSK |
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// disable sequencer (different from config)
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ADC_SLOW_CFG_SEQ_DSBLE_VAL |
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// Internal reference. REF = 2.5V buffered output. Temperature sensor
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// enabled.
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ADC_SLOW_CFG_REF_INT_2500MV_VAL |
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// full bandwidth of low pass filter
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ADC_SLOW_CFG_BW_FULL_VAL |
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// all channels
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ADC_SLOW_CFG_IN_MSK |
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// temp sensor
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ADC_SLOW_CFG_INCC_TMP_VAL |
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// overwrite configuration
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ADC_SLOW_CFG_CFG_OVRWRTE_VAL);
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// start converting
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bus_w(ADC_SLOW_CTRL_REG, bus_r(ADC_SLOW_CTRL_REG) | ADC_SLOW_CTRL_STRT_MSK);
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bus_w(ADC_SLOW_CTRL_REG, bus_r(ADC_SLOW_CTRL_REG) & ~ADC_SLOW_CTRL_STRT_MSK);
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// wait for it to be done
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volatile int done = ((bus_r(ADC_SLOW_CTRL_REG) & ADC_SLOW_CTRL_DONE_MSK) >> ADC_SLOW_CTRL_DONE_OFST);
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while (!done) {
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done = ((bus_r(ADC_SLOW_CTRL_REG) & ADC_SLOW_CTRL_DONE_MSK) >> ADC_SLOW_CTRL_DONE_OFST);
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}
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// readout
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int regval = bus_r(ADC_SLOW_DATA_REG);
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// value in mV FIXME: page 17? reference voltage temperature coefficient or
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// t do with -40 to 85 °C
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int retval = 0;
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int maxSteps = 0xFFFF + 1;
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int minmv = 0;
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int maxmv = 2500;
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if (ConvertToDifferentRange(0, maxSteps, minmv,
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maxmv, regval, &retval) == FAIL) {
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LOG(logERROR, ("Could not convert slow adc temp (regval:0x%x) to uv\n", regval));
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return -1;
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}
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LOG(logDEBUG1, ("voltage read for temp: %d mV\n", retval));
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// value in °C
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double tempCFor1mv = (25.00 / 283.00);
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double tempValue = tempCFor1mv * (double)retval;
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LOG(logINFO, ("\tTemp slow adc : %f °C (reg: %d)\n", tempValue, regval));
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return tempValue;
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}
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int setHighVoltage(int val) {
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// setting hv
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if (val >= 0) {
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@ -5,7 +5,7 @@
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#include "sls/sls_detector_defs.h"
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#define MIN_REQRD_VRSN_T_RD_API 0x181130
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#define REQRD_FRMWR_VRSN 0x221205
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#define REQRD_FRMWR_VRSN 0x230403
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#define NUM_HARDWARE_VERSIONS (1)
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#define HARDWARE_VERSION_NUMBERS \
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@ -1,52 +0,0 @@
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// SPDX-License-Identifier: LGPL-3.0-or-other
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// Copyright (C) 2021 Contributors to the SLS Detector Package
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#pragma once
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#include <inttypes.h>
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/**
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* Set Defines
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* @param reg spi register
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* @param roreg spi readout register
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* @param cmsk conversion mask
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* @param clkmsk clock output mask
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* @param dmsk digital output mask
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* @param dofst digital output offset
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*/
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void AD7689_SetDefines(uint32_t reg, uint32_t roreg, uint32_t cmsk,
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uint32_t clkmsk, uint32_t dmsk, int dofst);
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/**
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* Disable SPI
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*/
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void AD7689_Disable();
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/**
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* Set SPI reg value
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* @param codata value to be set
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*/
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void AD7689_Set(uint32_t codata);
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/**
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* Get SPI reg value
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* @returns SPI reg value
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*/
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uint16_t AD7689_Get();
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/**
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* Get temperature
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* @returns temperature in °C
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*/
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int AD7689_GetTemperature();
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/**
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* Reads channels voltage
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* @param ichan channel number from 0 to 7
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* @returns channel voltage in mV
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*/
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int AD7689_GetChannel(int ichan);
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/**
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* Configure
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*/
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void AD7689_Configure();
|
||||
@ -389,6 +389,10 @@ int getADC(enum ADCINDEX ind, int *value);
|
||||
#else
|
||||
int getADC(enum ADCINDEX ind);
|
||||
#endif
|
||||
#ifdef CHIPTESTBOARDD
|
||||
int getSlowADC(int ichan);
|
||||
int getSlowADCTemperature();
|
||||
#endif
|
||||
|
||||
int setHighVoltage(int val);
|
||||
|
||||
|
||||
@ -1,242 +0,0 @@
|
||||
// SPDX-License-Identifier: LGPL-3.0-or-other
|
||||
// Copyright (C) 2021 Contributors to the SLS Detector Package
|
||||
#include "AD7689.h"
|
||||
#include "blackfin.h"
|
||||
#include "clogger.h"
|
||||
#include "common.h"
|
||||
#include "commonServerFunctions.h" // blackfin.h, ansi.h
|
||||
|
||||
/* AD7689 ADC DEFINES */
|
||||
|
||||
/** Read back CFG Register */
|
||||
#define AD7689_CFG_RB_OFST (0)
|
||||
#define AD7689_CFG_RB_MSK (0x00000001 << AD7689_CFG_RB_OFST)
|
||||
|
||||
/** Channel sequencer */
|
||||
#define AD7689_CFG_SEQ_OFST (1)
|
||||
#define AD7689_CFG_SEQ_MSK (0x00000003 << AD7689_CFG_SEQ_OFST)
|
||||
#define AD7689_CFG_SEQ_DSBLE_VAL \
|
||||
((0x0 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK)
|
||||
#define AD7689_CFG_SEQ_UPDTE_DRNG_SQNCE_VAL \
|
||||
((0x1 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK)
|
||||
#define AD7689_CFG_SEQ_SCN_WTH_TMP_VAL \
|
||||
((0x2 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK)
|
||||
#define AD7689_CFG_SEQ_SCN_WTHT_TMP_VAL \
|
||||
((0x3 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK)
|
||||
|
||||
/** Reference/ buffer selection */
|
||||
#define AD7689_CFG_REF_OFST (3)
|
||||
#define AD7689_CFG_REF_MSK (0x00000007 << AD7689_CFG_REF_OFST)
|
||||
/** Internal reference. REF = 2.5V buffered output. Temperature sensor enabled.
|
||||
*/
|
||||
#define AD7689_CFG_REF_INT_2500MV_VAL \
|
||||
((0x0 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_OFST)
|
||||
/** Internal reference. REF = 4.096V buffered output. Temperature sensor
|
||||
* enabled. */
|
||||
#define AD7689_CFG_REF_INT_4096MV_VAL \
|
||||
((0x1 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
|
||||
/** External reference. Temperature sensor enabled. Internal buffer disabled. */
|
||||
#define AD7689_CFG_REF_EXT_TMP_VAL \
|
||||
((0x2 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
|
||||
/** External reference. Temperature sensor enabled. Internal buffer enabled. */
|
||||
#define AD7689_CFG_REF_EXT_TMP_INTBUF_VAL \
|
||||
((0x3 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
|
||||
/** External reference. Temperature sensor disabled. Internal buffer disabled.
|
||||
*/
|
||||
#define AD7689_CFG_REF_EXT_VAL \
|
||||
((0x6 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
|
||||
/** External reference. Temperature sensor disabled. Internal buffer enabled. */
|
||||
#define AD7689_CFG_REF_EXT_INTBUF_VAL \
|
||||
((0x7 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
|
||||
|
||||
/** bandwidth of low pass filter */
|
||||
#define AD7689_CFG_BW_OFST (6)
|
||||
#define AD7689_CFG_BW_MSK (0x00000001 << AD7689_CFG_REF_OFST)
|
||||
#define AD7689_CFG_BW_ONE_FOURTH_VAL \
|
||||
((0x0 << AD7689_CFG_BW_OFST) & AD7689_CFG_BW_MSK)
|
||||
#define AD7689_CFG_BW_FULL_VAL ((0x1 << AD7689_CFG_BW_OFST) & AD7689_CFG_BW_MSK)
|
||||
|
||||
/** input channel selection IN0 - IN7 */
|
||||
#define AD7689_CFG_IN_OFST (7)
|
||||
#define AD7689_CFG_IN_MSK (0x00000007 << AD7689_CFG_IN_OFST)
|
||||
|
||||
/** input channel configuration */
|
||||
#define AD7689_CFG_INCC_OFST (10)
|
||||
#define AD7689_CFG_INCC_MSK (0x00000007 << AD7689_CFG_INCC_OFST)
|
||||
#define AD7689_CFG_INCC_BPLR_DFFRNTL_PRS_VAL \
|
||||
((0x0 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
|
||||
#define AD7689_CFG_INCC_BPLR_IN_COM_VAL \
|
||||
((0x2 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
|
||||
#define AD7689_CFG_INCC_TMP_VAL \
|
||||
((0x3 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
|
||||
#define AD7689_CFG_INCC_UNPLR_DFFRNTL_PRS_VAL \
|
||||
((0x4 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
|
||||
#define AD7689_CFG_INCC_UNPLR_IN_COM_VAL \
|
||||
((0x6 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
|
||||
#define AD7689_CFG_INCC_UNPLR_IN_GND_VAL \
|
||||
((0x7 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
|
||||
|
||||
/** configuration update */
|
||||
#define AD7689_CFG_CFG_OFST (13)
|
||||
#define AD7689_CFG_CFG_MSK (0x00000001 << AD7689_CFG_CFG_OFST)
|
||||
#define AD7689_CFG_CFG_NO_UPDATE_VAL \
|
||||
((0x0 << AD7689_CFG_CFG_OFST) & AD7689_CFG_CFG_MSK)
|
||||
#define AD7689_CFG_CFG_OVRWRTE_VAL \
|
||||
((0x1 << AD7689_CFG_CFG_OFST) & AD7689_CFG_CFG_MSK)
|
||||
|
||||
#define AD7689_ADC_CFG_NUMBITS (14)
|
||||
#define AD7689_ADC_DATA_NUMBITS (16)
|
||||
#define AD7689_NUM_CHANNELS (8)
|
||||
#define AD7689_NUM_INVALID_CONVERSIONS (3)
|
||||
|
||||
#define AD7689_INT_REF_MAX_MV \
|
||||
(2500) // chosen using reference buffer selection in config reg
|
||||
#define AD7689_INT_REF_MIN_MV (0)
|
||||
#define AD7689_INT_REF_MAX_UV (2500 * 1000)
|
||||
#define AD7689_INT_REF_MIN_UV (0)
|
||||
#define AD7689_INT_MAX_STEPS (0xFFFF + 1)
|
||||
#define AD7689_TMP_C_FOR_1_MV (25.00 / 283.00)
|
||||
|
||||
// Definitions from the fpga
|
||||
uint32_t AD7689_Reg = 0x0;
|
||||
uint32_t AD7689_ROReg = 0x0;
|
||||
uint32_t AD7689_CnvMask = 0x0;
|
||||
uint32_t AD7689_ClkMask = 0x0;
|
||||
uint32_t AD7689_DigMask = 0x0;
|
||||
int AD7689_DigOffset = 0x0;
|
||||
|
||||
void AD7689_SetDefines(uint32_t reg, uint32_t roreg, uint32_t cmsk,
|
||||
uint32_t clkmsk, uint32_t dmsk, int dofst) {
|
||||
LOG(logDEBUG, ("AD7689: reg:0x%x roreg:0x%x cmsk:0x%x clkmsk:0x%x "
|
||||
"dmsk:0x%x dofst:%d\n",
|
||||
reg, roreg, cmsk, clkmsk, dmsk, dofst));
|
||||
AD7689_Reg = reg;
|
||||
AD7689_ROReg = roreg;
|
||||
AD7689_CnvMask = cmsk;
|
||||
AD7689_ClkMask = clkmsk;
|
||||
AD7689_DigMask = dmsk;
|
||||
AD7689_DigOffset = dofst;
|
||||
}
|
||||
|
||||
void AD7689_Disable() {
|
||||
bus_w(AD7689_Reg, (bus_r(AD7689_Reg) & ~(AD7689_CnvMask) & ~AD7689_ClkMask &
|
||||
~(AD7689_DigMask)));
|
||||
}
|
||||
|
||||
void AD7689_Set(uint32_t codata) {
|
||||
LOG(logINFO,
|
||||
("\tSetting ADC SPI Register. Writing 0x%08x to Config Reg\n", codata));
|
||||
serializeToSPI(AD7689_Reg, codata, AD7689_CnvMask, AD7689_ADC_CFG_NUMBITS,
|
||||
AD7689_ClkMask, AD7689_DigMask, AD7689_DigOffset, 1);
|
||||
}
|
||||
|
||||
uint16_t AD7689_Get() {
|
||||
LOG(logINFO, ("\tGetting ADC SPI Register.\n"));
|
||||
return (uint16_t)serializeFromSPI(AD7689_Reg, AD7689_CnvMask,
|
||||
AD7689_ADC_DATA_NUMBITS, AD7689_ClkMask,
|
||||
AD7689_DigMask, AD7689_ROReg, 1);
|
||||
}
|
||||
|
||||
int AD7689_GetTemperature() {
|
||||
AD7689_Set(
|
||||
// read back
|
||||
AD7689_CFG_RB_MSK |
|
||||
// disable sequencer (different from config)
|
||||
AD7689_CFG_SEQ_DSBLE_VAL |
|
||||
// Internal reference. REF = 2.5V buffered output. Temperature sensor
|
||||
// enabled.
|
||||
AD7689_CFG_REF_INT_2500MV_VAL |
|
||||
// full bandwidth of low pass filter
|
||||
AD7689_CFG_BW_FULL_VAL |
|
||||
// all channel (different from config)
|
||||
AD7689_CFG_IN_MSK |
|
||||
// temperature sensor (different from config)
|
||||
AD7689_CFG_INCC_TMP_VAL |
|
||||
// overwrite configuration
|
||||
AD7689_CFG_CFG_OVRWRTE_VAL);
|
||||
|
||||
int regval = AD7689_Get();
|
||||
|
||||
// value in mV FIXME: page 17? reference voltage temperature coefficient or
|
||||
// t do with -40 to 85 °C
|
||||
int retval = 0;
|
||||
ConvertToDifferentRange(0, AD7689_INT_MAX_STEPS, AD7689_INT_REF_MIN_MV,
|
||||
AD7689_INT_REF_MAX_MV, regval, &retval);
|
||||
LOG(logDEBUG1, ("voltage read for temp: %d mV\n", retval));
|
||||
|
||||
// value in °C
|
||||
double tempValue = AD7689_TMP_C_FOR_1_MV * (double)retval;
|
||||
LOG(logINFO, ("\ttemp read : %f °C (%d unit)\n", tempValue, regval));
|
||||
|
||||
return tempValue;
|
||||
}
|
||||
|
||||
int AD7689_GetChannel(int ichan) {
|
||||
// filter channels val
|
||||
if (ichan < 0 || ichan >= AD7689_NUM_CHANNELS) {
|
||||
LOG(logERROR, ("Cannot get slow adc channel. "
|
||||
"%d out of bounds (0 to %d)\n",
|
||||
ichan, AD7689_NUM_CHANNELS - 1));
|
||||
return -1;
|
||||
}
|
||||
|
||||
AD7689_Set(
|
||||
// read back
|
||||
AD7689_CFG_RB_MSK |
|
||||
// disable sequencer (different from config)
|
||||
AD7689_CFG_SEQ_DSBLE_VAL |
|
||||
// Internal reference. REF = 2.5V buffered output. Temperature sensor
|
||||
// enabled.
|
||||
AD7689_CFG_REF_INT_2500MV_VAL |
|
||||
// full bandwidth of low pass filter
|
||||
AD7689_CFG_BW_FULL_VAL |
|
||||
// specific channel (different from config)
|
||||
((ichan << AD7689_CFG_IN_OFST) & AD7689_CFG_IN_MSK) |
|
||||
// input channel configuration (unipolar. inx to gnd)
|
||||
AD7689_CFG_INCC_UNPLR_IN_GND_VAL |
|
||||
// overwrite configuration
|
||||
AD7689_CFG_CFG_OVRWRTE_VAL);
|
||||
|
||||
int regval = AD7689_Get();
|
||||
|
||||
// value in uV
|
||||
int retval = ((double)(regval - 0) *
|
||||
(double)(AD7689_INT_REF_MAX_UV - AD7689_INT_REF_MIN_UV)) /
|
||||
(double)(AD7689_INT_MAX_STEPS - 0) +
|
||||
AD7689_INT_REF_MIN_UV;
|
||||
|
||||
/*ConvertToDifferentRange(0, AD7689_INT_MAX_STEPS,
|
||||
AD7689_INT_REF_MIN_MV, AD7689_INT_REF_MAX_MV,
|
||||
regval, &retval);*/
|
||||
|
||||
LOG(logINFO, ("\tvoltage read for chan %d: %d uV (regVal: %d)\n", ichan,
|
||||
retval, regval));
|
||||
return retval;
|
||||
}
|
||||
|
||||
void AD7689_Configure() {
|
||||
LOG(logINFOBLUE, ("Configuring AD7689 (Slow ADCs): \n"));
|
||||
|
||||
// from power up, 3 invalid conversions
|
||||
LOG(logINFO,
|
||||
("\tConfiguring %d x due to invalid conversions from power up\n",
|
||||
AD7689_NUM_INVALID_CONVERSIONS));
|
||||
for (int i = 0; i < AD7689_NUM_INVALID_CONVERSIONS; ++i) {
|
||||
AD7689_Set(
|
||||
// read back
|
||||
AD7689_CFG_RB_MSK |
|
||||
// scan sequence IN0-IN7 then temperature sensor
|
||||
AD7689_CFG_SEQ_SCN_WTH_TMP_VAL |
|
||||
// Internal reference. REF = 2.5V buffered output. Temperature
|
||||
// sensor enabled.
|
||||
AD7689_CFG_REF_INT_2500MV_VAL |
|
||||
// full bandwidth of low pass filter
|
||||
AD7689_CFG_BW_FULL_VAL |
|
||||
// scan upto channel 7
|
||||
AD7689_CFG_IN_MSK |
|
||||
// input channel configuration (unipolar. inx to gnd)
|
||||
AD7689_CFG_INCC_UNPLR_IN_GND_VAL |
|
||||
// overwrite configuration
|
||||
AD7689_CFG_CFG_OVRWRTE_VAL);
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user