moench settings (#774)

* moench settings

* default value for asic ctrl reg for moench
This commit is contained in:
2023-07-10 15:21:48 +02:00
committed by GitHub
parent 5be503c1bd
commit fe4db54eb6
10 changed files with 190 additions and 8 deletions

View File

@ -328,6 +328,88 @@
#define ASIC_CTRL_PARALLEL_RD_MSK (0x00000001 << ASIC_CTRL_PARALLEL_RD_OFST)
#define ASIC_CTRL_INTRFCE_CLK_PLRTY_OFST (1)
#define ASIC_CTRL_INTRFCE_CLK_PLRTY_MSK (0x00000001 << ASIC_CTRL_INTRFCE_CLK_PLRTY_OFST)
#define ASIC_CTRL_PULSETOP_OFST (4)
#define ASIC_CTRL_PULSETOP_MSK (0x00000001 << ASIC_CTRL_PULSETOP_OFST
#define ASIC_CTRL_PULSEBOT_OFST (5)
#define ASIC_CTRL_PULSEBOT_MSK (0x00000001 << ASIC_CTRL_PULSEBOT_OFST)
#define ASIC_CTRL_ENPRECHPREBOT_OFST (6)
#define ASIC_CTRL_ENPRECHPREBOT_MSK (0x00000001 << ASIC_CTRL_ENPRECHPREBOT_OFST)
#define ASIC_CTRL_DSG1_BOT_OFST (7)
#define ASIC_CTRL_DSG1_BOT_MSK (0x00000001 << ASIC_CTRL_DSG1_BOT_OFST)
#define ASIC_CTRL_BYPASSCDSBOT_OFST (8)
#define ASIC_CTRL_BYPASSCDSBOT_MSK (0x00000001 << ASIC_CTRL_BYPASSCDSBOT_OFST)
#define ASIC_CTRL_HG_BOT_OFST (9)
#define ASIC_CTRL_HG_BOT_MSK (0x00000001 << ASIC_CTRL_HG_BOT_OFST)
#define ASIC_CTRL_STO2TOP_OFST (10)
#define ASIC_CTRL_STO2TOP_MSK (0x00000001 << ASIC_CTRL_STO2TOP_OFST)
#define ASIC_CTRL_PRECHARGECONNECTBOT_OFST (11)
#define ASIC_CTRL_PRECHARGECONNECTBOT_MSK (0x00000001 << ASIC_CTRL_PRECHARGECONNECTBOT_OFST)
#define ASIC_CTRL_CONNCDSTOP_OFST (12)
#define ASIC_CTRL_CONNCDSTOP_MSK (0x00000001 << ASIC_CTRL_CONNCDSTOP_OFST)
#define ASIC_CTRL_BYPASSTOP_OFST (13)
#define ASIC_CTRL_BYPASSTOP_MSK (0x00000001 << ASIC_CTRL_BYPASSTOP_OFST)
#define ASIC_CTRL_STO1TOP_OFST (14)
#define ASIC_CTRL_STO1TOP_MSK (0x00000001 << ASIC_CTRL_STO1TOP_OFST)
#define ASIC_CTRL_DSG3_TOP_OFST (15)
#define ASIC_CTRL_DSG3_TOP_MSK (0x00000001 << ASIC_CTRL_DSG3_TOP_OFST)
#define ASIC_CTRL_S2DTESTEN_OFST (16)
#define ASIC_CTRL_S2DTESTEN_MSK (0x00000001 << ASIC_CTRL_S2DTESTEN_OFST)
#define ASIC_CTRL_BOTSRTESTBOT_OFST (17)
#define ASIC_CTRL_BOTSRTESTBOT_MSK (0x00000001 << ASIC_CTRL_BOTSRTESTBOT_OFST)
#define ASIC_CTRL_PRESETSSR_OFST (18)
#define ASIC_CTRL_PRESETSSR_MSK (0x00000001 << ASIC_CTRL_PRESETSSR_OFST)
#define ASIC_CTRL_PULSEOFFTOP_OFST (19)
#define ASIC_CTRL_PULSEOFFTOP_MSK (0x00000001 << ASIC_CTRL_PULSEOFFTOP_OFST)
#define ASIC_CTRL_PULSEOFFBOT_OFST (20)
#define ASIC_CTRL_PULSEOFFBOT_MSK (0x00000001 << ASIC_CTRL_PULSEOFFBOT_OFST)
#define ASIC_CTRL_CONNCDSBOT_OFST (21)
#define ASIC_CTRL_CONNCDSBOT_MSK (0x00000001 << ASIC_CTRL_CONNCDSBOT_OFST)
#define ASIC_CTRL_ENPRECHPRETOP_OFST (22)
#define ASIC_CTRL_ENPRECHPRETOP_MSK (0x00000001 << ASIC_CTRL_ENPRECHPRETOP_OFST)
#define ASIC_CTRL_BYPASSBOT_OFST (23)
#define ASIC_CTRL_BYPASSBOT_MSK (0x00000001 << ASIC_CTRL_BYPASSBOT_OFST)
#define ASIC_CTRL_DSG1_TOP_OFST (24)
#define ASIC_CTRL_DSG1_TOP_MSK (0x00000001 << ASIC_CTRL_DSG1_TOP_OFST)
#define ASIC_CTRL_STO1BOT_OFST (25)
#define ASIC_CTRL_STO1BOT_MSK (0x00000001 << ASIC_CTRL_STO1BOT_OFST)
#define ASIC_CTRL_BYPASSCDSTOP_OFST (26)
#define ASIC_CTRL_BYPASSCDSTOP_MSK (0x00000001 << ASIC_CTRL_BYPASSCDSTOP_OFST)
#define ASIC_CTRL_DSG3_BOT_OFST (27)
#define ASIC_CTRL_DSG3_BOT_MSK (0x00000001 << ASIC_CTRL_DSG3_BOT_OFST)
#define ASIC_CTRL_HG_TOP_OFST (28)
#define ASIC_CTRL_HG_TOP_MSK (0x00000001 << ASIC_CTRL_HG_TOP_OFST)
#define ASIC_CTRL_STO2BOT_OFST (29)
#define ASIC_CTRL_STO2BOT_MSK (0x00000001 << ASIC_CTRL_STO2BOT_OFST)
#define ASIC_CTRL_PRECHARGECONNECTTOP_OFST (30)
#define ASIC_CTRL_PRECHARGECONNECTTOP_MSK (0x00000001 << ASIC_CTRL_PRECHARGECONNECTTOP_OFST)
#define ASIC_CTRL_BOTSRTESTTOP_OFST (31)
#define ASIC_CTRL_BOTSRTESTTOP_MSK (0x00000001 << ASIC_CTRL_BOTSRTESTTOP_OFST)
#define ASIC_CTRL_DEFAULT_VAL (ASIC_CTRL_INTRFCE_CLK_PLRTY_MSK | ASIC_CTRL_DSG1_BOT_MSK | \
ASIC_CTRL_HG_BOT_MSK | ASIC_CTRL_STO2TOP_MSK | \
ASIC_CTRL_CONNCDSTOP_MSK | ASIC_CTRL_STO1TOP_MSK | \
ASIC_CTRL_BOTSRTESTBOT_MSK | ASIC_CTRL_PULSEOFFTOP_MSK | \
ASIC_CTRL_PULSEOFFBOT_MSK | ASIC_CTRL_CONNCDSBOT_MSK | \
ASIC_CTRL_DSG1_TOP_MSK | ASIC_CTRL_STO1BOT_MSK | \
ASIC_CTRL_HG_TOP_MSK | ASIC_CTRL_STO2BOT_MSK | \
ASIC_CTRL_BOTSRTESTTOP_MSK)
#define ASIC_CTRL_HG_MSK (ASIC_CTRL_HG_TOP_MSK | ASIC_CTRL_HG_BOT_MSK)
#define ASIC_CTRL_DSG1_MSK (ASIC_CTRL_DSG1_TOP_MSK | ASIC_CTRL_DSG1_BOT_MSK)
#define ASIC_CTRL_DSG3_MSK (ASIC_CTRL_DSG3_TOP_MSK | ASIC_CTRL_DSG3_BOT_MSK)
#define SETTINGS_MSK (ASIC_CTRL_HG_MSK | ASIC_CTRL_DSG1_MSK | ASIC_CTRL_DSG3_MSK)
#define SETTINGS_G1_HG (ASIC_CTRL_HG_MSK | ASIC_CTRL_DSG3_MSK)
#define SETTINGS_G1_LG (ASIC_CTRL_DSG3_MSK)
#define SETTINGS_G2_HC_HG (ASIC_CTRL_HG_MSK)
#define SETTINGS_G2_HC_LG (0)
#define SETTINGS_G2_LC_HG (ASIC_CTRL_HG_MSK | ASIC_CTRL_DSG1_MSK | ASIC_CTRL_DSG3_MSK)
#define SETTINGS_G2_LC_LG (ASIC_CTRL_DSG1_MSK | ASIC_CTRL_DSG3_MSK)
#define SETTINGS_G4_HG (ASIC_CTRL_HG_MSK | ASIC_CTRL_DSG1_MSK)
#define SETTINGS_G4_LG (ASIC_CTRL_DSG1_MSK)
/* ADC 0 Deserializer Control */
#define ADC_DSRLZR_0_REG (0xF0 << MEM_MAP_SHIFT)

View File

@ -489,11 +489,13 @@ void setupDetector() {
// delay
bus_w(ADC_PORT_INVERT_REG, ADC_PORT_INVERT_VAL);
// default asic
bus_w(ASIC_CTRL_REG, ASIC_CTRL_DEFAULT_VAL);
initReadoutConfiguration();
// Initialization of acquistion parameters
// setSettings(DEFAULT_SETTINGS);
setSettings(DEFAULT_SETTINGS);
setNumFrames(DEFAULT_NUM_FRAMES);
setNumTriggers(DEFAULT_NUM_CYCLES);
setExpTime(DEFAULT_EXPTIME);
@ -816,18 +818,87 @@ enum detectorSettings setSettings(enum detectorSettings sett) {
if (sett == UNINITIALIZED)
return thisSettings;
uint32_t mask = 0;
// set settings
switch (sett) {
case G1_HIGHGAIN:
LOG(logINFOBLUE, ("Settinng settings to g1 hg\n"))
mask = SETTINGS_G1_HG;
break;
case G1_LOWGAIN:
LOG(logINFOBLUE, ("Settinng settings to g1 lg\n"))
mask = SETTINGS_G1_LG;
break;
case G2_HIGHCAP_HIGHGAIN:
LOG(logINFOBLUE, ("Settinng settings to g2 hc hg\n"))
mask = SETTINGS_G2_HC_HG;
break;
case G2_HIGHCAP_LOWGAIN:
LOG(logINFOBLUE, ("Settinng settings to g2 hc lg\n"))
mask = SETTINGS_G2_HC_LG;
break;
case G2_LOWCAP_HIGHGAIN:
LOG(logINFOBLUE, ("Settinng settings to g2 lc_hg\n"))
mask = SETTINGS_G2_LC_HG;
break;
case G2_LOWCAP_LOWGAIN:
LOG(logINFOBLUE, ("Settinng settings to g2 lc lg\n"))
mask = SETTINGS_G2_LC_LG;
break;
case G4_HIGHGAIN:
LOG(logINFOBLUE, ("Settinng settings to g4 hg\n"))
mask = SETTINGS_G4_HG;
break;
case G4_LOWGAIN:
LOG(logINFOBLUE, ("Settinng settings to g4 lg\n"))
mask = SETTINGS_G4_LG;
break;
default:
LOG(logERROR, ("This settings %d is not defined\n", (int)sett));
return -1;
}
uint32_t addr = ASIC_CTRL_REG;
bus_w(addr, bus_r(addr) & ~SETTINGS_MSK);
bus_w(addr, bus_r(addr) | mask);
thisSettings = sett;
return getSettings();
}
enum detectorSettings getSettings() { return UNDEFINED; }
enum detectorSettings getSettings() {
uint32_t regval = bus_r(ASIC_CTRL_REG) & SETTINGS_MSK;
switch (regval) {
case SETTINGS_G1_HG:
thisSettings = G1_HIGHGAIN;
break;
case SETTINGS_G1_LG:
thisSettings = G1_LOWGAIN;
break;
case SETTINGS_G2_HC_HG:
thisSettings = G2_HIGHCAP_HIGHGAIN;
break;
case SETTINGS_G2_HC_LG:
thisSettings = G2_HIGHCAP_LOWGAIN;
break;
case SETTINGS_G2_LC_HG:
thisSettings = G2_LOWCAP_HIGHGAIN;
break;
case SETTINGS_G2_LC_LG:
thisSettings = G2_LOWCAP_LOWGAIN;
break;
case SETTINGS_G4_HG:
thisSettings = G4_HIGHGAIN;
break;
case SETTINGS_G4_LG:
thisSettings = G4_LOWGAIN;
break;
default:
thisSettings = UNDEFINED;
break;
}
return thisSettings;
}
/* parameters - dac, adc, hv */
void setDAC(enum DACINDEX ind, int val, int mV) {

View File

@ -37,7 +37,7 @@
#define DEFAULT_DELAY (0)
#define DEFAULT_HIGH_VOLTAGE (0)
#define DEFAULT_TIMING_MODE (AUTO_TIMING)
#define DEFAULT_SETTINGS (GAIN0)
#define DEFAULT_SETTINGS (G4_HIGHGAIN)
#define DEFAULT_TX_UDP_PORT (0x7e9a)
#define DEFAULT_TMP_THRSHLD (65 * 1000) // milli degree Celsius
#define DEFAULT_FLIP_ROWS (0)

View File

@ -1734,7 +1734,7 @@ void validate_settings(enum detectorSettings sett) {
switch (sett) {
#ifdef EIGERD
case STANDARD:
#elif defined(JUNGFRAUD)
#elif JUNGFRAUD
case GAIN0:
case HIGHGAIN0:
#elif GOTTHARDD
@ -1751,6 +1751,15 @@ void validate_settings(enum detectorSettings sett) {
case STANDARD:
case FAST:
case HIGHGAIN:
#elif MOENCHD
case G1_HIGHGAIN:
case G1_LOWGAIN:
case G2_HIGHCAP_HIGHGAIN:
case G2_HIGHCAP_LOWGAIN:
case G2_LOWCAP_HIGHGAIN:
case G2_LOWCAP_LOWGAIN:
case G4_HIGHGAIN:
case G4_LOWGAIN:
#endif
break;
default: