mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-06-23 10:07:59 +02:00
moench settings (#774)
* moench settings * default value for asic ctrl reg for moench
This commit is contained in:
@ -328,6 +328,88 @@
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#define ASIC_CTRL_PARALLEL_RD_MSK (0x00000001 << ASIC_CTRL_PARALLEL_RD_OFST)
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#define ASIC_CTRL_INTRFCE_CLK_PLRTY_OFST (1)
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#define ASIC_CTRL_INTRFCE_CLK_PLRTY_MSK (0x00000001 << ASIC_CTRL_INTRFCE_CLK_PLRTY_OFST)
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#define ASIC_CTRL_PULSETOP_OFST (4)
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#define ASIC_CTRL_PULSETOP_MSK (0x00000001 << ASIC_CTRL_PULSETOP_OFST
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#define ASIC_CTRL_PULSEBOT_OFST (5)
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#define ASIC_CTRL_PULSEBOT_MSK (0x00000001 << ASIC_CTRL_PULSEBOT_OFST)
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#define ASIC_CTRL_ENPRECHPREBOT_OFST (6)
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#define ASIC_CTRL_ENPRECHPREBOT_MSK (0x00000001 << ASIC_CTRL_ENPRECHPREBOT_OFST)
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#define ASIC_CTRL_DSG1_BOT_OFST (7)
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#define ASIC_CTRL_DSG1_BOT_MSK (0x00000001 << ASIC_CTRL_DSG1_BOT_OFST)
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#define ASIC_CTRL_BYPASSCDSBOT_OFST (8)
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#define ASIC_CTRL_BYPASSCDSBOT_MSK (0x00000001 << ASIC_CTRL_BYPASSCDSBOT_OFST)
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#define ASIC_CTRL_HG_BOT_OFST (9)
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#define ASIC_CTRL_HG_BOT_MSK (0x00000001 << ASIC_CTRL_HG_BOT_OFST)
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#define ASIC_CTRL_STO2TOP_OFST (10)
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#define ASIC_CTRL_STO2TOP_MSK (0x00000001 << ASIC_CTRL_STO2TOP_OFST)
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#define ASIC_CTRL_PRECHARGECONNECTBOT_OFST (11)
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#define ASIC_CTRL_PRECHARGECONNECTBOT_MSK (0x00000001 << ASIC_CTRL_PRECHARGECONNECTBOT_OFST)
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#define ASIC_CTRL_CONNCDSTOP_OFST (12)
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#define ASIC_CTRL_CONNCDSTOP_MSK (0x00000001 << ASIC_CTRL_CONNCDSTOP_OFST)
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#define ASIC_CTRL_BYPASSTOP_OFST (13)
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#define ASIC_CTRL_BYPASSTOP_MSK (0x00000001 << ASIC_CTRL_BYPASSTOP_OFST)
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#define ASIC_CTRL_STO1TOP_OFST (14)
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#define ASIC_CTRL_STO1TOP_MSK (0x00000001 << ASIC_CTRL_STO1TOP_OFST)
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#define ASIC_CTRL_DSG3_TOP_OFST (15)
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#define ASIC_CTRL_DSG3_TOP_MSK (0x00000001 << ASIC_CTRL_DSG3_TOP_OFST)
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#define ASIC_CTRL_S2DTESTEN_OFST (16)
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#define ASIC_CTRL_S2DTESTEN_MSK (0x00000001 << ASIC_CTRL_S2DTESTEN_OFST)
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#define ASIC_CTRL_BOTSRTESTBOT_OFST (17)
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#define ASIC_CTRL_BOTSRTESTBOT_MSK (0x00000001 << ASIC_CTRL_BOTSRTESTBOT_OFST)
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#define ASIC_CTRL_PRESETSSR_OFST (18)
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#define ASIC_CTRL_PRESETSSR_MSK (0x00000001 << ASIC_CTRL_PRESETSSR_OFST)
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#define ASIC_CTRL_PULSEOFFTOP_OFST (19)
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#define ASIC_CTRL_PULSEOFFTOP_MSK (0x00000001 << ASIC_CTRL_PULSEOFFTOP_OFST)
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#define ASIC_CTRL_PULSEOFFBOT_OFST (20)
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#define ASIC_CTRL_PULSEOFFBOT_MSK (0x00000001 << ASIC_CTRL_PULSEOFFBOT_OFST)
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#define ASIC_CTRL_CONNCDSBOT_OFST (21)
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#define ASIC_CTRL_CONNCDSBOT_MSK (0x00000001 << ASIC_CTRL_CONNCDSBOT_OFST)
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#define ASIC_CTRL_ENPRECHPRETOP_OFST (22)
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#define ASIC_CTRL_ENPRECHPRETOP_MSK (0x00000001 << ASIC_CTRL_ENPRECHPRETOP_OFST)
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#define ASIC_CTRL_BYPASSBOT_OFST (23)
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#define ASIC_CTRL_BYPASSBOT_MSK (0x00000001 << ASIC_CTRL_BYPASSBOT_OFST)
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#define ASIC_CTRL_DSG1_TOP_OFST (24)
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#define ASIC_CTRL_DSG1_TOP_MSK (0x00000001 << ASIC_CTRL_DSG1_TOP_OFST)
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#define ASIC_CTRL_STO1BOT_OFST (25)
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#define ASIC_CTRL_STO1BOT_MSK (0x00000001 << ASIC_CTRL_STO1BOT_OFST)
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#define ASIC_CTRL_BYPASSCDSTOP_OFST (26)
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#define ASIC_CTRL_BYPASSCDSTOP_MSK (0x00000001 << ASIC_CTRL_BYPASSCDSTOP_OFST)
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#define ASIC_CTRL_DSG3_BOT_OFST (27)
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#define ASIC_CTRL_DSG3_BOT_MSK (0x00000001 << ASIC_CTRL_DSG3_BOT_OFST)
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#define ASIC_CTRL_HG_TOP_OFST (28)
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#define ASIC_CTRL_HG_TOP_MSK (0x00000001 << ASIC_CTRL_HG_TOP_OFST)
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#define ASIC_CTRL_STO2BOT_OFST (29)
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#define ASIC_CTRL_STO2BOT_MSK (0x00000001 << ASIC_CTRL_STO2BOT_OFST)
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#define ASIC_CTRL_PRECHARGECONNECTTOP_OFST (30)
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#define ASIC_CTRL_PRECHARGECONNECTTOP_MSK (0x00000001 << ASIC_CTRL_PRECHARGECONNECTTOP_OFST)
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#define ASIC_CTRL_BOTSRTESTTOP_OFST (31)
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#define ASIC_CTRL_BOTSRTESTTOP_MSK (0x00000001 << ASIC_CTRL_BOTSRTESTTOP_OFST)
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#define ASIC_CTRL_DEFAULT_VAL (ASIC_CTRL_INTRFCE_CLK_PLRTY_MSK | ASIC_CTRL_DSG1_BOT_MSK | \
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ASIC_CTRL_HG_BOT_MSK | ASIC_CTRL_STO2TOP_MSK | \
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ASIC_CTRL_CONNCDSTOP_MSK | ASIC_CTRL_STO1TOP_MSK | \
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ASIC_CTRL_BOTSRTESTBOT_MSK | ASIC_CTRL_PULSEOFFTOP_MSK | \
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ASIC_CTRL_PULSEOFFBOT_MSK | ASIC_CTRL_CONNCDSBOT_MSK | \
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ASIC_CTRL_DSG1_TOP_MSK | ASIC_CTRL_STO1BOT_MSK | \
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ASIC_CTRL_HG_TOP_MSK | ASIC_CTRL_STO2BOT_MSK | \
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ASIC_CTRL_BOTSRTESTTOP_MSK)
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#define ASIC_CTRL_HG_MSK (ASIC_CTRL_HG_TOP_MSK | ASIC_CTRL_HG_BOT_MSK)
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#define ASIC_CTRL_DSG1_MSK (ASIC_CTRL_DSG1_TOP_MSK | ASIC_CTRL_DSG1_BOT_MSK)
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#define ASIC_CTRL_DSG3_MSK (ASIC_CTRL_DSG3_TOP_MSK | ASIC_CTRL_DSG3_BOT_MSK)
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#define SETTINGS_MSK (ASIC_CTRL_HG_MSK | ASIC_CTRL_DSG1_MSK | ASIC_CTRL_DSG3_MSK)
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#define SETTINGS_G1_HG (ASIC_CTRL_HG_MSK | ASIC_CTRL_DSG3_MSK)
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#define SETTINGS_G1_LG (ASIC_CTRL_DSG3_MSK)
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#define SETTINGS_G2_HC_HG (ASIC_CTRL_HG_MSK)
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#define SETTINGS_G2_HC_LG (0)
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#define SETTINGS_G2_LC_HG (ASIC_CTRL_HG_MSK | ASIC_CTRL_DSG1_MSK | ASIC_CTRL_DSG3_MSK)
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#define SETTINGS_G2_LC_LG (ASIC_CTRL_DSG1_MSK | ASIC_CTRL_DSG3_MSK)
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#define SETTINGS_G4_HG (ASIC_CTRL_HG_MSK | ASIC_CTRL_DSG1_MSK)
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#define SETTINGS_G4_LG (ASIC_CTRL_DSG1_MSK)
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/* ADC 0 Deserializer Control */
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#define ADC_DSRLZR_0_REG (0xF0 << MEM_MAP_SHIFT)
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Binary file not shown.
@ -489,11 +489,13 @@ void setupDetector() {
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// delay
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bus_w(ADC_PORT_INVERT_REG, ADC_PORT_INVERT_VAL);
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// default asic
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bus_w(ASIC_CTRL_REG, ASIC_CTRL_DEFAULT_VAL);
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initReadoutConfiguration();
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// Initialization of acquistion parameters
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// setSettings(DEFAULT_SETTINGS);
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setSettings(DEFAULT_SETTINGS);
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setNumFrames(DEFAULT_NUM_FRAMES);
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setNumTriggers(DEFAULT_NUM_CYCLES);
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setExpTime(DEFAULT_EXPTIME);
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@ -816,18 +818,87 @@ enum detectorSettings setSettings(enum detectorSettings sett) {
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if (sett == UNINITIALIZED)
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return thisSettings;
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uint32_t mask = 0;
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// set settings
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switch (sett) {
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case G1_HIGHGAIN:
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LOG(logINFOBLUE, ("Settinng settings to g1 hg\n"))
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mask = SETTINGS_G1_HG;
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break;
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case G1_LOWGAIN:
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LOG(logINFOBLUE, ("Settinng settings to g1 lg\n"))
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mask = SETTINGS_G1_LG;
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break;
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case G2_HIGHCAP_HIGHGAIN:
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LOG(logINFOBLUE, ("Settinng settings to g2 hc hg\n"))
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mask = SETTINGS_G2_HC_HG;
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break;
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case G2_HIGHCAP_LOWGAIN:
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LOG(logINFOBLUE, ("Settinng settings to g2 hc lg\n"))
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mask = SETTINGS_G2_HC_LG;
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break;
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case G2_LOWCAP_HIGHGAIN:
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LOG(logINFOBLUE, ("Settinng settings to g2 lc_hg\n"))
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mask = SETTINGS_G2_LC_HG;
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break;
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case G2_LOWCAP_LOWGAIN:
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LOG(logINFOBLUE, ("Settinng settings to g2 lc lg\n"))
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mask = SETTINGS_G2_LC_LG;
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break;
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case G4_HIGHGAIN:
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LOG(logINFOBLUE, ("Settinng settings to g4 hg\n"))
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mask = SETTINGS_G4_HG;
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break;
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case G4_LOWGAIN:
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LOG(logINFOBLUE, ("Settinng settings to g4 lg\n"))
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mask = SETTINGS_G4_LG;
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break;
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default:
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LOG(logERROR, ("This settings %d is not defined\n", (int)sett));
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return -1;
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}
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uint32_t addr = ASIC_CTRL_REG;
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bus_w(addr, bus_r(addr) & ~SETTINGS_MSK);
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bus_w(addr, bus_r(addr) | mask);
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thisSettings = sett;
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return getSettings();
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}
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enum detectorSettings getSettings() { return UNDEFINED; }
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enum detectorSettings getSettings() {
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uint32_t regval = bus_r(ASIC_CTRL_REG) & SETTINGS_MSK;
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switch (regval) {
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case SETTINGS_G1_HG:
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thisSettings = G1_HIGHGAIN;
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break;
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case SETTINGS_G1_LG:
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thisSettings = G1_LOWGAIN;
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break;
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case SETTINGS_G2_HC_HG:
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thisSettings = G2_HIGHCAP_HIGHGAIN;
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break;
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case SETTINGS_G2_HC_LG:
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thisSettings = G2_HIGHCAP_LOWGAIN;
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break;
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case SETTINGS_G2_LC_HG:
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thisSettings = G2_LOWCAP_HIGHGAIN;
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break;
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case SETTINGS_G2_LC_LG:
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thisSettings = G2_LOWCAP_LOWGAIN;
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break;
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case SETTINGS_G4_HG:
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thisSettings = G4_HIGHGAIN;
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break;
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case SETTINGS_G4_LG:
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thisSettings = G4_LOWGAIN;
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break;
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default:
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thisSettings = UNDEFINED;
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break;
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}
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return thisSettings;
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}
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/* parameters - dac, adc, hv */
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void setDAC(enum DACINDEX ind, int val, int mV) {
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@ -37,7 +37,7 @@
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#define DEFAULT_DELAY (0)
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#define DEFAULT_HIGH_VOLTAGE (0)
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#define DEFAULT_TIMING_MODE (AUTO_TIMING)
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#define DEFAULT_SETTINGS (GAIN0)
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#define DEFAULT_SETTINGS (G4_HIGHGAIN)
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#define DEFAULT_TX_UDP_PORT (0x7e9a)
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#define DEFAULT_TMP_THRSHLD (65 * 1000) // milli degree Celsius
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#define DEFAULT_FLIP_ROWS (0)
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@ -1734,7 +1734,7 @@ void validate_settings(enum detectorSettings sett) {
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switch (sett) {
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#ifdef EIGERD
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case STANDARD:
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#elif defined(JUNGFRAUD)
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#elif JUNGFRAUD
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case GAIN0:
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case HIGHGAIN0:
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#elif GOTTHARDD
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@ -1751,6 +1751,15 @@ void validate_settings(enum detectorSettings sett) {
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case STANDARD:
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case FAST:
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case HIGHGAIN:
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#elif MOENCHD
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case G1_HIGHGAIN:
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case G1_LOWGAIN:
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case G2_HIGHCAP_HIGHGAIN:
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case G2_HIGHCAP_LOWGAIN:
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case G2_LOWCAP_HIGHGAIN:
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case G2_LOWCAP_LOWGAIN:
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case G4_HIGHGAIN:
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case G4_LOWGAIN:
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#endif
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break;
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default:
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