ctb: allowing adc enable for 10g to be 0, romode changing bit from disable analog to enable analog, removing matterhorn specific (#789)

This commit is contained in:
maliakal_d 2023-07-25 10:33:18 +02:00 committed by GitHub
parent c9dfa408db
commit d5ce03918c
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GPG Key ID: 4AEE18F83AFDEB23
5 changed files with 18 additions and 41 deletions

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@ -316,8 +316,8 @@
#define CONFIG_LED_DSBL_OFST (0)
#define CONFIG_LED_DSBL_MSK (0x00000001 << CONFIG_LED_DSBL_OFST)
#define CONFIG_DSBL_ANLG_OTPT_OFST (8)
#define CONFIG_DSBL_ANLG_OTPT_MSK (0x00000001 << CONFIG_DSBL_ANLG_OTPT_OFST)
#define CONFIG_ENBLE_ANLG_OTPT_OFST (8)
#define CONFIG_ENBLE_ANLG_OTPT_MSK (0x00000001 << CONFIG_ENBLE_ANLG_OTPT_OFST)
#define CONFIG_ENBLE_DGTL_OTPT_OFST (9)
#define CONFIG_ENBLE_DGTL_OTPT_MSK (0x00000001 << CONFIG_ENBLE_DGTL_OTPT_OFST)
#define CONFIG_ENBLE_TRNSCVR_OTPT_OFST (10)

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@ -785,20 +785,14 @@ int setADCEnableMask(uint32_t mask) {
uint32_t getADCEnableMask() { return adcEnableMask_1g; }
void setADCEnableMask_10G(uint32_t mask) {
if (mask == 0u) {
LOG(logERROR, ("Cannot set 10gb adc mask to 0\n"));
return;
}
// convert 32 bit mask to 8 bit mask
uint8_t actualMask = 0;
if (mask != 0) {
int ival = 0;
for (int ich = 0; ich < NCHAN_ANALOG; ich = ich + 4) {
if ((1 << ich) & mask) {
actualMask |= (1 << ival);
}
++ival;
int ival = 0;
for (int ich = 0; ich < NCHAN_ANALOG; ich = ich + 4) {
if ((1 << ich) & mask) {
actualMask |= (1 << ival);
}
++ival;
}
LOG(logINFO, ("Setting adcEnableMask 10G to 0x%x (from 0x%08x)\n",
@ -919,15 +913,15 @@ int setReadoutMode(enum readoutMode mode) {
uint32_t addr = CONFIG_REG;
uint32_t addr_readout_10g = READOUT_10G_ENABLE_REG;
bus_w(addr, (bus_r(addr) | CONFIG_DSBL_ANLG_OTPT_MSK) &
(~CONFIG_ENBLE_DGTL_OTPT_MSK) &
(~CONFIG_ENBLE_TRNSCVR_OTPT_MSK));
bus_w(addr,
(bus_r(addr) & (~CONFIG_ENBLE_ANLG_OTPT_MSK) &
(~CONFIG_ENBLE_DGTL_OTPT_MSK) & (~CONFIG_ENBLE_TRNSCVR_OTPT_MSK)));
bus_w(addr_readout_10g, bus_r(addr_readout_10g) &
(~READOUT_10G_ENABLE_ANLG_MSK) &
~(READOUT_10G_ENABLE_DGTL_MSK) &
~(READOUT_10G_ENABLE_TRNSCVR_MSK));
if (analogEnable) {
bus_w(addr, bus_r(addr) & ~(CONFIG_DSBL_ANLG_OTPT_MSK));
bus_w(addr, bus_r(addr) | (CONFIG_ENBLE_ANLG_OTPT_MSK));
bus_w(addr_readout_10g,
bus_r(addr_readout_10g) |
((adcEnableMask_10g << READOUT_10G_ENABLE_ANLG_OFST) &
@ -2240,16 +2234,6 @@ int startStateMachine() {
LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG)));
// TODO: Temporary Matternhorn Specific ( will be moved to the pattern )
if (transceiverEnable) {
uint32_t addr = 0x202 << MEM_MAP_SHIFT;
bus_w(addr, bus_r(addr) | (1 << 1));
LOG(logINFOBLUE, ("Writing 1 to reg 0x202\n"))
usleep(1);
cleanFifos();
usleep(1);
}
return OK;
}

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@ -4345,22 +4345,15 @@ int set_adc_enable_mask_10g(int file_des) {
#else
// only set
if (Server_VerifyLock() == OK) {
if (arg == 0u) {
setADCEnableMask_10G(arg);
uint32_t retval = getADCEnableMask_10G();
if (arg != retval) {
ret = FAIL;
sprintf(mess,
"Not allowed to set adc mask of 0 due to data readout \n");
"Could not set 10Gb ADC Enable mask. Set 0x%x, but "
"read 0x%x\n",
arg, retval);
LOG(logERROR, (mess));
} else {
setADCEnableMask_10G(arg);
uint32_t retval = getADCEnableMask_10G();
if (arg != retval) {
ret = FAIL;
sprintf(mess,
"Could not set 10Gb ADC Enable mask. Set 0x%x, but "
"read 0x%x\n",
arg, retval);
LOG(logERROR, (mess));
}
}
}
#endif

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@ -7,7 +7,7 @@
#define APIEIGER "developer 0x230525"
#define APIGOTTHARD "developer 0x230615"
#define APIGOTTHARD2 "developer 0x230615"
#define APICTB "developer 0x230629"
#define APIMYTHEN3 "developer 0x230621"
#define APIMOENCH "developer 0x230707"
#define APIJUNGFRAU "developer 0x230720"
#define APICTB "developer 0x230720"