Moench dacs defaults (#788)

* merge fix from 7.0.2: new jungfrau fw versions, incremented binary, hdf5 and json versions

* moench: changed dac names and default values to old moench values

* moench: remove interface clk polarity at start up

* moench: default speed is half speed, default values for adc offset and adc phase for different speeds (only half speed confirmed), adc vref voltage to 2.0 like G1

* moench: connected adc pipeline to client

* moench: receiver- default frames per file is 100k and discard partial frames as default

* moench binary in

* using tostring in gui for dacs

* moved frame discard policy as a parameter to be configured with a default depending on detector

* moench: 300 degrees for adc phase in full speed
This commit is contained in:
2023-07-31 14:02:30 +02:00
committed by GitHub
parent 565858b6c6
commit 1873cc9310
29 changed files with 260 additions and 502 deletions

View File

@ -385,7 +385,7 @@
#define ASIC_CTRL_BOTSRTESTTOP_OFST (31)
#define ASIC_CTRL_BOTSRTESTTOP_MSK (0x00000001 << ASIC_CTRL_BOTSRTESTTOP_OFST)
#define ASIC_CTRL_DEFAULT_VAL (ASIC_CTRL_INTRFCE_CLK_PLRTY_MSK | ASIC_CTRL_DSG1_BOT_MSK | \
#define ASIC_CTRL_DEFAULT_VAL (ASIC_CTRL_DSG1_BOT_MSK | \
ASIC_CTRL_HG_BOT_MSK | ASIC_CTRL_STO2TOP_MSK | \
ASIC_CTRL_CONNCDSTOP_MSK | ASIC_CTRL_STO1TOP_MSK | \
ASIC_CTRL_BOTSRTESTBOT_MSK | ASIC_CTRL_PULSEOFFTOP_MSK | \

View File

@ -1382,6 +1382,16 @@ int *getDetectorPosition() { return detPos; }
/* moench specific - powerchip, clockdiv, pll,
* flashing fpga */
void setADCPipeline(int val) {
if (val < 0) {
return;
}
LOG(logINFO, ("Setting adc pipeline to %d\n", val));
bus_w(ADC_OFST_REG, val);
}
int getADCPipeline() { return bus_r(ADC_OFST_REG); }
int setReadNRows(int value) {
if (value < 0 || (value % READ_N_ROWS_MULTIPLE != 0)) {
LOG(logERROR, ("Invalid number of rows %d\n", value));
@ -1492,6 +1502,8 @@ int setReadoutSpeed(int val) {
uint32_t config = 0;
uint32_t sampleAdcDecimationFactor = 0;
int adcPhase = 0;
int adcOffset = 0;
switch (val) {
@ -1500,13 +1512,17 @@ int setReadoutSpeed(int val) {
config = CONFIG_FULL_SPEED_40MHZ_VAL;
sampleAdcDecimationFactor = ADC_DECMT_FULL_SPEED
<< SAMPLE_ADC_DECMT_FACTOR_OFST;
adcOffset = ADC_OFST_FULL_SPEED;
adcPhase = ADC_PHASE_DEG_FULL_SPEED;
break;
case HALF_SPEED:
LOG(logINFO, ("Setting Speed Speed (20 MHz):\n"));
LOG(logINFO, ("Setting Half Speed (20 MHz):\n"));
config = CONFIG_HALF_SPEED_20MHZ_VAL;
sampleAdcDecimationFactor = ADC_DECMT_HALF_SPEED
<< SAMPLE_ADC_DECMT_FACTOR_OFST;
adcOffset = ADC_OFST_HALF_SPEED;
adcPhase = ADC_PHASE_DEG_HALF_SPEED;
break;
case QUARTER_SPEED:
@ -1514,6 +1530,8 @@ int setReadoutSpeed(int val) {
config = CONFIG_QUARTER_SPEED_10MHZ_VAL;
sampleAdcDecimationFactor = ADC_DECMT_QUARTER_SPEED
<< SAMPLE_ADC_DECMT_FACTOR_OFST;
adcOffset = ADC_OFST_QUARTER_SPEED;
adcPhase = ADC_PHASE_DEG_QUARTER_SPEED;
break;
default:
@ -1529,7 +1547,13 @@ int setReadoutSpeed(int val) {
bus_w(SAMPLE_REG, bus_r(SAMPLE_REG) | sampleAdcDecimationFactor);
LOG(logINFO, ("\tSet Sample Reg to 0x%x\n", bus_r(SAMPLE_REG)));
// TODO: adcofst, adcphase?
setADCPipeline(adcOffset);
LOG(logINFO, ("\tSet ADC offset to 0x%x (%d)\n", getADCPipeline(),
getADCPipeline()));
setPhase(ADC_CLK, adcPhase, 1);
LOG(logINFO, ("\tSet ADC Phase to %d degrees\n", adcPhase));
return OK;
}

View File

@ -41,7 +41,7 @@
#define DEFAULT_TX_UDP_PORT (0x7e9a)
#define DEFAULT_TMP_THRSHLD (65 * 1000) // milli degree Celsius
#define DEFAULT_FLIP_ROWS (0)
#define DEFAULT_SPEED (FULL_SPEED)
#define DEFAULT_SPEED (HALF_SPEED)
#define DEFAULT_PARALLEL_ENABLE (0)
#define HIGHVOLTAGE_MIN (60)
@ -69,13 +69,19 @@
#define ADC_DECMT_HALF_SPEED (0x1)
#define ADC_DECMT_FULL_SPEED (0x0)
#define ADC_PHASE_DEG_QUARTER_SPEED (0)
#define ADC_PHASE_DEG_HALF_SPEED (0)
#define ADC_PHASE_DEG_FULL_SPEED (300)
#define ADC_OFST_QUARTER_SPEED (0x12)
#define ADC_OFST_HALF_SPEED (0x12)
#define ADC_OFST_FULL_SPEED (0x12)
// pipeline
#define ADC_PORT_INVERT_VAL (0x55555555)
#define SAMPLE_ADC_FULL_SPEED \
(SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL) // 0x0
#define ADC_PHASE_DEG_FULL_SPEED (140)
#define ADC_OFST_FULL_SPEED_VAL (0xf)
/* Struct Definitions */
typedef struct udp_header_struct {
@ -107,29 +113,29 @@ typedef struct udp_header_struct {
/* Enums */
enum ADCINDEX { TEMP_FPGA, TEMP_ADC };
enum DACINDEX {
J_VB_COMP,
J_VDD_PROT,
J_VIN_COM,
J_VREF_PRECH,
J_VB_PIXBUF,
J_VB_DS,
J_VREF_DS,
J_VREF_COMP
MO_VBP_COLBUF,
MO_VIPRE,
MO_VIN_CM,
MO_VB_SDA,
MO_VCASC_SFP,
MO_VOUT_CM,
MO_VIPRE_CDS,
MO_IBIAS_SFP
};
#define DAC_NAMES \
"vb_comp", "vdd_prot", "vin_com", "vref_prech", "vb_pixbuf", "vb_ds", \
"vref_ds", "vref_comp"
"vbp_colbuf", "vipre", "vin_cm", "vb_sda", "vcasc_sfp", "vout_cm", \
"vipre_cds", "ibias_sfp"
#define DEFAULT_DAC_VALS \
{ \
1220, /* J_VB_COMP */ \
3000, /* J_VDD_PROT */ \
1053, /* J_VIN_COM */ \
1450, /* J_VREF_PRECH */ \
750, /* J_VB_PIXBUF */ \
1000, /* J_VB_DS */ \
480, /* J_VREF_DS */ \
420 /* J_VREF_COMP */ \
1300, /* MO_VBP_COLBUF */ \
1000, /* MO_VIPRE */ \
1400, /* MO_VIN_CM */ \
680, /* MO_VB_SDA */ \
1428, /* MO_VCASC_SFP */ \
1200, /* MO_VOUT_CM */ \
800, /* MO_VIPRE_CDS */ \
900 /* MO_IBIAS_SFP */ \
};
enum MASTERINDEX { MASTER_HARDWARE, OW_MASTER, OW_SLAVE };

View File

@ -508,9 +508,6 @@ int getFrequency(enum CLKINDEX ind);
void configureSyncFrequency(enum CLKINDEX ind);
void setADCPipeline(int val);
int getADCPipeline();
#endif
#ifdef CHIPTESTBOARDD
void setDBITPipeline(int val);
int getDBITPipeline();
int setLEDEnable(int enable);
@ -519,6 +516,10 @@ void setDigitalIODelay(uint64_t pinMask, int delay);
// jungfrau/moench specific - powerchip, autocompdisable, clockdiv, asictimer,
// clock, pll, flashing firmware
#if defined(MOENCHED)
void setADCPipeline(int val);
int getADCPipeline();
#endif
#if defined(JUNGFRAUD) || defined(MOENCHD)
int setReadNRows(int value);
int getReadNRows();

View File

@ -300,7 +300,7 @@ void AD9257_Configure() {
AD9257_CLK_CH_IFCO_MSK);
// vref
#ifdef GOTTHARDD
#if defined(GOTTHARDD) || defined(MOENCHD)
LOG(logINFO, ("\tVref default at 2.0\n"));
AD9257_SetVrefVoltage(AD9257_VREF_DEFAULT_VAL, 0);
#else

View File

@ -1049,7 +1049,7 @@ enum DACINDEX getDACIndex(enum dacIndex ind) {
case VCOM_ADC2:
serverDacIndex = G2_VCOM_ADC2;
break;
#elif defined(JUNGFRAUD) || defined(MOENCHD)
#elif JUNGFRAUD
case HIGH_VOLTAGE:
break;
case VB_COMP:
@ -1076,6 +1076,33 @@ enum DACINDEX getDACIndex(enum dacIndex ind) {
case VREF_COMP:
serverDacIndex = J_VREF_COMP;
break;
#elif MOENCHD
case HIGH_VOLTAGE:
break;
case VBP_COLBUF:
serverDacIndex = MO_VBP_COLBUF;
break;
case VIPRE:
serverDacIndex = MO_VIPRE;
break;
case VIN_CM:
serverDacIndex = MO_VIN_CM;
break;
case VB_SDA:
serverDacIndex = MO_VB_SDA;
break;
case VCASC_SFP:
serverDacIndex = MO_VCASC_SFP;
break;
case VOUT_CM:
serverDacIndex = MO_VOUT_CM;
break;
case VIPRE_CDS:
serverDacIndex = MO_VIPRE_CDS;
break;
case IBIAS_SFP:
serverDacIndex = MO_IBIAS_SFP;
break;
#endif
default:
@ -9053,7 +9080,7 @@ int set_adc_pipeline(int file_des) {
return printSocketReadError();
LOG(logDEBUG1, ("Setting adc pipeline : %u\n", arg));
#if !defined(CHIPTESTBOARDD)
#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD)
functionNotImplemented();
#else
@ -9075,7 +9102,7 @@ int get_adc_pipeline(int file_des) {
LOG(logDEBUG1, ("Getting adc pipeline\n"));
#if !defined(CHIPTESTBOARDD)
#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD)
functionNotImplemented();
#else
// get only