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28d224afab
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version 1.0.0-rc.25
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2024-11-22 21:25:20 +01:00 |
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adc13ff33e
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version 1.0.0-rc.24
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2024-11-17 14:55:09 +01:00 |
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95eaad3d35
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version 1.0.0-rc.15
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2024-10-08 21:04:09 +02:00 |
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e812918e2e
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version 1.0.0-rc.13
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2024-10-05 13:14:49 +02:00 |
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6b5fddf2b7
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Version 1.0.0-rc.12
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2024-07-06 09:34:44 +02:00 |
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953c3fa972
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Updates after MAX IV experiment
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2024-06-03 10:56:43 +02:00 |
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91fd44bff7
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Improve release/versioning of Jungfraujoch repository
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2024-05-15 11:29:01 +02:00 |
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ea70b27e85
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Improvements before MAX IV test
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2024-04-25 20:11:58 +02:00 |
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9630c06b02
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Modifications necessary for the EIGER test
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2024-04-18 15:36:52 +02:00 |
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38ed2ed56f
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Use internal trigger to take pedestal + fix fixedG1 pedestal with SCs
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2024-04-13 14:27:37 +02:00 |
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c6d2b5eedf
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File writer and spot finding improvements
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2024-04-08 11:18:50 +02:00 |
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59aacf516d
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Updates March 2023
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2024-03-14 20:26:03 +01:00 |
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d315506633
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* Enhancements for XFEL
* Enhancements for EIGER
* Writer is more flexible and capable of handling DECTRIS data
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2024-03-05 20:41:47 +01:00 |
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babb1a5c8d
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Fixes after MAX IV experiment
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2024-02-05 17:18:16 +01:00 |
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f5f86d9ab6
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Modifications in preparation to MAX IV experiment
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2024-01-27 21:23:56 +01:00 |
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d82bd13917
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Minor fixes for CI and dependencies
Improvements in documentation and readability of JungfraujochDevice function
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2023-12-14 22:39:17 +01:00 |
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1798de247b
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Extend FPGA functionality
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2023-12-09 12:08:39 +01:00 |
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96c47cfd73
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FPGAIntegrationTest: Fix test
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2023-11-23 16:37:58 +01:00 |
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f778a35e6f
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DiffractionExperiment: Move internal variables to a C++ structure
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2023-11-14 13:17:58 +01:00 |
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4efcdaab74
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AcqusitionDevice: Moved to dedicated directory
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2023-11-10 11:45:16 +01:00 |
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4bc61de084
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AcquisitionDevice no longer depends on ProtoBuf (at least directly)
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2023-11-08 21:51:42 +01:00 |
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a4af0b380c
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FPGAIntegrationTest: Fix excesive test output
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2023-11-07 19:18:25 +01:00 |
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41985b6c29
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FPGA: Increase data width of conversion to 18-bit. This allows to use full unsigned precision + raw data are handled properly.
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2023-11-07 19:11:37 +01:00 |
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591e724cf6
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DiffractionExperiment: Rename GetFPGAOutputDepth -> GetPixelDepth and GetFPGASummation -> GetSummation
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2023-11-06 18:01:53 +01:00 |
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b2743072e6
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DiffractionExperiment: Remove frame summation (summation only on FPGA)
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2023-11-06 16:09:08 +01:00 |
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3d7c7b0779
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Implement FPGA summation
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2023-11-02 20:41:37 +01:00 |
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b3eceef7cd
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FPGA: Max module number is 32
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2023-11-01 15:55:06 +01:00 |
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112a62fc7f
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FPGA: remove limit of modules for frame_generator
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2023-11-01 14:20:43 +01:00 |
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a71121482e
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FPGAIntegrationTest: More parameters in packet generator custom frame test
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2023-11-01 13:29:06 +01:00 |
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2ed91c1849
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FPGA: transfer for image and processing results are separate DMA transactions
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2023-10-28 16:47:06 +02:00 |
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c896ec5659
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FPGA: Remove bitshuffle from the pipeline
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2023-10-27 19:41:02 +02:00 |
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3b802effa8
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HLSSimulatedDevice: Remove module_upside_down
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2023-10-27 15:28:49 +02:00 |
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2268486824
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HLS: Added frame_summation core
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2023-10-26 22:31:09 +02:00 |
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efac89f89e
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FPGAIntegrationTest: Add invert and bitshuffle tests
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2023-10-25 22:37:25 +02:00 |
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c1469d1e46
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JFJochReceiver: Skip frames if acquisition finished and frames stopped earlier on the first acquisition device
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2023-10-22 14:36:53 +02:00 |
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3b65e6bf88
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FPGA: Integration on FPGA allows for per pixel weights (in range 1.99 - 3e-5)
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2023-10-21 15:37:46 +02:00 |
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d91eb6bdd5
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FPGAIntegrationTest: Use multiple modules
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2023-10-21 11:08:07 +02:00 |
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7008703af3
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FPGA: Integration is not calculating sum2
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2023-10-20 14:06:58 +02:00 |
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ad78fb0149
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FPGA: Fixes and simplifications to spot_finder core + SNR threshold test
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2023-10-20 12:23:50 +02:00 |
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f04f7a274b
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FPGA: Name spot finder signals in consistent manner
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2023-10-19 20:52:09 +02:00 |
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67b9e08a5c
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FPGAIntegrationTest: Add test for spot finder based on count limit
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2023-10-19 19:48:40 +02:00 |
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a56a54c72d
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AcquisitionDevice: GetDeviceOutput to get the whole package
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2023-10-18 19:42:57 +02:00 |
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faca7a3f15
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PCIe driver: Clean-up + add intermediate library between driver and AcquisitionDevice
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2023-10-16 19:54:13 +02:00 |
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8831ad380f
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FPGA: Fix bug in adu_histo + add test + add access from AcquisitionDevice
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2023-09-29 18:34:29 +02:00 |
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84bf69b8a6
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FPGA: frame generator reads from HBM (work in progress)
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2023-09-26 13:14:43 +02:00 |
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0f7c14c267
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FPGA: integration calculates sum^2
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2023-09-25 22:23:06 +02:00 |
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a70e3cf444
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FPGA: integration & jf_conversion use hbm_size_bytes as external signal - hbm_size_bytes is constant, so to allow constant propagation in synthesis
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2023-09-22 21:49:41 +02:00 |
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5cf0d30603
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AcquisitionDevice: Enable access to integration results
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2023-09-22 20:32:13 +02:00 |
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bb29e7e646
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HLS_C_Simulation_check_single_packet: check for memory content for missed packets
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2023-09-21 18:39:05 +02:00 |
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88e837a33a
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FPGAAcquisitionDevice: Remove non-blocking mode
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2023-09-20 16:29:50 +02:00 |
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