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f814346fa2
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Fix GPUImageAnalysis
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2023-11-11 22:57:55 +01:00 |
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834d8e8dcd
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ADUHistogram: Fix return missing
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2023-11-11 22:43:15 +01:00 |
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4cb4792432
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JFJochReceiverService: Enable using C++ structs
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2023-11-11 22:43:15 +01:00 |
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eaf7792459
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DataProcessingSettings has equivalent C++ and ProtoBuf structures
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2023-11-11 18:48:38 +01:00 |
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f505ec6532
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Fix jfjoch_action_test
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2023-11-11 17:42:06 +01:00 |
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652fc80b5d
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Fix jfjoch_receiver
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2023-11-11 17:41:44 +01:00 |
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d83b8d465d
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JFJochReceiver: Plot is C++ struct
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2023-11-10 21:22:42 +01:00 |
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04c251d16a
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gRPC: Remove optional variables from ProtoBuf
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2023-11-10 17:43:51 +01:00 |
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d23bcb564d
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JFJochReceiver: output is standard C++ structure
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2023-11-10 14:16:23 +01:00 |
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6008fbea35
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JFJochReceiver: Use DiffractionExperiment and JFCalibration, instead of ProtoBuf structure
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2023-11-10 12:27:35 +01:00 |
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4efcdaab74
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AcqusitionDevice: Moved to dedicated directory
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2023-11-10 11:45:16 +01:00 |
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04c2e41cf5
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AcquisitionDevice: Remove copy constructor/assignment operator
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2023-11-10 11:36:41 +01:00 |
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7993efb047
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DetectorSettings: remove optional fields
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2023-11-09 20:51:37 +01:00 |
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4bc61de084
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AcquisitionDevice no longer depends on ProtoBuf (at least directly)
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2023-11-08 21:51:42 +01:00 |
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050d762187
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Remove FPGAStatus - replace it with non-ProtoBuf version
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2023-11-08 21:01:36 +01:00 |
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56476e3e5f
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ZMQPreviewPublisher: Stream CBOR data
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2023-11-08 19:19:32 +01:00 |
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cc34a9801e
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gRPC: not using pyPAI (as this requires recent ProtoBuf)
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2023-11-08 18:40:34 +01:00 |
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7411d0fd69
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gRPC: Only OS gRPC is supported
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2023-11-08 18:39:55 +01:00 |
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98cb58d199
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PCIe driver: Fix addresses for calibration and frame generator
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2023-11-08 14:36:36 +01:00 |
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427f0f7a45
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Fix tests + re-run FPGA synthesis
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2023-11-07 21:42:16 +01:00 |
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adc0a1bab6
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Fix tests + re-run FPGA synthesis
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2023-11-07 21:36:22 +01:00 |
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a4af0b380c
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FPGAIntegrationTest: Fix excesive test output
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2023-11-07 19:18:25 +01:00 |
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41985b6c29
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FPGA: Increase data width of conversion to 18-bit. This allows to use full unsigned precision + raw data are handled properly.
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2023-11-07 19:11:37 +01:00 |
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2dfd878d01
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JFConversionFloatingPoint: Integrate other bit depths/signs
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2023-11-07 15:36:49 +01:00 |
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be546e9f76
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JFConversionFloatingPoint: Move to double type (32-bit special values can be only exact in double type)
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2023-11-07 14:31:59 +01:00 |
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de317c29d5
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JFConversion: Clean-up
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2023-11-07 13:28:27 +01:00 |
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310d77a57f
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JFJochReceiver: No access to preview frame via gRPC
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2023-11-07 10:13:19 +01:00 |
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552597523d
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ImagePusher: Serialization of StartMessage is handled outside of the class
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2023-11-06 20:21:27 +01:00 |
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591e724cf6
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DiffractionExperiment: Rename GetFPGAOutputDepth -> GetPixelDepth and GetFPGASummation -> GetSummation
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2023-11-06 18:01:53 +01:00 |
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dec3eb15de
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FrameTransformation: Add two tests for int32 and uint16
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2023-11-06 17:43:14 +01:00 |
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d6c1b19599
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DiffractionExperiment: Remove ROI-mask function
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2023-11-06 16:51:34 +01:00 |
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b2743072e6
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DiffractionExperiment: Remove frame summation (summation only on FPGA)
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2023-11-06 16:09:08 +01:00 |
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fcd7612656
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DiffractionExperiment: Remove 2x2 binning to simplify transformation code
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2023-11-06 14:16:15 +01:00 |
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e6442f6384
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ZMQPreviewPublisher: Support both 16-bit and 32-bit images in preview
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2023-11-03 17:38:23 +01:00 |
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50556932fb
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DiffractionExperiment: Remove spot finder stride
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2023-11-03 16:56:50 +01:00 |
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72045655b4
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JFJochReceiver: Use FPGA based spot finder
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2023-11-03 12:39:12 +01:00 |
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ca4b940904
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StrongPixelSet: ReadFPGAOutput (not tested)
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2023-11-03 12:09:33 +01:00 |
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71960d5496
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JFJochReceiver: Remove MiniSummationThread (as summation is anyway handled on FPGA)
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2023-11-03 11:25:14 +01:00 |
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3d7c7b0779
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Implement FPGA summation
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2023-11-02 20:41:37 +01:00 |
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1b2b8f5863
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FPGA: Fix problems in summation and related cores
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2023-11-02 20:25:29 +01:00 |
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c66c06e8f5
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FPGA: Fix setup action
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2023-11-02 15:09:04 +01:00 |
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8cd0d497ad
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FPGA: Allow saving 32-bit unsigned.
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2023-11-02 13:32:29 +01:00 |
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f21f226a59
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Move MAX_FPGA_SUMMATION to Definitions.h
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2023-11-02 12:55:52 +01:00 |
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b3eceef7cd
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FPGA: Max module number is 32
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2023-11-01 15:55:06 +01:00 |
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9f110f3c1a
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FPGA: nmodules is actually module - 1 (there will be never 0 modules, while it can encode 32)
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2023-11-01 14:28:32 +01:00 |
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112a62fc7f
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FPGA: remove limit of modules for frame_generator
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2023-11-01 14:20:43 +01:00 |
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8f2b01be80
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FPGA: frame_generator and load_calibration return value for error checking
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2023-11-01 13:31:41 +01:00 |
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a71121482e
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FPGAIntegrationTest: More parameters in packet generator custom frame test
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2023-11-01 13:29:06 +01:00 |
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31304553be
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FPGA: sls_detector had hardcoded max module number -> fixed
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2023-11-01 13:28:17 +01:00 |
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3940f067a8
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MAX_MODULES_FPGA moved to Definitions.h => This needs to be const for RELEASE_LEVEL
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2023-11-01 13:16:22 +01:00 |
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