FPGA: nmodules is actually module - 1 (there will be never 0 modules, while it can encode 32)
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@@ -139,7 +139,7 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out,
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ap_uint<64> mode = ACT_REG_MODE(packet_in.data);
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ap_uint<1> conversion = (mode & MODE_CONV) ? 1 : 0;
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ap_uint<5> modules = ACT_REG_NMODULES(packet_in.data);
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ap_uint<6> modules = ACT_REG_NMODULES(packet_in.data) + 1;
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ap_uint<32> in_one_over_energy = ACT_REG_ONE_OVER_ENERGY(packet_in.data);
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ap_uint<5> storage_cells = ACT_REG_NSTORAGE_CELLS(packet_in.data);
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@@ -202,7 +202,7 @@ void FPGAAcquisitionDevice::FillActionRegister(const DiffractionExperiment& x, D
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std::uniform_int_distribution<uint16_t> dist;
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data_collection_id = dist(rd);
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job.nmodules = x.GetModulesNum(data_stream);
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job.nmodules = x.GetModulesNum(data_stream) - 1;
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job.nframes = x.GetFrameNum();
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job.one_over_energy = std::lround((1<<20)/ x.GetPhotonEnergy_keV());
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job.nstorage_cells = x.GetStorageCellNumber() - 1;
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