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28d224afab
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version 1.0.0-rc.25
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2024-11-22 21:25:20 +01:00 |
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adc13ff33e
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version 1.0.0-rc.24
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2024-11-17 14:55:09 +01:00 |
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40c1e3d49f
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version 1.0.0-rc.20
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2024-10-21 13:30:56 +02:00 |
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d315506633
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* Enhancements for XFEL
* Enhancements for EIGER
* Writer is more flexible and capable of handling DECTRIS data
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2024-03-05 20:41:47 +01:00 |
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f5f86d9ab6
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Modifications in preparation to MAX IV experiment
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2024-01-27 21:23:56 +01:00 |
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1798de247b
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Extend FPGA functionality
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2023-12-09 12:08:39 +01:00 |
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e254ef1a60
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FPGA: No "trailing" address message in AXI-Stream
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2023-11-23 14:52:53 +01:00 |
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b3eceef7cd
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FPGA: Max module number is 32
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2023-11-01 15:55:06 +01:00 |
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817d541fb0
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HLS: save_to_hbm.cpp send frames in proper order
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2023-10-27 16:02:23 +02:00 |
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473bf17ae7
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HLS: axis_completion has extra parameter (ignore) that makes the frame ignored by load_from_hbm, but HBM handle is still recovered
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2023-10-26 18:14:35 +02:00 |
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2a0122393c
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FPGA: Fix license
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2023-09-21 13:10:55 +02:00 |
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86123eb2fe
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FPGA: Use datamover for save_to_hbm and load_from_hbm
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2023-09-19 07:36:56 +02:00 |
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a94bdacea9
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Revert "FPGA: use 4 HBM interfaces for load and save to HBM"
This reverts commit 28a29ea3183a35d8ba0dda0628ac727f8bfe4f17.
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2023-09-19 07:36:56 +02:00 |
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1fe5c474ee
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FPGA: use 4 HBM interfaces for load and save to HBM
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2023-09-19 07:36:56 +02:00 |
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e041e7bf26
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Revert "FPGA: double HBM latency & number of outstanding operations"
This reverts commit 0f903607a028e1827dd965b13f87f913cc81d6b1.
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2023-09-19 07:36:56 +02:00 |
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480eb5527b
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FPGA: double HBM latency & number of outstanding operations
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2023-09-19 07:36:56 +02:00 |
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6700fe54f8
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FPGA: hbm_size_bytes in load_from_hbm and save_to_hbm is read after first data package is exchanged
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2023-09-19 07:36:56 +02:00 |
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95d4844aa4
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FPGA: Use both HBM pseudo-channels
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2023-09-19 07:36:56 +02:00 |
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2982097b8c
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FPGA: Use HBM as intermediary cache for images
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2023-09-19 07:36:56 +02:00 |
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