FPGA: No "trailing" address message in AXI-Stream

fpga/hls/data_collection_fsm.cpp

@@ -84,10 +84,7 @@ void data_collection_fsm(AXI_STREAM &eth_in,
             packet_out.dest = 0;
             packet_out.id   = 1;
             data_out << packet_out;
-
-            addr.last = 0;
-            addr_out << addr;
-
+            
             rcv_state = RCV_INIT;
             break;
         case RCV_INIT:

fpga/hls/save_to_hbm.cpp

@@ -33,9 +33,6 @@ void save_to_hbm(STREAM_512 &data_in,
         cmpl[i].last = 0;
     }
 
-    axis_addr addr;
-    addr_in >> addr;
-
     packet_512_t packet_in;
     data_in >> packet_in;
     data_out << packet_in;
@@ -43,6 +40,7 @@ void save_to_hbm(STREAM_512 &data_in,
     ap_uint<32> offset_hbm_0 = 12 * hbm_size_bytes / 32;
     ap_uint<32> offset_hbm_1 = 14 * hbm_size_bytes / 32;
 
+    axis_addr addr;
     addr_in >> addr;
 
     Loop_good_packet: