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3b802effa8
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HLSSimulatedDevice: Remove module_upside_down
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2023-10-27 15:28:49 +02:00 |
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7973c2ca81
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HLS: Minor fixes to adu_histo.cpp
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2023-10-27 15:27:36 +02:00 |
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4fbac629d6
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HLS: Use U55C part number for proper usage statistics
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2023-10-27 13:54:35 +02:00 |
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cf69aef472
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FPGA: Add extra register slices for upside_down
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2023-10-26 22:36:08 +02:00 |
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2268486824
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HLS: Added frame_summation core
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2023-10-26 22:31:09 +02:00 |
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4011c4541d
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HLS: frames inside HLS logic are counted from 0, even if JUNGFRAU counts them from 1
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2023-10-26 19:42:15 +02:00 |
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473bf17ae7
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HLS: axis_completion has extra parameter (ignore) that makes the frame ignored by load_from_hbm, but HBM handle is still recovered
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2023-10-26 18:14:35 +02:00 |
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efac89f89e
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FPGAIntegrationTest: Add invert and bitshuffle tests
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2023-10-25 22:37:25 +02:00 |
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7df76a5c76
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FPGAAcquisitionDevice: add option to customize execution flags
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2023-10-25 22:28:13 +02:00 |
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4e60bb2f9e
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FPGA: Add option to invert modules upside down
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2023-10-25 22:20:45 +02:00 |
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439d6fa12a
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FPGA: Spot finder won't use multipixels for mean/variance calculation
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2023-10-25 18:18:29 +02:00 |
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6bcf54f603
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FPGA: Add bitshuffle to the design (warning! no test for full integration!)
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2023-10-25 11:07:21 +02:00 |
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a611d3f08b
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FPGA: Adapt host writer to multipixel core. (TODO -> multipixels should be masked for rad. int. and spot finding)
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2023-10-24 19:11:23 +02:00 |
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d408b3ed2a
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FPGA: Integrate add multipixel into the design
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2023-10-24 18:58:59 +02:00 |
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b33e996569
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FPGA: Add multipixel - add test.
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2023-10-24 18:05:59 +02:00 |
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c37a9fa768
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FPGA: Add multipixel - handle division by 2 and 4 for multipixels.
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2023-10-24 18:05:48 +02:00 |
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e195432aea
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RawToConvertedGeometry: Separate core functions that require minimum headers
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2023-10-24 17:54:14 +02:00 |
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e1a6830c50
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FPGA: Add multipixel (-> TODO calculate proper number)
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2023-10-24 16:43:24 +02:00 |
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6d74732bf5
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Merge branch 'fpga_hbm_cache' into 'main'
Introduce HBM cache into the design
See merge request jungfraujoch/nextgendcu!7
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2023-10-22 16:11:21 +02:00 |
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61f4adf743
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Merge branch 'main' into 'fpga_hbm_cache'
# Conflicts:
# etc/broker.json
# python/jfjoch_pb2.py
# receiver/FPGAAcquisitionDevice.cpp
# receiver/FPGAAcquisitionDevice.h
# receiver/jfjoch_action_test.cpp
# tests/FPGAIntegrationTest.cpp
# tests/JFJochReceiverIntegrationTest.cpp
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2023-10-22 13:55:41 +00:00 |
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ea0fccecc9
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JFConversionGPU: Remove
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2023-10-22 14:39:03 +02:00 |
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c1469d1e46
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JFJochReceiver: Skip frames if acquisition finished and frames stopped earlier on the first acquisition device
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2023-10-22 14:36:53 +02:00 |
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bc43921004
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JFJochReceiver: Remove local conversion (not useful -> simplify)
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2023-10-22 13:45:47 +02:00 |
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fe5b955289
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GPUImageAnalysis: Spot finder again produces 1-bit result (similar to FPGA) reduced on CPU + mask is not applied on GPU
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2023-10-22 13:42:09 +02:00 |
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566ff52bfc
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JFJochReceiver: Single preview, that can be switched to present all or indexed only results
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2023-10-22 12:41:59 +02:00 |
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af27854440
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Frontend: Add ADU histogram plot
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2023-10-21 23:08:17 +02:00 |
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ee363a8356
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JFJochReceiver: Given firmware now masks uncollected parts of the image, receiver will accept partial modules (but not for pedestal!)
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2023-10-21 23:01:17 +02:00 |
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624c928c84
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JFJochReceiver: ADU histogram saved on per module basis at the end of the measurement (but not on per image basis)
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2023-10-21 22:31:43 +02:00 |
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99741ae5c5
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ADU histogram: Save
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2023-10-21 19:51:25 +02:00 |
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53f4f4acf9
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RadialIntegration: Calculate only on FPGA
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2023-10-21 19:15:42 +02:00 |
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dd4988486c
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RadialIntegrationMapping: No mask
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2023-10-21 17:20:12 +02:00 |
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b4ab3087f1
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RadialIntegrationProfile: Extra routines to handle GPU/CPU/FPGA workflows in more versatile way
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2023-10-21 17:14:17 +02:00 |
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a7706546b7
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RadialIntegration: Remove pixel split
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2023-10-21 16:18:41 +02:00 |
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19644a1f5f
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FPGA: Trigger synthesis
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2023-10-21 16:12:51 +02:00 |
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c86bc4591c
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AcquisitionDevice: Remove automatic setup of radial integration
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2023-10-21 16:08:49 +02:00 |
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4ede0f1f15
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FPGA: rename axis_256_to_512.cpp file
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2023-10-21 15:38:40 +02:00 |
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3b65e6bf88
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FPGA: Integration on FPGA allows for per pixel weights (in range 1.99 - 3e-5)
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2023-10-21 15:37:46 +02:00 |
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d91eb6bdd5
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FPGAIntegrationTest: Use multiple modules
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2023-10-21 11:08:07 +02:00 |
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0b5bbec1fc
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AcquisitionDevice: Setup rad. int. mapping automatically
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2023-10-20 18:00:29 +02:00 |
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7008703af3
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FPGA: Integration is not calculating sum2
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2023-10-20 14:06:58 +02:00 |
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a338a1743b
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RawToConvertedGeometry: Add function to calculate location of a raw pixel in converted geometry
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2023-10-20 13:27:21 +02:00 |
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ad78fb0149
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FPGA: Fixes and simplifications to spot_finder core + SNR threshold test
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2023-10-20 12:23:50 +02:00 |
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4e4a232a6d
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Definitions: Increase max gRPC message size to 2 GB -> need to change later how calibration is being transferred
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2023-10-20 11:40:09 +02:00 |
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45de356c16
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FPGA: Minor changes
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2023-10-19 22:43:35 +02:00 |
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aa1ff0436b
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FPGA: Add SNR threshold to spot finder
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2023-10-19 22:29:38 +02:00 |
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60466fe146
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FPGA: Add extra comment to spot_finder
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2023-10-19 20:56:24 +02:00 |
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9f48e4b317
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FPGA: remove spot_finder.h
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2023-10-19 20:53:38 +02:00 |
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f04f7a274b
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FPGA: Name spot finder signals in consistent manner
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2023-10-19 20:52:09 +02:00 |
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67b9e08a5c
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FPGAIntegrationTest: Add test for spot finder based on count limit
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2023-10-19 19:48:40 +02:00 |
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90344eb251
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FPGA: Basic spot finder (i.e. only based on count threshold) as a placeholder
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2023-10-19 19:40:31 +02:00 |
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