|
|
ad78fb0149
|
FPGA: Fixes and simplifications to spot_finder core + SNR threshold test
|
2023-10-20 12:23:50 +02:00 |
|
|
|
45de356c16
|
FPGA: Minor changes
|
2023-10-19 22:43:35 +02:00 |
|
|
|
aa1ff0436b
|
FPGA: Add SNR threshold to spot finder
|
2023-10-19 22:29:38 +02:00 |
|
|
|
60466fe146
|
FPGA: Add extra comment to spot_finder
|
2023-10-19 20:56:24 +02:00 |
|
|
|
9f48e4b317
|
FPGA: remove spot_finder.h
|
2023-10-19 20:53:38 +02:00 |
|
|
|
f04f7a274b
|
FPGA: Name spot finder signals in consistent manner
|
2023-10-19 20:52:09 +02:00 |
|
|
|
90344eb251
|
FPGA: Basic spot finder (i.e. only based on count threshold) as a placeholder
|
2023-10-19 19:40:31 +02:00 |
|
|
|
6f9f918ee6
|
HLS: Improve make scripts, so HLS test bench can be defined
|
2023-10-18 16:32:31 +02:00 |
|
|
|
736a181e5e
|
HLS: Spot finder outputs parameters + statistics
|
2023-10-18 15:19:01 +02:00 |
|
|
|
ec7278bd44
|
HLS: Changes to allow cosimulation with Vitis HLS
|
2023-10-18 14:44:30 +02:00 |
|
|
|
05338887a7
|
FPGA: Spot finder accepts 16-bit number for strong pixel threshold
|
2023-10-16 22:07:41 +02:00 |
|
|
|
c5ca10792e
|
FPGA: Clean-up of spot_finder core + update README.MD
|
2023-10-16 15:13:47 +02:00 |
|
|
|
9b646a4195
|
FPGA: Spot finder 2nd version more improved
|
2023-10-04 16:59:13 +02:00 |
|
|
|
7889f1666a
|
FPGA: Spot finder 2nd version improved
|
2023-10-04 12:12:43 +02:00 |
|
|
|
5460c10f76
|
FPGA: Spot finder 2nd version
|
2023-10-03 22:14:11 +02:00 |
|
|
|
81c1502d52
|
FPGA: Added spot_finder_line_sum (work in progress)
|
2023-10-03 18:51:26 +02:00 |
|
|
|
f301923c72
|
FPGA: Added spot_finder_update_sum function, as first step for versatile spot finder
|
2023-10-03 14:28:39 +02:00 |
|
|
|
c6afbebd13
|
FPGA: add old spot finder to the design (work in progress! - seems very high resource utilization + it is offset from proper result)
|
2023-10-02 22:34:49 +02:00 |
|
|
|
79aef71ce3
|
FPGA: spot_finder added
|
2023-09-26 18:54:31 +02:00 |
|
|
|
4dfc8a1a59
|
FPGA: spot_finder threshold can be set externally
|
2023-09-23 15:17:35 +02:00 |
|
|
|
2cfde3a82d
|
FPGA: spot_finder early work in progress
|
2023-09-22 20:43:52 +02:00 |
|