FPGA: spot_finder threshold can be set externally
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@@ -53,6 +53,7 @@ typedef hls::stream<packet_512_t> STREAM_512;
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#define ACT_REG_NFRAMES(x) ((x)(95 , 64)) // 32 bit
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#define ACT_REG_NMODULES(x) ((x)(132, 128)) // 5 bit (0..31)
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#define ACT_REG_NSTORAGE_CELLS(x) ((x)(148, 144)) // 5 bit
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#define ACT_REG_SPOT_FINDER_THRESHOLD(x) ((x)(175, 160)) // 16 bit
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struct axis_datamover_ctrl {
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ap_uint<40+64> data;
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@@ -1,7 +1,5 @@
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// Copyright (2019-2023) Paul Scherrer Institute
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// Copyright (2019-2023) Paul Scherrer Institute
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#include "hls_jfjoch.h"
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void spot_finder(STREAM_512 &data_in,
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@@ -15,6 +13,7 @@ void spot_finder(STREAM_512 &data_in,
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packet_512_t packet;
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data_in >> packet;
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data_out << packet;
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ap_int<16> threshold = ACT_REG_SPOT_FINDER_THRESHOLD(packet.data);
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ap_uint<32> result[RAW_MODULE_SIZE * sizeof(uint16_t) / 64];
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#pragma HLS ARRAY_PARTITION variable=result type=cyclic factor=16
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@@ -24,13 +23,13 @@ void spot_finder(STREAM_512 &data_in,
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while (!packet.user) {
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for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / 64; i++) {
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#pragma HLS PIPELINE II=1
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ap_uint<32> output = 0;
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data_out << packet;
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unpack32(packet.data, val);
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for (int j = 0; j < 32; j++) {
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if (val[j] > 5)
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output[j] = 1;
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}
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ap_uint<32> output;
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for (int j = 0; j < 32; j++)
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output[j] = ((val[j] > threshold) ? 1 : 0);
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data_in >> packet;
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result[i] = output;
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}
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