FPGA: Spot finder 2nd version more improved

This commit is contained in:
2023-10-04 16:59:13 +02:00
parent 7889f1666a
commit 9b646a4195
3 changed files with 35 additions and 4 deletions
+1 -1
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@@ -10,7 +10,7 @@
#include <chrono>
namespace hls {
template<class T> class stream {
template<class T, int DEPTH=0> class stream {
private:
mutable std::mutex m;
std::condition_variable c_empty;
+25
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@@ -358,6 +358,31 @@ void spot_finder_2(STREAM_512 &data_in,
hls::stream<ap_uint<SUM_BITWIDTH*32>> sum_stream_0, sum_stream_1, sum_stream_2;
hls::stream<ap_uint<SUM2_BITWIDTH*32>> sum2_stream_0, sum2_stream_1, sum2_stream_2;
hls::stream<ap_uint<MASK_SUM_BITWIDTH*32>> valid_stream_0, valid_stream_1, valid_stream_2;
#pragma HLS STREAM variable=data_stream_0 depth=512 type=fifo
#pragma HLS bind_storage variable=data_stream_0 type=fifo impl=bram
#pragma HLS STREAM variable=data_stream_1 depth=64 type=fifo
#pragma HLS bind_storage variable=data_stream_1 type=fifo impl=bram
#pragma HLS STREAM variable=data_stream_2 depth=64 type=fifo
#pragma HLS bind_storage variable=data_stream_2 type=fifo impl=bram
#pragma HLS STREAM variable=sum_stream_0 depth=512 type=fifo
#pragma HLS bind_storage variable=sum_stream_0 type=fifo impl=bram
#pragma HLS STREAM variable=sum_stream_1 depth=64 type=fifo
#pragma HLS bind_storage variable=sum_stream_1 type=fifo impl=bram
#pragma HLS STREAM variable=sum_stream_2 depth=64 type=fifo
#pragma HLS bind_storage variable=sum_stream_2 type=fifo impl=bram
#pragma HLS STREAM variable=sum2_stream_0 depth=512 type=fifo
#pragma HLS bind_storage variable=sum2_stream_0 type=fifo impl=bram
#pragma HLS STREAM variable=sum2_stream_1 depth=64 type=fifo
#pragma HLS bind_storage variable=sum2_stream_1 type=fifo impl=bram
#pragma HLS STREAM variable=sum2_stream_2 depth=64 type=fifo
#pragma HLS bind_storage variable=sum2_stream_2 type=fifo impl=bram
#pragma HLS STREAM variable=valid_stream_0 depth=512 type=fifo
#pragma HLS bind_storage variable=valid_stream_0 type=fifo impl=bram
#pragma HLS STREAM variable=valid_stream_1 depth=64 type=fifo
#pragma HLS bind_storage variable=valid_stream_1 type=fifo impl=bram
#pragma HLS STREAM variable=valid_stream_2 depth=64 type=fifo
#pragma HLS bind_storage variable=valid_stream_2 type=fifo impl=bram
#ifdef __SYNTHESIS__
spot_finder_col_sum(data_in, data_stream_0, sum_stream_0, sum2_stream_0, valid_stream_0);
+9 -3
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@@ -48,10 +48,16 @@ ap_uint<N*32> prefix_sum(const ap_uint<N*(32+(2 * FPGA_NBX))> ext_column_sum) {
tmp_sum += column_sum[i];
}
//for (int i = 0; i < 32; i++) {
// tmp_sum += column_sum[i + 2 * FPGA_NBX];
// line_sum[i] = tmp_sum;
// tmp_sum -= column_sum[i];
//}
for (int i = 0; i < 32; i++) {
tmp_sum += column_sum[i + 2 * FPGA_NBX];
line_sum[i] = tmp_sum;
tmp_sum -= column_sum[i];
line_sum[i] = 0;
for (int j = 0; j < 2 * FPGA_NBX + 1; j++)
line_sum[i] += column_sum[i + j];
}
return pack32(line_sum);