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Code Issues Pull Requests Actions 1 Packages Projects Releases 37 Wiki Activity
538 Commits 43 Branches 122 Tags
e1a6830c50041b0ce99fcd8a9a8d87ec6d8d0c2f
Commit Graph

11 Commits

Author SHA1 Message Date
Filip Leonarski
3b65e6bf88 FPGA: Integration on FPGA allows for per pixel weights (in range 1.99 - 3e-5) 2023-10-21 15:37:46 +02:00
Filip Leonarski
84bf69b8a6 FPGA: frame generator reads from HBM (work in progress) 2023-09-26 13:14:43 +02:00
Filip Leonarski
f06e92fd1b FPGA: load_calibration allows to upload integration map 2023-09-22 18:28:35 +02:00
Filip Leonarski
16bbf54f2a Remove open source license (for now) 2023-09-15 10:47:21 +02:00
Filip Leonarski
8626195091 FPGA: fix to deadlock 2023-09-12 20:09:11 +02:00
Filip Leonarski
9d01630cfc FPGA: load calibration works as dedicated function of the card 2023-09-12 14:34:42 +02:00
Filip Leonarski
7a635f1ee8 FPGA: load_calibration clean-up + simplification 2023-09-12 09:16:45 +02:00
Filip Leonarski
8c3a25a8ad FPGA: load calibration operates directly on HBM 2023-09-11 21:47:29 +02:00
Filip Leonarski
1333ce9b29 FPGA: trigger synthesis 2023-09-06 12:36:14 +02:00
Filip Leonarski
3aeb3e09ee FPGA: Do not load internal packet generator frame via DMA 2023-09-06 11:57:16 +02:00
Filip Leonarski
7a98766304 FPGA: Split receiver and FPGA design directories 2023-06-07 21:21:22 +02:00
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