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98ad3a6fdc
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FPGA: Reduce UltraRAM usage by 4 MiB to improve timing
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2023-05-31 21:16:54 +02:00 |
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a3996a81e3
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FPGA: Remove data collection counter
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2023-05-30 20:13:54 +02:00 |
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72cdb88c0c
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FPGA: Add host_writer idle marker
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2023-05-27 21:45:21 +02:00 |
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7c9a5238e2
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FPGA: Minor improvements to data_collection_fsm
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2023-05-27 18:39:35 +02:00 |
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b926e69885
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FPGA: data_collection_fsm counter
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2023-05-26 20:39:12 +02:00 |
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8b87bb857b
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FPGA: clean-up unnecessary signals (from OC design)
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2023-05-26 19:38:07 +02:00 |
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2dfd6e916d
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FPGA: work completion queue is extended to 32768 elements.
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2023-05-24 11:57:56 +02:00 |
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97bf8f7e4a
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FPGA: Reduce UltraRAM FIFO (a bit)
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2023-05-17 21:55:41 +02:00 |
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1757d42182
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Initial commit
Signed-off-by: Filip Leonarski <filip.leonarski@psi.ch>
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2023-04-06 11:17:59 +02:00 |
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