105 Commits

Author SHA1 Message Date
90acd51389 server api changes: for mythen3, jungfrau, eiger as well 2020-02-26 17:52:35 +01:00
89c774dbf7 nios programming: check file size first 2020-01-31 11:24:48 +01:00
Dhanya Thattil
5ca3a1b685
gotthard2 and mythen3: programming fpga, reboot; jungfrau, ctb: modified programming (#74) 2020-01-30 19:52:35 -08:00
f881133795 get/set timing, generate data for gotthard2, vref_rstore instead of restore for gotthard2 2020-01-22 18:18:56 +01:00
8cbf3c62a9 merge from developer 2020-01-22 17:30:13 +01:00
3ea2520615 PR minor changes 2020-01-22 13:55:10 +01:00
504fc2d095 ctb: validate asampes and dsamples > 0 for romode; client: exception caught in acquire to stop receiver and clear busy flag 2019-12-10 10:25:14 +01:00
5cf1502287 ctb bug fix: 10g adc enable mask 2019-12-09 11:30:54 +01:00
3486137de3 bfin warnings fixed 2019-11-27 18:22:33 +01:00
9455a5fba1 ctb: adcenable10g included, 10g readout enables included 2019-11-27 17:28:57 +01:00
f299a34e59 ctb server binary update 2019-11-27 11:31:30 +01:00
f8df11886a ctb: change in phase done in degrees (phase reset due to change in frequency) 2019-11-21 15:08:38 +01:00
90c34e4942 gotthard2, dacs and onchip dacs from config file 2019-11-11 18:02:08 +01:00
bb26b993ea servers, firmware check message to init message, minor 2019-11-11 12:00:04 +01:00
615b3b2557 WIP 2019-11-06 19:07:00 +01:00
0f9fd5cd73 rename of clkdivider to clkfrequency in servers 2019-11-06 16:58:34 +01:00
18b8720c17 separated parameters and versions 2019-11-06 16:43:59 +01:00
1f64d2a4e2 speed separated 2019-11-05 18:50:35 +01:00
031241ae28 timer split up 2019-11-04 16:40:11 +01:00
ba9a0c7917 removed unused multi functions 2019-10-30 18:20:16 +01:00
fe467cdf70 jungfrau dacs named 2019-10-29 18:11:16 +01:00
aa8610fb04 WIP 2019-10-29 10:11:36 +01:00
f4a0780b51 patloops done 2019-10-24 18:59:23 +02:00
f73a15e786 tests made to pass ctb 2019-10-24 11:32:58 +02:00
Dhanya Thattil
995f0924e5
Commandline (#66)
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* removed status to string from defs

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* WIP removed unused functions in multi

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* print hex in a terrible way

* WIP, loadconfig error

* WIP, type to string

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* fix to conversion

* WIP, hostname doesnt work

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* WIP, threshold

* WIP, threshold

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* WIP, triggers

* WIP, cycles to triggers

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* rx_udsocksize fx, WIP

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* file index (64 bit), WIP

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* merge

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* New python mod
2019-10-21 10:29:06 +02:00
2a40c7f48e recompiled all servers 2019-09-30 14:54:31 +02:00
Dhanya Thattil
ca054626e6
Removeudpcache (#65)
* WIP

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* solved eiger 1-10g issue

* some fixes for remove udp cache to work

* bug fix virtual

* removed special handling of rx_udpip
2019-09-30 14:46:25 +02:00
40b62ef5a4 recompiled binaries 2019-09-02 19:31:36 +02:00
Dhanya Thattil
5bcde789ac
Readoutflags (#61)
* WIP

* eiger binary back wih versioning

* fixed readout flag in ctbgui, added speedLevel enum

* ctbgui: fixed a print out error

* ctb readout bug fix

* WIP

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* WIP
2019-09-02 19:27:27 +02:00
cb8c7eea54 updated binaries 2019-08-30 11:26:23 +02:00
3d78b7b6a7 updated al the binaries 2019-08-21 17:10:20 +02:00
a98271f0c2 merge resolved 2019-08-21 14:25:21 +02:00
5eaea5fb8d updated ctb server 2019-08-21 13:22:43 +02:00
28963e313b removed gotthard functions not used 2019-08-20 18:18:34 +02:00
51a3f3fd4d changed logger.h to clogger.h for c files 2019-08-20 08:48:12 +02:00
0d787788ea WIP ctb 2019-08-19 21:14:45 +02:00
a0bdfcdae3 WIP 2019-08-16 17:38:41 +02:00
b59d69325e updated minor 10g ctb 2019-08-16 15:35:23 +02:00
e3f151851c bug fix: internal hv used ofst instead of msk, insignificant bug though, would have worked 2019-07-23 14:13:41 +02:00
d3879bb834 WIP 2019-07-15 15:47:05 +02:00
4b69c01357 ctb server: sync clk get added 2019-06-19 16:55:24 +02:00
6e14a2efe2 ctb fix: reset pll reset also adc and dbit phase (fixed), also required adcs to be configured again(due to adc clock being stopped temporarily 2019-06-17 17:24:59 +02:00
39be0770e3 ctb server fixed to have 180 adc output phase 2019-06-14 16:43:56 +02:00
a6144f658e ctb client and server bug fix: dac didnt compute indices correctly and set dac was not printing in server 2019-06-04 18:11:31 +02:00
3aea917175 updated binaries for the extsig api change 2019-06-04 12:18:06 +02:00
17f745b45d ctb server: simulator effects, increased fpga reset time from 1 to 2 seconds 2019-06-03 17:22:59 +02:00
938e1e87ff bugfix: vref adc voltage 2019-05-28 12:31:19 +02:00
f90d8c6aff ctb server: added adcvpp option to get and in mv 2019-05-14 18:38:30 +02:00
741ee3b44c ctb server bug fix: udp ip not reset before overwriting (smaller size creates problems) 2019-05-14 17:08:07 +02:00
0904d1db29 updated ctb binary 2019-05-03 20:46:08 +02:00