ctb server fixed to have 180 adc output phase

This commit is contained in:
maliakal_d 2019-06-14 16:43:56 +02:00
parent 359970dfc2
commit 39be0770e3
3 changed files with 3 additions and 4 deletions

View File

@ -10,7 +10,8 @@ INSTMODE = 0777
SRC_CLNT = communication_funcs.c slsDetectorServer.c slsDetectorServer_funcs.c slsDetectorFunctionList.c
OBJS = $(SRC_CLNT:.c=.o)
all: clean versioning $(PROGS)
#all: clean versioning $(PROGS)
all: clean $(PROGS)
boot: $(OBJS)

View File

@ -272,7 +272,7 @@ void AD9257_Configure(){
AD9257_Set(AD9257_OUT_MODE_REG, AD9257_OUT_BINARY_OFST_VAL);
//output clock phase
#if defined(GOTTHARDD) || defined(JUNGFRAUD)
#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || defined(MOENCHD)
FILE_LOG(logINFO, ("\tOutput clock phase is at default: 180\n"));
#else
FILE_LOG(logINFO, ("\tOutput clock phase: 60\n"));
@ -298,9 +298,7 @@ void AD9257_Configure(){
AD9257_SetVrefVoltage(AD9257_VREF_DEFAULT_VAL, 0);
#else
FILE_LOG(logINFO, ("\tVref 1.33\n"));
//AD9257_Set(AD9257_VREF_REG, AD9257_VREF_1_33_VAL);
AD9257_SetVrefVoltage(AD9257_VREF_1_33_VAL, 0);
#endif
// no test mode