Jungfraujoch

add_multipixel_tb.cpp

FPGA: Add multipixel - handle division by 2 and 4 for multipixels.

2023-10-24 18:05:48 +02:00

add_multipixel.cpp

FPGA: Add multipixel - handle division by 2 and 4 for multipixels.

2023-10-24 18:05:48 +02:00

adu_histo.cpp

HLS: Minor fixes to adu_histo.cpp

2023-10-27 15:27:36 +02:00

arp.cpp

Remove open source license (for now)

2023-09-15 10:47:21 +02:00

axis_broadcast.cpp

FPGA: spot_finder added

2023-09-26 18:54:31 +02:00

axis_helpers.cpp

FPGA: rename axis_256_to_512.cpp file

2023-10-21 15:38:40 +02:00

CMakeLists.txt

FPGA: data analysis is done based on 24-bit numbers - allowing frame summation

2023-10-28 16:35:33 +02:00

data_collection_fsm.cpp

Extend frame summation to 64

2023-10-28 17:07:22 +02:00

datamover_model.h

parallel_stream.h: Depth can be provided as template parameter to hls::stream (like in Vitis HLS)

2023-10-18 12:10:00 +02:00

ethernet.cpp

Remove open source license (for now)

2023-09-15 10:47:21 +02:00

frame_generator.cpp

FPGA: Integration on FPGA allows for per pixel weights (in range 1.99 - 3e-5)

2023-10-21 15:37:46 +02:00

frame_summation_reorder_compl_tb.cpp

HLS: Added frame_summation core

2023-10-26 22:31:09 +02:00

frame_summation_reorder_compl.cpp

Extend frame summation to 64

2023-10-28 17:07:22 +02:00

frame_summation_tb.cpp

FPGA: data analysis is done based on 24-bit numbers - allowing frame summation

2023-10-28 16:35:33 +02:00

frame_summation.cpp

Extend frame summation to 64

2023-10-28 17:07:22 +02:00

hls_bitshuffle.cpp

HLS: Changes to allow cosimulation with Vitis HLS

2023-10-18 14:44:30 +02:00

hls_jfjoch.h

Extend frame summation to 64

2023-10-28 17:07:22 +02:00

host_writer.cpp

FPGA: transfer for image and processing results are separate DMA transactions

2023-10-28 16:47:06 +02:00

icmp.cpp

Remove open source license (for now)

2023-09-15 10:47:21 +02:00

integration.cpp

FPGA: data analysis is done based on 24-bit numbers - allowing frame summation

2023-10-28 16:35:33 +02:00

ip_header_checksum.h

Remove open source license (for now)

2023-09-15 10:47:21 +02:00

ipv4.cpp

Remove open source license (for now)

2023-09-15 10:47:21 +02:00

jf_conversion.cpp

HLS: frames inside HLS logic are counted from 0, even if JUNGFRAU counts them from 1

2023-10-26 19:42:15 +02:00

load_calibration.cpp

FPGA: Integration on FPGA allows for per pixel weights (in range 1.99 - 3e-5)

2023-10-21 15:37:46 +02:00

load_from_hbm.cpp

HLS: axis_completion has extra parameter (ignore) that makes the frame ignored by load_from_hbm, but HBM handle is still recovered

2023-10-26 18:14:35 +02:00

mask_missing.cpp

FPGA: Fix license

2023-09-21 13:10:55 +02:00

module_upside_down_tb.cpp

FPGA: Add option to invert modules upside down

2023-10-25 22:20:45 +02:00

module_upside_down.cpp

FPGA: Add option to invert modules upside down

2023-10-25 22:20:45 +02:00

parallel_stream.h

parallel_stream.h: Depth can be provided as template parameter to hls::stream (like in Vitis HLS)

2023-10-18 12:10:00 +02:00

save_to_hbm.cpp

HLS: save_to_hbm.cpp send frames in proper order

2023-10-27 16:02:23 +02:00

sls_detector.cpp

HLS: frames inside HLS logic are counted from 0, even if JUNGFRAU counts them from 1

2023-10-26 19:42:15 +02:00

spot_finder_tb.cpp

FPGA: data analysis is done based on 24-bit numbers - allowing frame summation

2023-10-28 16:35:33 +02:00

spot_finder.cpp

FPGA: data analysis is done based on 24-bit numbers - allowing frame summation

2023-10-28 16:35:33 +02:00

stream_24bit_conv_tb.cpp

FPGA: data analysis is done based on 24-bit numbers - allowing frame summation

2023-10-28 16:35:33 +02:00

stream_24bit_conv.cpp

FPGA: data analysis is done based on 24-bit numbers - allowing frame summation

2023-10-28 16:35:33 +02:00

stream_merge.cpp

Remove open source license (for now)

2023-09-15 10:47:21 +02:00

timer.cpp

Remove open source license (for now)

2023-09-15 10:47:21 +02:00

udp.cpp

Remove open source license (for now)

2023-09-15 10:47:21 +02:00