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Code Issues Pull Requests Actions Packages Projects Releases 38 Wiki Activity
797 Commits 43 Branches 123 Tags
f85b87bfd25e91c7b1bca379f5ebdfddac86928f
Commit Graph

10 Commits

Author SHA1 Message Date
leonarski_f
c6d2b5eedf File writer and spot finding improvements 2024-04-08 11:18:50 +02:00
leonarski_f
d315506633 * Enhancements for XFEL
* Enhancements for EIGER
* Writer is more flexible and capable of handling DECTRIS data
2024-03-05 20:41:47 +01:00
leonarski_f
babb1a5c8d Fixes after MAX IV experiment 2024-02-05 17:18:16 +01:00
leonarski_f
f5f86d9ab6 Modifications in preparation to MAX IV experiment 2024-01-27 21:23:56 +01:00
leonarski_f
1798de247b Extend FPGA functionality 2023-12-09 12:08:39 +01:00
Filip Leonarski
961c17c4d0 FPGA: data analysis is done based on 24-bit numbers - allowing frame summation 2023-10-28 16:35:33 +02:00
Filip Leonarski
4fbd747341 FPGA: Remove multipixel from the pipeline 2023-10-27 20:47:44 +02:00
Filip Leonarski
4978149fdd FPGA: Add register slice in the data pipeline 2023-10-27 19:43:40 +02:00
Filip Leonarski
c896ec5659 FPGA: Remove bitshuffle from the pipeline 2023-10-27 19:41:02 +02:00
Filip Leonarski
08c2427fc7 FPGA: Refactor FPGA (add two hierarchy groups for jungfraujoch) + change order similar to HLSSimulatedDesign 2023-10-27 15:42:24 +02:00
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