FPGA: Refactor FPGA (add two hierarchy groups for jungfraujoch) + change order similar to HLSSimulatedDesign
This commit is contained in:
@@ -47,6 +47,8 @@ set_property "target_constrs_file" [lindex $constraint_files 0] $constraint_set
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source $origin_dir/network_stack.tcl
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source $origin_dir/hbm_u55c.tcl
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source $origin_dir/jfjoch.tcl
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source $origin_dir/hbm_cache.tcl
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source $origin_dir/image_processing.tcl
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source $origin_dir/pcie_dma.tcl
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source $origin_dir/mac_100g_pcie.tcl
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source $origin_dir/bd_pcie.tcl >> build_pcie.log
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@@ -0,0 +1,250 @@
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## Copyright (2019-2023) Paul Scherrer Institute
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# Hierarchical cell: hbm_cache
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proc create_hier_cell_hbm_cache { parentCell nameHier } {
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variable script_folder
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if { $parentCell eq "" || $nameHier eq "" } {
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catch {common::send_gid_msg -ssname BD::TCL -id 2092 -severity "ERROR" "create_hier_cell_hbm_cache() - Empty argument(s)!"}
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return
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}
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# Get object for parentCell
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set parentObj [get_bd_cells $parentCell]
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if { $parentObj == "" } {
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catch {common::send_gid_msg -ssname BD::TCL -id 2090 -severity "ERROR" "Unable to find parent cell <$parentCell>!"}
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return
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}
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# Make sure parentObj is hier blk
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set parentType [get_property TYPE $parentObj]
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if { $parentType ne "hier" } {
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catch {common::send_gid_msg -ssname BD::TCL -id 2091 -severity "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be <hier>."}
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return
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}
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# Save current instance; Restore later
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set oldCurInst [current_bd_instance .]
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# Set parent object as current
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current_bd_instance $parentObj
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# Create cell and set as current instance
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set hier_obj [create_bd_cell -type hier $nameHier]
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current_bd_instance $hier_obj
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# Create interface pins
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create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 addr_in
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create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 data_in
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create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 data_out
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create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p12
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create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p13
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create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p14
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create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p15
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create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 m_axis_completion
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# Create pins
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create_bd_pin -dir I -type rst ap_rst_n
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create_bd_pin -dir I -type clk axi_clk
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create_bd_pin -dir I -type rst axi_rst_n
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create_bd_pin -dir O compl_fifo_empty
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create_bd_pin -dir O compl_fifo_full
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create_bd_pin -dir O hbm_handle_fifo_empty
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create_bd_pin -dir O hbm_handle_fifo_full
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create_bd_pin -dir I -from 31 -to 0 -type data hbm_size_bytes
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# Create instance: axi_datamover_0, and set properties
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set axi_datamover_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_datamover:5.1 axi_datamover_0 ]
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set_property -dict [ list \
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CONFIG.c_addr_width {64} \
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CONFIG.c_dummy {1} \
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CONFIG.c_enable_mm2s {1} \
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CONFIG.c_include_mm2s {Full} \
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CONFIG.c_include_mm2s_stsfifo {true} \
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CONFIG.c_m_axi_mm2s_data_width {256} \
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CONFIG.c_m_axi_mm2s_id_width {6} \
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CONFIG.c_m_axi_s2mm_id_width {6} \
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CONFIG.c_m_axis_mm2s_tdata_width {256} \
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CONFIG.c_mm2s_btt_used {23} \
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CONFIG.c_mm2s_burst_size {16} \
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CONFIG.c_mm2s_include_sf {true} \
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CONFIG.c_s2mm_btt_used {23} \
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CONFIG.c_single_interface {0} \
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] $axi_datamover_0
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# Create instance: axi_datamover_1, and set properties
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set axi_datamover_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_datamover:5.1 axi_datamover_1 ]
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set_property -dict [ list \
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CONFIG.c_addr_width {64} \
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CONFIG.c_dummy {1} \
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CONFIG.c_enable_mm2s {1} \
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CONFIG.c_include_mm2s {Full} \
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CONFIG.c_include_mm2s_stsfifo {true} \
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CONFIG.c_m_axi_mm2s_data_width {256} \
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CONFIG.c_m_axi_mm2s_id_width {6} \
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CONFIG.c_m_axi_s2mm_id_width {6} \
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CONFIG.c_m_axis_mm2s_tdata_width {256} \
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CONFIG.c_mm2s_btt_used {23} \
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CONFIG.c_mm2s_burst_size {16} \
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CONFIG.c_mm2s_include_sf {true} \
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CONFIG.c_s2mm_btt_used {23} \
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CONFIG.c_single_interface {0} \
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] $axi_datamover_1
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# Create instance: axis_compl_fifo_0, and set properties
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set axis_compl_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_compl_fifo_0 ]
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set_property -dict [ list \
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CONFIG.FIFO_DEPTH {2048} \
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CONFIG.FIFO_MEMORY_TYPE {ultra} \
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CONFIG.HAS_AEMPTY {1} \
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CONFIG.HAS_AFULL {1} \
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] $axis_compl_fifo_0
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# Create instance: axis_compl_fifo_1, and set properties
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set axis_compl_fifo_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_compl_fifo_1 ]
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set_property -dict [ list \
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CONFIG.FIFO_DEPTH {256} \
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CONFIG.FIFO_MEMORY_TYPE {auto} \
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CONFIG.HAS_AEMPTY {0} \
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CONFIG.HAS_AFULL {0} \
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] $axis_compl_fifo_1
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# Create instance: axis_data_fifo_2, and set properties
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set axis_data_fifo_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_2 ]
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set_property -dict [ list \
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CONFIG.FIFO_DEPTH {16} \
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] $axis_data_fifo_2
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# Create instance: axis_data_fifo_3, and set properties
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set axis_data_fifo_3 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_3 ]
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set_property -dict [ list \
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CONFIG.FIFO_DEPTH {16} \
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] $axis_data_fifo_3
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# Create instance: axis_datamover_cmd_fifo_0, and set properties
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set axis_datamover_cmd_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_datamover_cmd_fifo_0 ]
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set_property -dict [ list \
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CONFIG.FIFO_DEPTH {16} \
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] $axis_datamover_cmd_fifo_0
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# Create instance: axis_datamover_cmd_fifo_1, and set properties
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set axis_datamover_cmd_fifo_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_datamover_cmd_fifo_1 ]
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set_property -dict [ list \
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CONFIG.FIFO_DEPTH {16} \
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] $axis_datamover_cmd_fifo_1
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# Create instance: axis_datamover_cmd_fifo_2, and set properties
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set axis_datamover_cmd_fifo_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_datamover_cmd_fifo_2 ]
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set_property -dict [ list \
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CONFIG.FIFO_DEPTH {16} \
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] $axis_datamover_cmd_fifo_2
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# Create instance: axis_datamover_cmd_fifo_3, and set properties
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set axis_datamover_cmd_fifo_3 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_datamover_cmd_fifo_3 ]
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set_property -dict [ list \
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CONFIG.FIFO_DEPTH {16} \
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] $axis_datamover_cmd_fifo_3
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# Create instance: axis_datamover_fifo_0, and set properties
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set axis_datamover_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_datamover_fifo_0 ]
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set_property -dict [ list \
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CONFIG.FIFO_DEPTH {2048} \
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] $axis_datamover_fifo_0
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# Create instance: axis_datamover_fifo_1, and set properties
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set axis_datamover_fifo_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_datamover_fifo_1 ]
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set_property -dict [ list \
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CONFIG.FIFO_DEPTH {2048} \
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] $axis_datamover_fifo_1
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# Create instance: axis_datamover_fifo_2, and set properties
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set axis_datamover_fifo_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_datamover_fifo_2 ]
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set_property -dict [ list \
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CONFIG.FIFO_DEPTH {2048} \
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] $axis_datamover_fifo_2
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# Create instance: axis_datamover_fifo_3, and set properties
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set axis_datamover_fifo_3 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_datamover_fifo_3 ]
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set_property -dict [ list \
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CONFIG.FIFO_DEPTH {2048} \
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] $axis_datamover_fifo_3
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# Create instance: axis_hbm_handles_fifo, and set properties
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set axis_hbm_handles_fifo [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_hbm_handles_fifo ]
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set_property -dict [ list \
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CONFIG.FIFO_DEPTH {2048} \
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CONFIG.HAS_AEMPTY {1} \
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CONFIG.HAS_AFULL {1} \
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] $axis_hbm_handles_fifo
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# Create instance: frame_summation_reor_0, and set properties
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set frame_summation_reor_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:frame_summation_reorder_compl:1.0 frame_summation_reor_0 ]
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# Create instance: load_from_hbm_0, and set properties
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set load_from_hbm_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:load_from_hbm:1.0 load_from_hbm_0 ]
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# Create instance: one, and set properties
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set one [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 one ]
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# Create instance: save_to_hbm_0, and set properties
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set save_to_hbm_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:save_to_hbm:1.0 save_to_hbm_0 ]
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# Create interface connections
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connect_bd_intf_net -intf_net Conn3 [get_bd_intf_pins data_out] [get_bd_intf_pins load_from_hbm_0/data_out]
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connect_bd_intf_net -intf_net Conn4 [get_bd_intf_pins m_axi_d_hbm_p12] [get_bd_intf_pins axi_datamover_0/M_AXI_MM2S]
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connect_bd_intf_net -intf_net Conn5 [get_bd_intf_pins m_axi_d_hbm_p13] [get_bd_intf_pins axi_datamover_0/M_AXI_S2MM]
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connect_bd_intf_net -intf_net Conn6 [get_bd_intf_pins m_axi_d_hbm_p14] [get_bd_intf_pins axi_datamover_1/M_AXI_MM2S]
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connect_bd_intf_net -intf_net Conn7 [get_bd_intf_pins m_axi_d_hbm_p15] [get_bd_intf_pins axi_datamover_1/M_AXI_S2MM]
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connect_bd_intf_net -intf_net Conn8 [get_bd_intf_pins m_axis_completion] [get_bd_intf_pins load_from_hbm_0/m_axis_completion]
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connect_bd_intf_net -intf_net Conn17 [get_bd_intf_pins addr_in] [get_bd_intf_pins save_to_hbm_0/addr_in]
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connect_bd_intf_net -intf_net Conn18 [get_bd_intf_pins data_in] [get_bd_intf_pins save_to_hbm_0/data_in]
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connect_bd_intf_net -intf_net axi_datamover_0_M_AXIS_MM2S [get_bd_intf_pins axi_datamover_0/M_AXIS_MM2S] [get_bd_intf_pins axis_datamover_fifo_2/S_AXIS]
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connect_bd_intf_net -intf_net axi_datamover_1_M_AXIS_MM2S [get_bd_intf_pins axi_datamover_1/M_AXIS_MM2S] [get_bd_intf_pins axis_datamover_fifo_3/S_AXIS]
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connect_bd_intf_net -intf_net axis_compl_fifo_0_M_AXIS [get_bd_intf_pins axis_compl_fifo_0/M_AXIS] [get_bd_intf_pins frame_summation_reor_0/s_axis_completion]
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connect_bd_intf_net -intf_net axis_compl_fifo_1_M_AXIS [get_bd_intf_pins axis_compl_fifo_1/M_AXIS] [get_bd_intf_pins load_from_hbm_0/s_axis_completion]
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connect_bd_intf_net -intf_net axis_data_fifo_2_M_AXIS [get_bd_intf_pins axis_data_fifo_2/M_AXIS] [get_bd_intf_pins frame_summation_reor_0/data_in]
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connect_bd_intf_net -intf_net axis_data_fifo_3_M_AXIS [get_bd_intf_pins axis_data_fifo_3/M_AXIS] [get_bd_intf_pins load_from_hbm_0/data_in]
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connect_bd_intf_net -intf_net axis_datamover_cmd_fifo_2_M_AXIS [get_bd_intf_pins axi_datamover_0/S_AXIS_MM2S_CMD] [get_bd_intf_pins axis_datamover_cmd_fifo_2/M_AXIS]
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connect_bd_intf_net -intf_net axis_datamover_cmd_fifo_3_M_AXIS [get_bd_intf_pins axi_datamover_1/S_AXIS_MM2S_CMD] [get_bd_intf_pins axis_datamover_cmd_fifo_3/M_AXIS]
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connect_bd_intf_net -intf_net axis_datamover_fifo_0_M_AXIS [get_bd_intf_pins axi_datamover_0/S_AXIS_S2MM] [get_bd_intf_pins axis_datamover_fifo_0/M_AXIS]
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connect_bd_intf_net -intf_net axis_datamover_fifo_1_M_AXIS [get_bd_intf_pins axi_datamover_0/S_AXIS_S2MM_CMD] [get_bd_intf_pins axis_datamover_cmd_fifo_0/M_AXIS]
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connect_bd_intf_net -intf_net axis_datamover_fifo_2_M_AXIS [get_bd_intf_pins axi_datamover_1/S_AXIS_S2MM] [get_bd_intf_pins axis_datamover_fifo_1/M_AXIS]
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connect_bd_intf_net -intf_net axis_datamover_fifo_2_M_AXIS1 [get_bd_intf_pins axis_datamover_fifo_2/M_AXIS] [get_bd_intf_pins load_from_hbm_0/hbm_in_0]
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connect_bd_intf_net -intf_net axis_datamover_fifo_3_M_AXIS [get_bd_intf_pins axi_datamover_1/S_AXIS_S2MM_CMD] [get_bd_intf_pins axis_datamover_cmd_fifo_1/M_AXIS]
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connect_bd_intf_net -intf_net axis_datamover_fifo_3_M_AXIS1 [get_bd_intf_pins axis_datamover_fifo_3/M_AXIS] [get_bd_intf_pins load_from_hbm_0/hbm_in_1]
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connect_bd_intf_net -intf_net axis_hbm_handles_fifo_M_AXIS [get_bd_intf_pins axis_hbm_handles_fifo/M_AXIS] [get_bd_intf_pins save_to_hbm_0/s_axis_free_handles]
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connect_bd_intf_net -intf_net frame_summation_reor_0_data_out [get_bd_intf_pins axis_data_fifo_3/S_AXIS] [get_bd_intf_pins frame_summation_reor_0/data_out]
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connect_bd_intf_net -intf_net frame_summation_reor_0_m_axis_completion [get_bd_intf_pins axis_compl_fifo_1/S_AXIS] [get_bd_intf_pins frame_summation_reor_0/m_axis_completion]
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connect_bd_intf_net -intf_net load_from_hbm_0_datamover_0_cmd [get_bd_intf_pins axis_datamover_cmd_fifo_2/S_AXIS] [get_bd_intf_pins load_from_hbm_0/datamover_0_cmd]
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connect_bd_intf_net -intf_net load_from_hbm_0_datamover_1_cmd [get_bd_intf_pins axis_datamover_cmd_fifo_3/S_AXIS] [get_bd_intf_pins load_from_hbm_0/datamover_1_cmd]
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connect_bd_intf_net -intf_net load_from_hbm_0_m_axis_free_handles [get_bd_intf_pins axis_hbm_handles_fifo/S_AXIS] [get_bd_intf_pins load_from_hbm_0/m_axis_free_handles]
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connect_bd_intf_net -intf_net save_to_hbm_0_data_out [get_bd_intf_pins axis_data_fifo_2/S_AXIS] [get_bd_intf_pins save_to_hbm_0/data_out]
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connect_bd_intf_net -intf_net save_to_hbm_0_datamover_0_cmd [get_bd_intf_pins axis_datamover_cmd_fifo_0/S_AXIS] [get_bd_intf_pins save_to_hbm_0/datamover_0_cmd]
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connect_bd_intf_net -intf_net save_to_hbm_0_datamover_1_cmd [get_bd_intf_pins axis_datamover_cmd_fifo_1/S_AXIS] [get_bd_intf_pins save_to_hbm_0/datamover_1_cmd]
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connect_bd_intf_net -intf_net save_to_hbm_0_hbm_out_0 [get_bd_intf_pins axis_datamover_fifo_0/S_AXIS] [get_bd_intf_pins save_to_hbm_0/hbm_out_0]
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connect_bd_intf_net -intf_net save_to_hbm_0_hbm_out_1 [get_bd_intf_pins axis_datamover_fifo_1/S_AXIS] [get_bd_intf_pins save_to_hbm_0/hbm_out_1]
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connect_bd_intf_net -intf_net save_to_hbm_0_m_axis_completion [get_bd_intf_pins axis_compl_fifo_0/S_AXIS] [get_bd_intf_pins save_to_hbm_0/m_axis_completion]
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# Create port connections
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connect_bd_net -net ap_rst_n_1 [get_bd_pins ap_rst_n] [get_bd_pins axi_datamover_0/m_axi_mm2s_aresetn] [get_bd_pins axi_datamover_0/m_axi_s2mm_aresetn] [get_bd_pins axi_datamover_0/m_axis_mm2s_cmdsts_aresetn] [get_bd_pins axi_datamover_0/m_axis_s2mm_cmdsts_aresetn] [get_bd_pins axi_datamover_1/m_axi_mm2s_aresetn] [get_bd_pins axi_datamover_1/m_axi_s2mm_aresetn] [get_bd_pins axi_datamover_1/m_axis_mm2s_cmdsts_aresetn] [get_bd_pins axi_datamover_1/m_axis_s2mm_cmdsts_aresetn] [get_bd_pins frame_summation_reor_0/ap_rst_n] [get_bd_pins load_from_hbm_0/ap_rst_n] [get_bd_pins save_to_hbm_0/ap_rst_n]
|
||||
connect_bd_net -net axi_clk_1 [get_bd_pins axi_clk] [get_bd_pins axi_datamover_0/m_axi_mm2s_aclk] [get_bd_pins axi_datamover_0/m_axi_s2mm_aclk] [get_bd_pins axi_datamover_0/m_axis_mm2s_cmdsts_aclk] [get_bd_pins axi_datamover_0/m_axis_s2mm_cmdsts_awclk] [get_bd_pins axi_datamover_1/m_axi_mm2s_aclk] [get_bd_pins axi_datamover_1/m_axi_s2mm_aclk] [get_bd_pins axi_datamover_1/m_axis_mm2s_cmdsts_aclk] [get_bd_pins axi_datamover_1/m_axis_s2mm_cmdsts_awclk] [get_bd_pins axis_compl_fifo_0/s_axis_aclk] [get_bd_pins axis_compl_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_datamover_cmd_fifo_0/s_axis_aclk] [get_bd_pins axis_datamover_cmd_fifo_1/s_axis_aclk] [get_bd_pins axis_datamover_cmd_fifo_2/s_axis_aclk] [get_bd_pins axis_datamover_cmd_fifo_3/s_axis_aclk] [get_bd_pins axis_datamover_fifo_0/s_axis_aclk] [get_bd_pins axis_datamover_fifo_1/s_axis_aclk] [get_bd_pins axis_datamover_fifo_2/s_axis_aclk] [get_bd_pins axis_datamover_fifo_3/s_axis_aclk] [get_bd_pins axis_hbm_handles_fifo/s_axis_aclk] [get_bd_pins frame_summation_reor_0/ap_clk] [get_bd_pins load_from_hbm_0/ap_clk] [get_bd_pins save_to_hbm_0/ap_clk]
|
||||
connect_bd_net -net axi_rst_n_1 [get_bd_pins axi_rst_n] [get_bd_pins axis_compl_fifo_0/s_axis_aresetn] [get_bd_pins axis_compl_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_datamover_cmd_fifo_0/s_axis_aresetn] [get_bd_pins axis_datamover_cmd_fifo_1/s_axis_aresetn] [get_bd_pins axis_datamover_cmd_fifo_2/s_axis_aresetn] [get_bd_pins axis_datamover_cmd_fifo_3/s_axis_aresetn] [get_bd_pins axis_datamover_fifo_0/s_axis_aresetn] [get_bd_pins axis_datamover_fifo_1/s_axis_aresetn] [get_bd_pins axis_datamover_fifo_2/s_axis_aresetn] [get_bd_pins axis_datamover_fifo_3/s_axis_aresetn] [get_bd_pins axis_hbm_handles_fifo/s_axis_aresetn]
|
||||
connect_bd_net -net axis_compl_fifo_0_almost_empty [get_bd_pins compl_fifo_empty] [get_bd_pins axis_compl_fifo_0/almost_empty]
|
||||
connect_bd_net -net axis_compl_fifo_0_almost_full [get_bd_pins compl_fifo_full] [get_bd_pins axis_compl_fifo_0/almost_full]
|
||||
connect_bd_net -net axis_hbm_handles_fifo_almost_empty [get_bd_pins hbm_handle_fifo_empty] [get_bd_pins axis_hbm_handles_fifo/almost_empty]
|
||||
connect_bd_net -net axis_hbm_handles_fifo_almost_full [get_bd_pins hbm_handle_fifo_full] [get_bd_pins axis_hbm_handles_fifo/almost_full]
|
||||
connect_bd_net -net hbm_size_bytes_1 [get_bd_pins hbm_size_bytes] [get_bd_pins load_from_hbm_0/hbm_size_bytes] [get_bd_pins save_to_hbm_0/hbm_size_bytes]
|
||||
connect_bd_net -net m_axis_s2mm_sts_tready_1 [get_bd_pins axi_datamover_0/m_axis_mm2s_sts_tready] [get_bd_pins axi_datamover_0/m_axis_s2mm_sts_tready] [get_bd_pins axi_datamover_1/m_axis_mm2s_sts_tready] [get_bd_pins axi_datamover_1/m_axis_s2mm_sts_tready] [get_bd_pins frame_summation_reor_0/ap_start] [get_bd_pins one/dout]
|
||||
|
||||
# Restore current instance
|
||||
current_bd_instance $oldCurInst
|
||||
}
|
||||
@@ -0,0 +1,308 @@
|
||||
## Copyright (2019-2023) Paul Scherrer Institute
|
||||
|
||||
# Hierarchical cell: image_processing
|
||||
proc create_hier_cell_image_processing { parentCell nameHier } {
|
||||
|
||||
variable script_folder
|
||||
|
||||
if { $parentCell eq "" || $nameHier eq "" } {
|
||||
catch {common::send_gid_msg -ssname BD::TCL -id 2092 -severity "ERROR" "create_hier_cell_image_processing() - Empty argument(s)!"}
|
||||
return
|
||||
}
|
||||
|
||||
# Get object for parentCell
|
||||
set parentObj [get_bd_cells $parentCell]
|
||||
if { $parentObj == "" } {
|
||||
catch {common::send_gid_msg -ssname BD::TCL -id 2090 -severity "ERROR" "Unable to find parent cell <$parentCell>!"}
|
||||
return
|
||||
}
|
||||
|
||||
# Make sure parentObj is hier blk
|
||||
set parentType [get_property TYPE $parentObj]
|
||||
if { $parentType ne "hier" } {
|
||||
catch {common::send_gid_msg -ssname BD::TCL -id 2091 -severity "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be <hier>."}
|
||||
return
|
||||
}
|
||||
|
||||
# Save current instance; Restore later
|
||||
set oldCurInst [current_bd_instance .]
|
||||
|
||||
# Set parent object as current
|
||||
current_bd_instance $parentObj
|
||||
|
||||
# Create cell and set as current instance
|
||||
set hier_obj [create_bd_cell -type hier $nameHier]
|
||||
current_bd_instance $hier_obj
|
||||
|
||||
# Create interface pins
|
||||
create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 data_in
|
||||
|
||||
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 data_out
|
||||
|
||||
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 integration_result_out
|
||||
|
||||
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p0
|
||||
|
||||
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p1
|
||||
|
||||
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p2
|
||||
|
||||
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p3
|
||||
|
||||
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p4
|
||||
|
||||
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p5
|
||||
|
||||
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p6
|
||||
|
||||
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p7
|
||||
|
||||
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p8
|
||||
|
||||
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p9
|
||||
|
||||
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p10
|
||||
|
||||
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p11
|
||||
|
||||
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p16
|
||||
|
||||
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p17
|
||||
|
||||
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p18
|
||||
|
||||
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p19
|
||||
|
||||
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 m_axis_completion
|
||||
|
||||
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 result_out
|
||||
|
||||
create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 s_axis_completion
|
||||
|
||||
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 spot_finder_out
|
||||
|
||||
|
||||
# Create pins
|
||||
create_bd_pin -dir I -type rst ap_rst_n
|
||||
create_bd_pin -dir I -type clk axi_clk
|
||||
create_bd_pin -dir I -type rst axi_rst_n
|
||||
create_bd_pin -dir I -from 31 -to 0 -type data hbm_size_bytes
|
||||
create_bd_pin -dir I -from 15 -to 0 -type data in_count_threshold
|
||||
create_bd_pin -dir I -from 7 -to 0 -type data in_snr_threshold
|
||||
|
||||
# Create instance: add_multipixel_0, and set properties
|
||||
set add_multipixel_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:add_multipixel:1.0 add_multipixel_0 ]
|
||||
|
||||
# Create instance: adu_histo_0, and set properties
|
||||
set adu_histo_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:adu_histo:1.0 adu_histo_0 ]
|
||||
|
||||
# Create instance: axis_128_to_512_0, and set properties
|
||||
set axis_128_to_512_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:axis_128_to_512:1.0 axis_128_to_512_0 ]
|
||||
|
||||
# Create instance: axis_32_to_512_0, and set properties
|
||||
set axis_32_to_512_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:axis_32_to_512:1.0 axis_32_to_512_0 ]
|
||||
|
||||
# Create instance: axis_compl_fifo_2, and set properties
|
||||
set axis_compl_fifo_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_compl_fifo_2 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {16} \
|
||||
CONFIG.HAS_AEMPTY {0} \
|
||||
CONFIG.HAS_AFULL {0} \
|
||||
] $axis_compl_fifo_2
|
||||
|
||||
# Create instance: axis_compl_fifo_3, and set properties
|
||||
set axis_compl_fifo_3 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_compl_fifo_3 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {16} \
|
||||
] $axis_compl_fifo_3
|
||||
|
||||
# Create instance: axis_compl_fifo_4, and set properties
|
||||
set axis_compl_fifo_4 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_compl_fifo_4 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {16} \
|
||||
] $axis_compl_fifo_4
|
||||
|
||||
# Create instance: axis_compl_fifo_5, and set properties
|
||||
set axis_compl_fifo_5 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_compl_fifo_5 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {16} \
|
||||
] $axis_compl_fifo_5
|
||||
|
||||
# Create instance: axis_data_fifo_3, and set properties
|
||||
set axis_data_fifo_3 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_3 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {256} \
|
||||
] $axis_data_fifo_3
|
||||
|
||||
# Create instance: axis_data_fifo_4, and set properties
|
||||
set axis_data_fifo_4 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_4 ]
|
||||
|
||||
# Create instance: axis_data_fifo_5, and set properties
|
||||
set axis_data_fifo_5 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_5 ]
|
||||
|
||||
# Create instance: axis_data_fifo_6, and set properties
|
||||
set axis_data_fifo_6 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_6 ]
|
||||
|
||||
# Create instance: axis_data_fifo_7, and set properties
|
||||
set axis_data_fifo_7 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_7 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {256} \
|
||||
] $axis_data_fifo_7
|
||||
|
||||
# Create instance: axis_data_fifo_8, and set properties
|
||||
set axis_data_fifo_8 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_8 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {256} \
|
||||
] $axis_data_fifo_8
|
||||
|
||||
# Create instance: axis_data_fifo_9, and set properties
|
||||
set axis_data_fifo_9 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_9 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {256} \
|
||||
] $axis_data_fifo_9
|
||||
|
||||
# Create instance: axis_data_fifo_10, and set properties
|
||||
set axis_data_fifo_10 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_10 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {256} \
|
||||
] $axis_data_fifo_10
|
||||
|
||||
# Create instance: axis_integration_result_fifo_0, and set properties
|
||||
set axis_integration_result_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_integration_result_fifo_0 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {256} \
|
||||
CONFIG.FIFO_MEMORY_TYPE {auto} \
|
||||
CONFIG.HAS_AEMPTY {0} \
|
||||
CONFIG.HAS_AFULL {0} \
|
||||
] $axis_integration_result_fifo_0
|
||||
|
||||
# Create instance: axis_integration_result_fifo_1, and set properties
|
||||
set axis_integration_result_fifo_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_integration_result_fifo_1 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {256} \
|
||||
CONFIG.FIFO_MEMORY_TYPE {auto} \
|
||||
CONFIG.HAS_AEMPTY {0} \
|
||||
CONFIG.HAS_AFULL {0} \
|
||||
] $axis_integration_result_fifo_1
|
||||
|
||||
# Create instance: axis_register_slice_data_1, and set properties
|
||||
set axis_register_slice_data_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_register_slice:1.1 axis_register_slice_data_1 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.REG_CONFIG {16} \
|
||||
] $axis_register_slice_data_1
|
||||
|
||||
# Create instance: axis_register_slice_data_2, and set properties
|
||||
set axis_register_slice_data_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_register_slice:1.1 axis_register_slice_data_2 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.REG_CONFIG {16} \
|
||||
] $axis_register_slice_data_2
|
||||
|
||||
# Create instance: axis_register_slice_data_3, and set properties
|
||||
set axis_register_slice_data_3 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_register_slice:1.1 axis_register_slice_data_3 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.REG_CONFIG {16} \
|
||||
] $axis_register_slice_data_3
|
||||
|
||||
# Create instance: axis_spot_finder_fifo_0, and set properties
|
||||
set axis_spot_finder_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_spot_finder_fifo_0 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {32768} \
|
||||
CONFIG.FIFO_MEMORY_TYPE {ultra} \
|
||||
] $axis_spot_finder_fifo_0
|
||||
|
||||
# Create instance: axis_spot_finder_fifo_1, and set properties
|
||||
set axis_spot_finder_fifo_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_spot_finder_fifo_1 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {16} \
|
||||
] $axis_spot_finder_fifo_1
|
||||
|
||||
# Create instance: bitshuffle_0, and set properties
|
||||
set bitshuffle_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:bitshuffle:1.0 bitshuffle_0 ]
|
||||
|
||||
# Create instance: frame_summation_0, and set properties
|
||||
set frame_summation_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:frame_summation:1.0 frame_summation_0 ]
|
||||
|
||||
# Create instance: integration_0, and set properties
|
||||
set integration_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:integration:1.0 integration_0 ]
|
||||
|
||||
# Create instance: jf_conversion_0, and set properties
|
||||
set jf_conversion_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:jf_conversion:1.0 jf_conversion_0 ]
|
||||
|
||||
# Create instance: mask_missing_0, and set properties
|
||||
set mask_missing_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:mask_missing:1.0 mask_missing_0 ]
|
||||
|
||||
# Create instance: one, and set properties
|
||||
set one [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 one ]
|
||||
|
||||
# Create instance: spot_finder_0, and set properties
|
||||
set spot_finder_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:spot_finder:1.0 spot_finder_0 ]
|
||||
|
||||
# Create interface connections
|
||||
connect_bd_intf_net -intf_net Conn1 [get_bd_intf_pins spot_finder_out] [get_bd_intf_pins axis_spot_finder_fifo_1/M_AXIS]
|
||||
connect_bd_intf_net -intf_net Conn2 [get_bd_intf_pins m_axi_d_hbm_p0] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p0]
|
||||
connect_bd_intf_net -intf_net Conn3 [get_bd_intf_pins integration_result_out] [get_bd_intf_pins axis_integration_result_fifo_1/M_AXIS]
|
||||
connect_bd_intf_net -intf_net Conn5 [get_bd_intf_pins m_axi_d_hbm_p16] [get_bd_intf_pins integration_0/m_axi_d_hbm_p0]
|
||||
connect_bd_intf_net -intf_net Conn6 [get_bd_intf_pins m_axi_d_hbm_p17] [get_bd_intf_pins integration_0/m_axi_d_hbm_p1]
|
||||
connect_bd_intf_net -intf_net Conn7 [get_bd_intf_pins m_axi_d_hbm_p18] [get_bd_intf_pins integration_0/m_axi_d_hbm_p2]
|
||||
connect_bd_intf_net -intf_net Conn8 [get_bd_intf_pins m_axi_d_hbm_p19] [get_bd_intf_pins integration_0/m_axi_d_hbm_p3]
|
||||
connect_bd_intf_net -intf_net Conn12 [get_bd_intf_pins m_axi_d_hbm_p3] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p3]
|
||||
connect_bd_intf_net -intf_net Conn13 [get_bd_intf_pins m_axi_d_hbm_p4] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p4]
|
||||
connect_bd_intf_net -intf_net Conn15 [get_bd_intf_pins m_axi_d_hbm_p5] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p5]
|
||||
connect_bd_intf_net -intf_net Conn17 [get_bd_intf_pins s_axis_completion] [get_bd_intf_pins adu_histo_0/s_axis_completion]
|
||||
connect_bd_intf_net -intf_net Conn19 [get_bd_intf_pins result_out] [get_bd_intf_pins adu_histo_0/result_out]
|
||||
connect_bd_intf_net -intf_net Conn21 [get_bd_intf_pins m_axi_d_hbm_p6] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p6]
|
||||
connect_bd_intf_net -intf_net Conn22 [get_bd_intf_pins data_out] [get_bd_intf_pins bitshuffle_0/data_out]
|
||||
connect_bd_intf_net -intf_net Conn23 [get_bd_intf_pins m_axi_d_hbm_p7] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p7]
|
||||
connect_bd_intf_net -intf_net Conn24 [get_bd_intf_pins m_axis_completion] [get_bd_intf_pins frame_summation_0/m_axis_completion]
|
||||
connect_bd_intf_net -intf_net Conn25 [get_bd_intf_pins data_in] [get_bd_intf_pins axis_data_fifo_3/S_AXIS]
|
||||
connect_bd_intf_net -intf_net Conn26 [get_bd_intf_pins m_axi_d_hbm_p8] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p8]
|
||||
connect_bd_intf_net -intf_net Conn27 [get_bd_intf_pins m_axi_d_hbm_p9] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p9]
|
||||
connect_bd_intf_net -intf_net Conn28 [get_bd_intf_pins m_axi_d_hbm_p10] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p10]
|
||||
connect_bd_intf_net -intf_net Conn29 [get_bd_intf_pins m_axi_d_hbm_p11] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p11]
|
||||
connect_bd_intf_net -intf_net Conn30 [get_bd_intf_pins m_axi_d_hbm_p2] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p2]
|
||||
connect_bd_intf_net -intf_net Conn31 [get_bd_intf_pins m_axi_d_hbm_p1] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p1]
|
||||
connect_bd_intf_net -intf_net add_multipixel_0_data_out [get_bd_intf_pins add_multipixel_0/data_out] [get_bd_intf_pins axis_data_fifo_10/S_AXIS]
|
||||
connect_bd_intf_net -intf_net adu_histo_0_data_out [get_bd_intf_pins adu_histo_0/data_out] [get_bd_intf_pins axis_data_fifo_4/S_AXIS]
|
||||
connect_bd_intf_net -intf_net adu_histo_0_m_axis_completion [get_bd_intf_pins adu_histo_0/m_axis_completion] [get_bd_intf_pins axis_compl_fifo_2/S_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_128_to_512_0_data_out [get_bd_intf_pins axis_128_to_512_0/data_out] [get_bd_intf_pins axis_integration_result_fifo_1/S_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_32_to_512_0_data_out [get_bd_intf_pins axis_32_to_512_0/data_out] [get_bd_intf_pins axis_spot_finder_fifo_1/S_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_compl_fifo_2_M_AXIS [get_bd_intf_pins axis_compl_fifo_2/M_AXIS] [get_bd_intf_pins mask_missing_0/s_axis_completion]
|
||||
connect_bd_intf_net -intf_net axis_compl_fifo_3_M_AXIS [get_bd_intf_pins axis_compl_fifo_3/M_AXIS] [get_bd_intf_pins jf_conversion_0/s_axis_completion]
|
||||
connect_bd_intf_net -intf_net axis_compl_fifo_4_M_AXIS [get_bd_intf_pins axis_compl_fifo_4/M_AXIS] [get_bd_intf_pins integration_0/s_axis_completion]
|
||||
connect_bd_intf_net -intf_net axis_compl_fifo_5_M_AXIS [get_bd_intf_pins axis_compl_fifo_5/M_AXIS] [get_bd_intf_pins frame_summation_0/s_axis_completion]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_3_M_AXIS [get_bd_intf_pins adu_histo_0/data_in] [get_bd_intf_pins axis_data_fifo_3/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_4_M_AXIS [get_bd_intf_pins axis_data_fifo_4/M_AXIS] [get_bd_intf_pins mask_missing_0/data_in]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_5_M_AXIS [get_bd_intf_pins axis_data_fifo_5/M_AXIS] [get_bd_intf_pins jf_conversion_0/data_in]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_6_M_AXIS [get_bd_intf_pins axis_data_fifo_6/M_AXIS] [get_bd_intf_pins axis_register_slice_data_1/S_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_7_M_AXIS [get_bd_intf_pins axis_data_fifo_7/M_AXIS] [get_bd_intf_pins frame_summation_0/data_in]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_8_M_AXIS [get_bd_intf_pins axis_data_fifo_8/M_AXIS] [get_bd_intf_pins spot_finder_0/data_in]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_9_M_AXIS [get_bd_intf_pins add_multipixel_0/data_in] [get_bd_intf_pins axis_data_fifo_9/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_9_M_AXIS1 [get_bd_intf_pins axis_data_fifo_10/M_AXIS] [get_bd_intf_pins bitshuffle_0/data_in]
|
||||
connect_bd_intf_net -intf_net axis_integration_result_fifo_0_M_AXIS [get_bd_intf_pins axis_128_to_512_0/data_in] [get_bd_intf_pins axis_integration_result_fifo_0/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_register_slice_data_1_M_AXIS [get_bd_intf_pins axis_register_slice_data_1/M_AXIS] [get_bd_intf_pins integration_0/data_in]
|
||||
connect_bd_intf_net -intf_net axis_register_slice_data_2_M_AXIS [get_bd_intf_pins axis_data_fifo_7/S_AXIS] [get_bd_intf_pins axis_register_slice_data_2/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_register_slice_data_3_M_AXIS [get_bd_intf_pins axis_data_fifo_9/S_AXIS] [get_bd_intf_pins axis_register_slice_data_3/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_spot_finder_fifo_0_M_AXIS [get_bd_intf_pins axis_32_to_512_0/data_in] [get_bd_intf_pins axis_spot_finder_fifo_0/M_AXIS]
|
||||
connect_bd_intf_net -intf_net frame_summation_0_data_out [get_bd_intf_pins axis_data_fifo_8/S_AXIS] [get_bd_intf_pins frame_summation_0/data_out]
|
||||
connect_bd_intf_net -intf_net integration_0_data_out [get_bd_intf_pins axis_register_slice_data_2/S_AXIS] [get_bd_intf_pins integration_0/data_out]
|
||||
connect_bd_intf_net -intf_net integration_0_m_axis_completion [get_bd_intf_pins axis_compl_fifo_5/S_AXIS] [get_bd_intf_pins integration_0/m_axis_completion]
|
||||
connect_bd_intf_net -intf_net integration_0_result_out [get_bd_intf_pins axis_integration_result_fifo_0/S_AXIS] [get_bd_intf_pins integration_0/result_out]
|
||||
connect_bd_intf_net -intf_net jf_conversion_0_data_out [get_bd_intf_pins axis_data_fifo_6/S_AXIS] [get_bd_intf_pins jf_conversion_0/data_out]
|
||||
connect_bd_intf_net -intf_net jf_conversion_0_m_axis_completion [get_bd_intf_pins axis_compl_fifo_4/S_AXIS] [get_bd_intf_pins jf_conversion_0/m_axis_completion]
|
||||
connect_bd_intf_net -intf_net mask_missing_0_data_out [get_bd_intf_pins axis_data_fifo_5/S_AXIS] [get_bd_intf_pins mask_missing_0/data_out]
|
||||
connect_bd_intf_net -intf_net mask_missing_0_m_axis_completion [get_bd_intf_pins axis_compl_fifo_3/S_AXIS] [get_bd_intf_pins mask_missing_0/m_axis_completion]
|
||||
connect_bd_intf_net -intf_net spot_finder_0_data_out [get_bd_intf_pins axis_register_slice_data_3/S_AXIS] [get_bd_intf_pins spot_finder_0/data_out]
|
||||
connect_bd_intf_net -intf_net spot_finder_0_strong_pixel_out [get_bd_intf_pins axis_spot_finder_fifo_0/S_AXIS] [get_bd_intf_pins spot_finder_0/strong_pixel_out]
|
||||
|
||||
# Create port connections
|
||||
connect_bd_net -net ap_rst_n_1 [get_bd_pins ap_rst_n] [get_bd_pins add_multipixel_0/ap_rst_n] [get_bd_pins adu_histo_0/ap_rst_n] [get_bd_pins axis_128_to_512_0/ap_rst_n] [get_bd_pins axis_32_to_512_0/ap_rst_n] [get_bd_pins bitshuffle_0/ap_rst_n] [get_bd_pins frame_summation_0/ap_rst_n] [get_bd_pins integration_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins mask_missing_0/ap_rst_n] [get_bd_pins spot_finder_0/ap_rst_n]
|
||||
connect_bd_net -net ap_start_1 [get_bd_pins add_multipixel_0/ap_start] [get_bd_pins frame_summation_0/ap_start] [get_bd_pins one/dout] [get_bd_pins spot_finder_0/ap_start]
|
||||
connect_bd_net -net axi_clk_1 [get_bd_pins axi_clk] [get_bd_pins add_multipixel_0/ap_clk] [get_bd_pins adu_histo_0/ap_clk] [get_bd_pins axis_128_to_512_0/ap_clk] [get_bd_pins axis_32_to_512_0/ap_clk] [get_bd_pins axis_compl_fifo_2/s_axis_aclk] [get_bd_pins axis_compl_fifo_3/s_axis_aclk] [get_bd_pins axis_compl_fifo_4/s_axis_aclk] [get_bd_pins axis_compl_fifo_5/s_axis_aclk] [get_bd_pins axis_data_fifo_10/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_5/s_axis_aclk] [get_bd_pins axis_data_fifo_6/s_axis_aclk] [get_bd_pins axis_data_fifo_7/s_axis_aclk] [get_bd_pins axis_data_fifo_8/s_axis_aclk] [get_bd_pins axis_data_fifo_9/s_axis_aclk] [get_bd_pins axis_integration_result_fifo_0/s_axis_aclk] [get_bd_pins axis_integration_result_fifo_1/s_axis_aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_2/aclk] [get_bd_pins axis_register_slice_data_3/aclk] [get_bd_pins axis_spot_finder_fifo_0/s_axis_aclk] [get_bd_pins axis_spot_finder_fifo_1/s_axis_aclk] [get_bd_pins bitshuffle_0/ap_clk] [get_bd_pins frame_summation_0/ap_clk] [get_bd_pins integration_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins mask_missing_0/ap_clk] [get_bd_pins spot_finder_0/ap_clk]
|
||||
connect_bd_net -net axi_rst_n_1 [get_bd_pins axi_rst_n] [get_bd_pins axis_compl_fifo_2/s_axis_aresetn] [get_bd_pins axis_compl_fifo_3/s_axis_aresetn] [get_bd_pins axis_compl_fifo_4/s_axis_aresetn] [get_bd_pins axis_compl_fifo_5/s_axis_aresetn] [get_bd_pins axis_data_fifo_10/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_5/s_axis_aresetn] [get_bd_pins axis_data_fifo_6/s_axis_aresetn] [get_bd_pins axis_data_fifo_7/s_axis_aresetn] [get_bd_pins axis_data_fifo_8/s_axis_aresetn] [get_bd_pins axis_data_fifo_9/s_axis_aresetn] [get_bd_pins axis_integration_result_fifo_0/s_axis_aresetn] [get_bd_pins axis_integration_result_fifo_1/s_axis_aresetn] [get_bd_pins axis_register_slice_data_1/aresetn] [get_bd_pins axis_register_slice_data_2/aresetn] [get_bd_pins axis_register_slice_data_3/aresetn] [get_bd_pins axis_spot_finder_fifo_0/s_axis_aresetn] [get_bd_pins axis_spot_finder_fifo_1/s_axis_aresetn]
|
||||
connect_bd_net -net hbm_size_bytes_1 [get_bd_pins hbm_size_bytes] [get_bd_pins integration_0/hbm_size_bytes] [get_bd_pins jf_conversion_0/hbm_size_bytes]
|
||||
connect_bd_net -net in_count_threshold_1 [get_bd_pins in_count_threshold] [get_bd_pins spot_finder_0/in_count_threshold]
|
||||
connect_bd_net -net in_snr_threshold_1 [get_bd_pins in_snr_threshold] [get_bd_pins spot_finder_0/in_snr_threshold]
|
||||
|
||||
# Restore current instance
|
||||
current_bd_instance $oldCurInst
|
||||
}
|
||||
+50
-359
@@ -114,56 +114,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
|
||||
CONFIG.MAX_MODULES_FPGA_PARAM {0x00000010} \
|
||||
] $action_config_0
|
||||
|
||||
# Create instance: add_multipixel_0, and set properties
|
||||
set add_multipixel_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:add_multipixel:1.0 add_multipixel_0 ]
|
||||
|
||||
# Create instance: adu_histo_0, and set properties
|
||||
set adu_histo_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:adu_histo:1.0 adu_histo_0 ]
|
||||
|
||||
# Create instance: axi_datamover_0, and set properties
|
||||
set axi_datamover_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_datamover:5.1 axi_datamover_0 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.c_addr_width {64} \
|
||||
CONFIG.c_dummy {1} \
|
||||
CONFIG.c_enable_mm2s {1} \
|
||||
CONFIG.c_include_mm2s {Full} \
|
||||
CONFIG.c_include_mm2s_stsfifo {true} \
|
||||
CONFIG.c_m_axi_mm2s_data_width {256} \
|
||||
CONFIG.c_m_axi_mm2s_id_width {6} \
|
||||
CONFIG.c_m_axi_s2mm_id_width {6} \
|
||||
CONFIG.c_m_axis_mm2s_tdata_width {256} \
|
||||
CONFIG.c_mm2s_btt_used {23} \
|
||||
CONFIG.c_mm2s_burst_size {16} \
|
||||
CONFIG.c_mm2s_include_sf {true} \
|
||||
CONFIG.c_s2mm_btt_used {23} \
|
||||
CONFIG.c_single_interface {0} \
|
||||
] $axi_datamover_0
|
||||
|
||||
# Create instance: axi_datamover_1, and set properties
|
||||
set axi_datamover_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_datamover:5.1 axi_datamover_1 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.c_addr_width {64} \
|
||||
CONFIG.c_dummy {1} \
|
||||
CONFIG.c_enable_mm2s {1} \
|
||||
CONFIG.c_include_mm2s {Full} \
|
||||
CONFIG.c_include_mm2s_stsfifo {true} \
|
||||
CONFIG.c_m_axi_mm2s_data_width {256} \
|
||||
CONFIG.c_m_axi_mm2s_id_width {6} \
|
||||
CONFIG.c_m_axi_s2mm_id_width {6} \
|
||||
CONFIG.c_m_axis_mm2s_tdata_width {256} \
|
||||
CONFIG.c_mm2s_btt_used {23} \
|
||||
CONFIG.c_mm2s_burst_size {16} \
|
||||
CONFIG.c_mm2s_include_sf {true} \
|
||||
CONFIG.c_s2mm_btt_used {23} \
|
||||
CONFIG.c_single_interface {0} \
|
||||
] $axi_datamover_1
|
||||
|
||||
# Create instance: axis_128_to_512_0, and set properties
|
||||
set axis_128_to_512_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:axis_128_to_512:1.0 axis_128_to_512_0 ]
|
||||
|
||||
# Create instance: axis_32_to_512_0, and set properties
|
||||
set axis_32_to_512_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:axis_32_to_512:1.0 axis_32_to_512_0 ]
|
||||
|
||||
# Create instance: axis_addr_fifo_0, and set properties
|
||||
set axis_addr_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_addr_fifo_0 ]
|
||||
set_property -dict [ list \
|
||||
@@ -179,15 +129,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
|
||||
CONFIG.FIFO_DEPTH {1024} \
|
||||
] $axis_adu_histo_result_fifo
|
||||
|
||||
# Create instance: axis_compl_fifo_0, and set properties
|
||||
set axis_compl_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_compl_fifo_0 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {2048} \
|
||||
CONFIG.FIFO_MEMORY_TYPE {ultra} \
|
||||
CONFIG.HAS_AEMPTY {1} \
|
||||
CONFIG.HAS_AFULL {1} \
|
||||
] $axis_compl_fifo_0
|
||||
|
||||
# Create instance: axis_compl_fifo_1, and set properties
|
||||
set axis_compl_fifo_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_compl_fifo_1 ]
|
||||
set_property -dict [ list \
|
||||
@@ -196,31 +137,11 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
|
||||
CONFIG.HAS_AFULL {1} \
|
||||
] $axis_compl_fifo_1
|
||||
|
||||
# Create instance: axis_compl_fifo_2, and set properties
|
||||
set axis_compl_fifo_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_compl_fifo_2 ]
|
||||
# Create instance: axis_compl_fifo_6, and set properties
|
||||
set axis_compl_fifo_6 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_compl_fifo_6 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {16} \
|
||||
CONFIG.HAS_AEMPTY {0} \
|
||||
CONFIG.HAS_AFULL {0} \
|
||||
] $axis_compl_fifo_2
|
||||
|
||||
# Create instance: axis_compl_fifo_3, and set properties
|
||||
set axis_compl_fifo_3 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_compl_fifo_3 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {16} \
|
||||
] $axis_compl_fifo_3
|
||||
|
||||
# Create instance: axis_compl_fifo_4, and set properties
|
||||
set axis_compl_fifo_4 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_compl_fifo_4 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {16} \
|
||||
] $axis_compl_fifo_4
|
||||
|
||||
# Create instance: axis_compl_fifo_5, and set properties
|
||||
set axis_compl_fifo_5 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_compl_fifo_5 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {16} \
|
||||
] $axis_compl_fifo_5
|
||||
] $axis_compl_fifo_6
|
||||
|
||||
# Create instance: axis_data_fifo_0, and set properties
|
||||
set axis_data_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_0 ]
|
||||
@@ -238,51 +159,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
|
||||
CONFIG.HAS_AFULL {1} \
|
||||
] $axis_data_fifo_1
|
||||
|
||||
# Create instance: axis_data_fifo_2, and set properties
|
||||
set axis_data_fifo_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_2 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {16} \
|
||||
] $axis_data_fifo_2
|
||||
|
||||
# Create instance: axis_data_fifo_3, and set properties
|
||||
set axis_data_fifo_3 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_3 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {256} \
|
||||
] $axis_data_fifo_3
|
||||
|
||||
# Create instance: axis_data_fifo_4, and set properties
|
||||
set axis_data_fifo_4 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_4 ]
|
||||
|
||||
# Create instance: axis_data_fifo_5, and set properties
|
||||
set axis_data_fifo_5 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_5 ]
|
||||
|
||||
# Create instance: axis_data_fifo_6, and set properties
|
||||
set axis_data_fifo_6 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_6 ]
|
||||
|
||||
# Create instance: axis_data_fifo_7, and set properties
|
||||
set axis_data_fifo_7 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_7 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {256} \
|
||||
] $axis_data_fifo_7
|
||||
|
||||
# Create instance: axis_data_fifo_8, and set properties
|
||||
set axis_data_fifo_8 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_8 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {256} \
|
||||
] $axis_data_fifo_8
|
||||
|
||||
# Create instance: axis_data_fifo_9, and set properties
|
||||
set axis_data_fifo_9 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_9 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {256} \
|
||||
] $axis_data_fifo_9
|
||||
|
||||
# Create instance: axis_data_fifo_10, and set properties
|
||||
set axis_data_fifo_10 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_10 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {256} \
|
||||
] $axis_data_fifo_10
|
||||
|
||||
# Create instance: axis_data_fifo_11, and set properties
|
||||
set axis_data_fifo_11 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_11 ]
|
||||
set_property -dict [ list \
|
||||
@@ -334,54 +210,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
|
||||
CONFIG.TDATA_NUM_BYTES {64} \
|
||||
] $axis_data_fifo_h2c_data
|
||||
|
||||
# Create instance: axis_datamover_cmd_fifo_0, and set properties
|
||||
set axis_datamover_cmd_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_datamover_cmd_fifo_0 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {16} \
|
||||
] $axis_datamover_cmd_fifo_0
|
||||
|
||||
# Create instance: axis_datamover_cmd_fifo_1, and set properties
|
||||
set axis_datamover_cmd_fifo_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_datamover_cmd_fifo_1 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {16} \
|
||||
] $axis_datamover_cmd_fifo_1
|
||||
|
||||
# Create instance: axis_datamover_cmd_fifo_2, and set properties
|
||||
set axis_datamover_cmd_fifo_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_datamover_cmd_fifo_2 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {16} \
|
||||
] $axis_datamover_cmd_fifo_2
|
||||
|
||||
# Create instance: axis_datamover_cmd_fifo_3, and set properties
|
||||
set axis_datamover_cmd_fifo_3 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_datamover_cmd_fifo_3 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {16} \
|
||||
] $axis_datamover_cmd_fifo_3
|
||||
|
||||
# Create instance: axis_datamover_fifo_0, and set properties
|
||||
set axis_datamover_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_datamover_fifo_0 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {2048} \
|
||||
] $axis_datamover_fifo_0
|
||||
|
||||
# Create instance: axis_datamover_fifo_1, and set properties
|
||||
set axis_datamover_fifo_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_datamover_fifo_1 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {2048} \
|
||||
] $axis_datamover_fifo_1
|
||||
|
||||
# Create instance: axis_datamover_fifo_2, and set properties
|
||||
set axis_datamover_fifo_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_datamover_fifo_2 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {2048} \
|
||||
] $axis_datamover_fifo_2
|
||||
|
||||
# Create instance: axis_datamover_fifo_3, and set properties
|
||||
set axis_datamover_fifo_3 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_datamover_fifo_3 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {2048} \
|
||||
] $axis_datamover_fifo_3
|
||||
|
||||
# Create instance: axis_eth_in_fifo, and set properties
|
||||
set axis_eth_in_fifo [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_eth_in_fifo ]
|
||||
set_property -dict [ list \
|
||||
@@ -396,32 +224,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
|
||||
CONFIG.HAS_AFULL {1} \
|
||||
] $axis_frame_generator_fifo_0
|
||||
|
||||
# Create instance: axis_hbm_handles_fifo, and set properties
|
||||
set axis_hbm_handles_fifo [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_hbm_handles_fifo ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {2048} \
|
||||
CONFIG.HAS_AEMPTY {1} \
|
||||
CONFIG.HAS_AFULL {1} \
|
||||
] $axis_hbm_handles_fifo
|
||||
|
||||
# Create instance: axis_integration_result_fifo_0, and set properties
|
||||
set axis_integration_result_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_integration_result_fifo_0 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {256} \
|
||||
CONFIG.FIFO_MEMORY_TYPE {auto} \
|
||||
CONFIG.HAS_AEMPTY {0} \
|
||||
CONFIG.HAS_AFULL {0} \
|
||||
] $axis_integration_result_fifo_0
|
||||
|
||||
# Create instance: axis_integration_result_fifo_1, and set properties
|
||||
set axis_integration_result_fifo_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_integration_result_fifo_1 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {256} \
|
||||
CONFIG.FIFO_MEMORY_TYPE {auto} \
|
||||
CONFIG.HAS_AEMPTY {0} \
|
||||
CONFIG.HAS_AFULL {0} \
|
||||
] $axis_integration_result_fifo_1
|
||||
|
||||
# Create instance: axis_register_slice_addr_0, and set properties
|
||||
set axis_register_slice_addr_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_register_slice:1.1 axis_register_slice_addr_0 ]
|
||||
set_property -dict [ list \
|
||||
@@ -434,30 +236,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
|
||||
CONFIG.REG_CONFIG {16} \
|
||||
] $axis_register_slice_data_0
|
||||
|
||||
# Create instance: axis_register_slice_data_1, and set properties
|
||||
set axis_register_slice_data_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_register_slice:1.1 axis_register_slice_data_1 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.REG_CONFIG {16} \
|
||||
] $axis_register_slice_data_1
|
||||
|
||||
# Create instance: axis_register_slice_data_2, and set properties
|
||||
set axis_register_slice_data_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_register_slice:1.1 axis_register_slice_data_2 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.REG_CONFIG {16} \
|
||||
] $axis_register_slice_data_2
|
||||
|
||||
# Create instance: axis_register_slice_data_3, and set properties
|
||||
set axis_register_slice_data_3 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_register_slice:1.1 axis_register_slice_data_3 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.REG_CONFIG {16} \
|
||||
] $axis_register_slice_data_3
|
||||
|
||||
# Create instance: axis_register_slice_data_4, and set properties
|
||||
set axis_register_slice_data_4 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_register_slice:1.1 axis_register_slice_data_4 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.REG_CONFIG {16} \
|
||||
] $axis_register_slice_data_4
|
||||
|
||||
# Create instance: axis_register_slice_data_in_0, and set properties
|
||||
set axis_register_slice_data_in_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_register_slice:1.1 axis_register_slice_data_in_0 ]
|
||||
set_property -dict [ list \
|
||||
@@ -476,19 +254,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
|
||||
CONFIG.REG_CONFIG {16} \
|
||||
] $axis_register_slice_udp
|
||||
|
||||
# Create instance: axis_spot_finder_fifo_0, and set properties
|
||||
set axis_spot_finder_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_spot_finder_fifo_0 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {32768} \
|
||||
CONFIG.FIFO_MEMORY_TYPE {ultra} \
|
||||
] $axis_spot_finder_fifo_0
|
||||
|
||||
# Create instance: axis_spot_finder_fifo_1, and set properties
|
||||
set axis_spot_finder_fifo_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_spot_finder_fifo_1 ]
|
||||
set_property -dict [ list \
|
||||
CONFIG.FIFO_DEPTH {16} \
|
||||
] $axis_spot_finder_fifo_1
|
||||
|
||||
# Create instance: axis_udp_addr_fifo_0, and set properties
|
||||
set axis_udp_addr_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_udp_addr_fifo_0 ]
|
||||
set_property -dict [ list \
|
||||
@@ -523,30 +288,24 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
|
||||
CONFIG.HAS_PROG_FULL {0} \
|
||||
] $axis_work_request_fifo_0
|
||||
|
||||
# Create instance: bitshuffle_0, and set properties
|
||||
set bitshuffle_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:bitshuffle:1.0 bitshuffle_0 ]
|
||||
|
||||
# Create instance: data_collection_fsm_0, and set properties
|
||||
set data_collection_fsm_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:data_collection_fsm:1.0 data_collection_fsm_0 ]
|
||||
|
||||
# Create instance: frame_generator_0, and set properties
|
||||
set frame_generator_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:frame_generator:1.0 frame_generator_0 ]
|
||||
|
||||
# Create instance: hbm_cache
|
||||
create_hier_cell_hbm_cache $hier_obj hbm_cache
|
||||
|
||||
# Create instance: host_writer_0, and set properties
|
||||
set host_writer_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:host_writer:1.0 host_writer_0 ]
|
||||
|
||||
# Create instance: integration_0, and set properties
|
||||
set integration_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:integration:1.0 integration_0 ]
|
||||
|
||||
# Create instance: jf_conversion_0, and set properties
|
||||
set jf_conversion_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:jf_conversion:1.0 jf_conversion_0 ]
|
||||
# Create instance: image_processing
|
||||
create_hier_cell_image_processing $hier_obj image_processing
|
||||
|
||||
# Create instance: load_calibration_0, and set properties
|
||||
set load_calibration_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:load_calibration:1.0 load_calibration_0 ]
|
||||
|
||||
# Create instance: load_from_hbm_0, and set properties
|
||||
set load_from_hbm_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:load_from_hbm:1.0 load_from_hbm_0 ]
|
||||
|
||||
# Create instance: mailbox_0, and set properties
|
||||
set mailbox_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:mailbox:2.1 mailbox_0 ]
|
||||
set_property -dict [ list \
|
||||
@@ -555,21 +314,9 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
|
||||
CONFIG.C_MAILBOX_DEPTH {256} \
|
||||
] $mailbox_0
|
||||
|
||||
# Create instance: mask_missing_0, and set properties
|
||||
set mask_missing_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:mask_missing:1.0 mask_missing_0 ]
|
||||
|
||||
# Create instance: module_upside_down_0, and set properties
|
||||
set module_upside_down_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:module_upside_down:1.0 module_upside_down_0 ]
|
||||
|
||||
# Create instance: network_stack
|
||||
create_hier_cell_network_stack $hier_obj network_stack
|
||||
|
||||
# Create instance: one, and set properties
|
||||
set one [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 one ]
|
||||
|
||||
# Create instance: save_to_hbm_0, and set properties
|
||||
set save_to_hbm_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:save_to_hbm:1.0 save_to_hbm_0 ]
|
||||
|
||||
# Create instance: smartconnect_0, and set properties
|
||||
set smartconnect_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_0 ]
|
||||
set_property -dict [ list \
|
||||
@@ -584,9 +331,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
|
||||
# Create instance: smartconnect_2, and set properties
|
||||
set smartconnect_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_2 ]
|
||||
|
||||
# Create instance: spot_finder_0, and set properties
|
||||
set spot_finder_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:spot_finder:1.0 spot_finder_0 ]
|
||||
|
||||
# Create instance: stream_merge_0, and set properties
|
||||
set stream_merge_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:stream_merge:1.0 stream_merge_0 ]
|
||||
|
||||
@@ -599,131 +343,78 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
|
||||
# Create interface connections
|
||||
connect_bd_intf_net -intf_net Conn2 [get_bd_intf_pins eth_out] [get_bd_intf_pins network_stack/M00_AXIS]
|
||||
connect_bd_intf_net -intf_net S_AXIS_1 [get_bd_intf_pins s_axis_h2c_data] [get_bd_intf_pins axis_data_fifo_h2c_data/S_AXIS]
|
||||
connect_bd_intf_net -intf_net add_multipixel_0_data_out [get_bd_intf_pins add_multipixel_0/data_out] [get_bd_intf_pins axis_data_fifo_10/S_AXIS]
|
||||
connect_bd_intf_net -intf_net adu_histo_0_data_out [get_bd_intf_pins adu_histo_0/data_out] [get_bd_intf_pins axis_data_fifo_4/S_AXIS]
|
||||
connect_bd_intf_net -intf_net adu_histo_0_m_axis_completion [get_bd_intf_pins adu_histo_0/m_axis_completion] [get_bd_intf_pins axis_compl_fifo_2/S_AXIS]
|
||||
connect_bd_intf_net -intf_net adu_histo_0_result_out [get_bd_intf_pins adu_histo_0/result_out] [get_bd_intf_pins axis_adu_histo_result_fifo/S_AXIS]
|
||||
connect_bd_intf_net -intf_net axi_datamover_0_M_AXIS_MM2S [get_bd_intf_pins axi_datamover_0/M_AXIS_MM2S] [get_bd_intf_pins axis_datamover_fifo_2/S_AXIS]
|
||||
connect_bd_intf_net -intf_net axi_datamover_0_M_AXI_MM2S [get_bd_intf_pins m_axi_d_hbm_p12] [get_bd_intf_pins axi_datamover_0/M_AXI_MM2S]
|
||||
connect_bd_intf_net -intf_net axi_datamover_0_M_AXI_S2MM [get_bd_intf_pins m_axi_d_hbm_p13] [get_bd_intf_pins axi_datamover_0/M_AXI_S2MM]
|
||||
connect_bd_intf_net -intf_net axi_datamover_1_M_AXIS_MM2S [get_bd_intf_pins axi_datamover_1/M_AXIS_MM2S] [get_bd_intf_pins axis_datamover_fifo_3/S_AXIS]
|
||||
connect_bd_intf_net -intf_net axi_datamover_1_M_AXI_MM2S [get_bd_intf_pins m_axi_d_hbm_p14] [get_bd_intf_pins axi_datamover_1/M_AXI_MM2S]
|
||||
connect_bd_intf_net -intf_net axi_datamover_1_M_AXI_S2MM [get_bd_intf_pins m_axi_d_hbm_p15] [get_bd_intf_pins axi_datamover_1/M_AXI_S2MM]
|
||||
connect_bd_intf_net -intf_net axis_128_to_512_0_data_out [get_bd_intf_pins axis_128_to_512_0/data_out] [get_bd_intf_pins axis_integration_result_fifo_1/S_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_32_to_512_0_data_out [get_bd_intf_pins axis_32_to_512_0/data_out] [get_bd_intf_pins axis_spot_finder_fifo_1/S_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_addr_fifo_0_M_AXIS [get_bd_intf_pins axis_addr_fifo_0/M_AXIS] [get_bd_intf_pins axis_register_slice_addr_0/S_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_adu_histo_result_fifo_M_AXIS [get_bd_intf_pins axis_adu_histo_result_fifo/M_AXIS] [get_bd_intf_pins host_writer_0/adu_histo_in]
|
||||
connect_bd_intf_net -intf_net axis_compl_fifo_0_M_AXIS [get_bd_intf_pins axis_compl_fifo_0/M_AXIS] [get_bd_intf_pins load_from_hbm_0/s_axis_completion]
|
||||
connect_bd_intf_net -intf_net axis_compl_fifo_1_M_AXIS [get_bd_intf_pins adu_histo_0/s_axis_completion] [get_bd_intf_pins axis_compl_fifo_1/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_compl_fifo_2_M_AXIS [get_bd_intf_pins axis_compl_fifo_4/M_AXIS] [get_bd_intf_pins integration_0/s_axis_completion]
|
||||
connect_bd_intf_net -intf_net axis_compl_fifo_2_M_AXIS1 [get_bd_intf_pins axis_compl_fifo_3/M_AXIS] [get_bd_intf_pins jf_conversion_0/s_axis_completion]
|
||||
connect_bd_intf_net -intf_net axis_compl_fifo_2_M_AXIS2 [get_bd_intf_pins axis_compl_fifo_2/M_AXIS] [get_bd_intf_pins mask_missing_0/s_axis_completion]
|
||||
connect_bd_intf_net -intf_net axis_compl_fifo_3_M_AXIS [get_bd_intf_pins axis_compl_fifo_5/M_AXIS] [get_bd_intf_pins host_writer_0/s_axis_completion]
|
||||
connect_bd_intf_net -intf_net axis_compl_fifo_1_M_AXIS [get_bd_intf_pins axis_compl_fifo_1/M_AXIS] [get_bd_intf_pins image_processing/s_axis_completion]
|
||||
connect_bd_intf_net -intf_net axis_compl_fifo_6_M_AXIS [get_bd_intf_pins axis_compl_fifo_6/M_AXIS] [get_bd_intf_pins host_writer_0/s_axis_completion]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_0_M_AXIS [get_bd_intf_pins axis_data_fifo_0/M_AXIS] [get_bd_intf_pins timer_hbm/data_in]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_10_M_AXIS [get_bd_intf_pins axis_spot_finder_fifo_1/M_AXIS] [get_bd_intf_pins host_writer_0/spot_finder_in]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_10_M_AXIS1 [get_bd_intf_pins axis_data_fifo_11/M_AXIS] [get_bd_intf_pins timer_host/data_in]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_12_M_AXIS [get_bd_intf_pins axis_data_fifo_4/M_AXIS] [get_bd_intf_pins mask_missing_0/data_in]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_1_M_AXIS [get_bd_intf_pins axis_data_fifo_1/M_AXIS] [get_bd_intf_pins axis_register_slice_data_0/S_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_2_M_AXIS [get_bd_intf_pins axis_data_fifo_2/M_AXIS] [get_bd_intf_pins load_from_hbm_0/data_in]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_3_M_AXIS [get_bd_intf_pins adu_histo_0/data_in] [get_bd_intf_pins axis_data_fifo_3/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_5_M_AXIS [get_bd_intf_pins axis_data_fifo_5/M_AXIS] [get_bd_intf_pins jf_conversion_0/data_in]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_6_M_AXIS [get_bd_intf_pins axis_data_fifo_6/M_AXIS] [get_bd_intf_pins axis_register_slice_data_1/S_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_7_M_AXIS [get_bd_intf_pins axis_data_fifo_7/M_AXIS] [get_bd_intf_pins integration_0/data_in]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_8_M_AXIS [get_bd_intf_pins axis_data_fifo_8/M_AXIS] [get_bd_intf_pins axis_register_slice_data_3/S_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_9_M_AXIS [get_bd_intf_pins axis_data_fifo_12/M_AXIS] [get_bd_intf_pins host_writer_0/data_in]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_9_M_AXIS1 [get_bd_intf_pins axis_data_fifo_10/M_AXIS] [get_bd_intf_pins bitshuffle_0/data_in]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_9_M_AXIS2 [get_bd_intf_pins add_multipixel_0/data_in] [get_bd_intf_pins axis_data_fifo_9/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_c2h_cmd_M_AXIS [get_bd_intf_pins m_axis_c2h_datamover_cmd] [get_bd_intf_pins axis_data_fifo_c2h_cmd/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_c2h_data_M_AXIS [get_bd_intf_pins m_axis_c2h_data] [get_bd_intf_pins axis_data_fifo_c2h_data/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_h2c_cmd_M_AXIS [get_bd_intf_pins m_axis_h2c_datamover_cmd] [get_bd_intf_pins axis_data_fifo_h2c_cmd/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_data_fifo_h2c_data_M_AXIS [get_bd_intf_pins axis_data_fifo_h2c_data/M_AXIS] [get_bd_intf_pins axis_register_slice_data_in_0/S_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_datamover_cmd_fifo_2_M_AXIS [get_bd_intf_pins axi_datamover_0/S_AXIS_MM2S_CMD] [get_bd_intf_pins axis_datamover_cmd_fifo_2/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_datamover_cmd_fifo_3_M_AXIS [get_bd_intf_pins axi_datamover_1/S_AXIS_MM2S_CMD] [get_bd_intf_pins axis_datamover_cmd_fifo_3/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_datamover_fifo_0_M_AXIS [get_bd_intf_pins axi_datamover_0/S_AXIS_S2MM] [get_bd_intf_pins axis_datamover_fifo_0/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_datamover_fifo_1_M_AXIS [get_bd_intf_pins axi_datamover_0/S_AXIS_S2MM_CMD] [get_bd_intf_pins axis_datamover_cmd_fifo_0/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_datamover_fifo_2_M_AXIS [get_bd_intf_pins axi_datamover_1/S_AXIS_S2MM] [get_bd_intf_pins axis_datamover_fifo_1/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_datamover_fifo_2_M_AXIS1 [get_bd_intf_pins axis_datamover_fifo_2/M_AXIS] [get_bd_intf_pins load_from_hbm_0/hbm_in_0]
|
||||
connect_bd_intf_net -intf_net axis_datamover_fifo_3_M_AXIS [get_bd_intf_pins axi_datamover_1/S_AXIS_S2MM_CMD] [get_bd_intf_pins axis_datamover_cmd_fifo_1/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_datamover_fifo_3_M_AXIS1 [get_bd_intf_pins axis_datamover_fifo_3/M_AXIS] [get_bd_intf_pins load_from_hbm_0/hbm_in_1]
|
||||
connect_bd_intf_net -intf_net axis_eth_in_fifo_M_AXIS [get_bd_intf_pins axis_eth_in_fifo/M_AXIS] [get_bd_intf_pins network_stack/eth_in]
|
||||
connect_bd_intf_net -intf_net axis_frame_generator_fifo_0_M_AXIS [get_bd_intf_pins axis_frame_generator_fifo_0/M_AXIS] [get_bd_intf_pins stream_merge_0/input_0]
|
||||
connect_bd_intf_net -intf_net axis_hbm_handles_fifo_M_AXIS [get_bd_intf_pins axis_hbm_handles_fifo/M_AXIS] [get_bd_intf_pins save_to_hbm_0/s_axis_free_handles]
|
||||
connect_bd_intf_net -intf_net axis_integration_result_fifo1_M_AXIS [get_bd_intf_pins axis_integration_result_fifo_1/M_AXIS] [get_bd_intf_pins host_writer_0/integration_in]
|
||||
connect_bd_intf_net -intf_net axis_integration_result_fifo_M_AXIS [get_bd_intf_pins axis_128_to_512_0/data_in] [get_bd_intf_pins axis_integration_result_fifo_0/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_register_slice_0_M_AXIS [get_bd_intf_pins axis_data_fifo_9/S_AXIS] [get_bd_intf_pins axis_register_slice_data_4/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_register_slice_1_M_AXIS [get_bd_intf_pins axis_register_slice_data_3/M_AXIS] [get_bd_intf_pins module_upside_down_0/data_in]
|
||||
connect_bd_intf_net -intf_net axis_register_slice_addr_0_M_AXIS [get_bd_intf_pins axis_register_slice_addr_0/M_AXIS] [get_bd_intf_pins save_to_hbm_0/addr_in]
|
||||
connect_bd_intf_net -intf_net axis_register_slice_data_0_M_AXIS [get_bd_intf_pins axis_register_slice_data_0/M_AXIS] [get_bd_intf_pins save_to_hbm_0/data_in]
|
||||
connect_bd_intf_net -intf_net axis_register_slice_data_1_M_AXIS [get_bd_intf_pins axis_register_slice_data_1/M_AXIS] [get_bd_intf_pins spot_finder_0/data_in]
|
||||
connect_bd_intf_net -intf_net axis_register_slice_data_2_M_AXIS [get_bd_intf_pins axis_data_fifo_7/S_AXIS] [get_bd_intf_pins axis_register_slice_data_2/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_register_slice_addr_0_M_AXIS [get_bd_intf_pins axis_register_slice_addr_0/M_AXIS] [get_bd_intf_pins hbm_cache/addr_in]
|
||||
connect_bd_intf_net -intf_net axis_register_slice_data_0_M_AXIS [get_bd_intf_pins axis_register_slice_data_0/M_AXIS] [get_bd_intf_pins hbm_cache/data_in]
|
||||
connect_bd_intf_net -intf_net axis_register_slice_data_in_0_M_AXIS1 [get_bd_intf_pins axis_register_slice_data_in_0/M_AXIS] [get_bd_intf_pins load_calibration_0/host_memory_in]
|
||||
connect_bd_intf_net -intf_net axis_register_slice_host_mem_M_AXIS [get_bd_intf_pins axis_data_fifo_c2h_data/S_AXIS] [get_bd_intf_pins axis_register_slice_host_mem/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_register_slice_udp_M_AXIS [get_bd_intf_pins axis_register_slice_udp/M_AXIS] [get_bd_intf_pins data_collection_fsm_0/eth_in]
|
||||
connect_bd_intf_net -intf_net axis_spot_finder_fifo_0_M_AXIS [get_bd_intf_pins axis_32_to_512_0/data_in] [get_bd_intf_pins axis_spot_finder_fifo_0/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_udp_addr_fifo_0_M_AXIS [get_bd_intf_pins axis_udp_addr_fifo_0/M_AXIS] [get_bd_intf_pins data_collection_fsm_0/addr_in]
|
||||
connect_bd_intf_net -intf_net axis_udp_fifo_0_M_AXIS [get_bd_intf_pins axis_register_slice_udp/S_AXIS] [get_bd_intf_pins axis_udp_fifo_0/M_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_work_completion_fifo_0_M_AXIS [get_bd_intf_pins axis_work_completion_fifo_0/M_AXIS] [get_bd_intf_pins mailbox_0/S1_AXIS]
|
||||
connect_bd_intf_net -intf_net axis_work_request_fifo_0_M_AXIS [get_bd_intf_pins axis_work_request_fifo_0/M_AXIS] [get_bd_intf_pins host_writer_0/s_axis_work_request]
|
||||
connect_bd_intf_net -intf_net bitshuffle_0_data_out [get_bd_intf_pins axis_data_fifo_11/S_AXIS] [get_bd_intf_pins bitshuffle_0/data_out]
|
||||
connect_bd_intf_net -intf_net data_collection_fsm_0_addr_out [get_bd_intf_pins axis_addr_fifo_0/S_AXIS] [get_bd_intf_pins data_collection_fsm_0/addr_out]
|
||||
connect_bd_intf_net -intf_net data_collection_fsm_0_data_out [get_bd_intf_pins axis_data_fifo_0/S_AXIS] [get_bd_intf_pins data_collection_fsm_0/data_out]
|
||||
connect_bd_intf_net -intf_net eth_in_1 [get_bd_intf_pins eth_in] [get_bd_intf_pins stream_merge_0/input_1]
|
||||
connect_bd_intf_net -intf_net frame_generator_0_data_out [get_bd_intf_pins axis_frame_generator_fifo_0/S_AXIS] [get_bd_intf_pins frame_generator_0/data_out]
|
||||
connect_bd_intf_net -intf_net frame_generator_0_m_axi_d_hbm_p0 [get_bd_intf_pins m_axi_d_hbm_p20] [get_bd_intf_pins frame_generator_0/m_axi_d_hbm_p0]
|
||||
connect_bd_intf_net -intf_net frame_generator_0_m_axi_d_hbm_p1 [get_bd_intf_pins m_axi_d_hbm_p21] [get_bd_intf_pins frame_generator_0/m_axi_d_hbm_p1]
|
||||
connect_bd_intf_net -intf_net hbm_cache_data_out [get_bd_intf_pins hbm_cache/data_out] [get_bd_intf_pins image_processing/data_in]
|
||||
connect_bd_intf_net -intf_net hbm_cache_m_axi_d_hbm_p12 [get_bd_intf_pins m_axi_d_hbm_p12] [get_bd_intf_pins hbm_cache/m_axi_d_hbm_p12]
|
||||
connect_bd_intf_net -intf_net hbm_cache_m_axi_d_hbm_p13 [get_bd_intf_pins m_axi_d_hbm_p13] [get_bd_intf_pins hbm_cache/m_axi_d_hbm_p13]
|
||||
connect_bd_intf_net -intf_net hbm_cache_m_axi_d_hbm_p14 [get_bd_intf_pins m_axi_d_hbm_p14] [get_bd_intf_pins hbm_cache/m_axi_d_hbm_p14]
|
||||
connect_bd_intf_net -intf_net hbm_cache_m_axi_d_hbm_p15 [get_bd_intf_pins m_axi_d_hbm_p15] [get_bd_intf_pins hbm_cache/m_axi_d_hbm_p15]
|
||||
connect_bd_intf_net -intf_net hbm_cache_m_axis_completion [get_bd_intf_pins axis_compl_fifo_1/S_AXIS] [get_bd_intf_pins hbm_cache/m_axis_completion]
|
||||
connect_bd_intf_net -intf_net host_writer_0_datamover_out_cmd [get_bd_intf_pins axis_data_fifo_c2h_cmd/S_AXIS] [get_bd_intf_pins host_writer_0/datamover_out_cmd]
|
||||
connect_bd_intf_net -intf_net host_writer_0_host_memory_out [get_bd_intf_pins axis_register_slice_host_mem/S_AXIS] [get_bd_intf_pins host_writer_0/host_memory_out]
|
||||
connect_bd_intf_net -intf_net host_writer_0_m_axis_completion [get_bd_intf_pins axis_work_completion_fifo_0/S_AXIS] [get_bd_intf_pins host_writer_0/m_axis_completion]
|
||||
connect_bd_intf_net -intf_net integration_0_data_out [get_bd_intf_pins axis_data_fifo_8/S_AXIS] [get_bd_intf_pins integration_0/data_out]
|
||||
connect_bd_intf_net -intf_net integration_0_m_axi_d_hbm_p0 [get_bd_intf_pins m_axi_d_hbm_p16] [get_bd_intf_pins integration_0/m_axi_d_hbm_p0]
|
||||
connect_bd_intf_net -intf_net integration_0_m_axi_d_hbm_p1 [get_bd_intf_pins m_axi_d_hbm_p17] [get_bd_intf_pins integration_0/m_axi_d_hbm_p1]
|
||||
connect_bd_intf_net -intf_net integration_0_m_axi_d_hbm_p2 [get_bd_intf_pins m_axi_d_hbm_p18] [get_bd_intf_pins integration_0/m_axi_d_hbm_p2]
|
||||
connect_bd_intf_net -intf_net integration_0_m_axi_d_hbm_p3 [get_bd_intf_pins m_axi_d_hbm_p19] [get_bd_intf_pins integration_0/m_axi_d_hbm_p3]
|
||||
connect_bd_intf_net -intf_net integration_0_m_axis_completion [get_bd_intf_pins axis_compl_fifo_5/S_AXIS] [get_bd_intf_pins integration_0/m_axis_completion]
|
||||
connect_bd_intf_net -intf_net integration_0_result_out [get_bd_intf_pins axis_integration_result_fifo_0/S_AXIS] [get_bd_intf_pins integration_0/result_out]
|
||||
connect_bd_intf_net -intf_net jf_conversion_0_data_out [get_bd_intf_pins axis_data_fifo_6/S_AXIS] [get_bd_intf_pins jf_conversion_0/data_out]
|
||||
connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p0 [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p0] [get_bd_intf_pins smartconnect_1/S00_AXI]
|
||||
connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p1 [get_bd_intf_pins m_axi_d_hbm_p1] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p1]
|
||||
connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p2 [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p2] [get_bd_intf_pins smartconnect_2/S00_AXI]
|
||||
connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p3 [get_bd_intf_pins m_axi_d_hbm_p3] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p3]
|
||||
connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p4 [get_bd_intf_pins m_axi_d_hbm_p4] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p4]
|
||||
connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p5 [get_bd_intf_pins m_axi_d_hbm_p5] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p5]
|
||||
connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p6 [get_bd_intf_pins m_axi_d_hbm_p6] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p6]
|
||||
connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p7 [get_bd_intf_pins m_axi_d_hbm_p7] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p7]
|
||||
connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p8 [get_bd_intf_pins m_axi_d_hbm_p8] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p8]
|
||||
connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p9 [get_bd_intf_pins m_axi_d_hbm_p9] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p9]
|
||||
connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p10 [get_bd_intf_pins m_axi_d_hbm_p10] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p10]
|
||||
connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p11 [get_bd_intf_pins m_axi_d_hbm_p11] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p11]
|
||||
connect_bd_intf_net -intf_net jf_conversion_0_m_axis_completion [get_bd_intf_pins axis_compl_fifo_4/S_AXIS] [get_bd_intf_pins jf_conversion_0/m_axis_completion]
|
||||
connect_bd_intf_net -intf_net image_processing_M_AXIS [get_bd_intf_pins host_writer_0/spot_finder_in] [get_bd_intf_pins image_processing/spot_finder_out]
|
||||
connect_bd_intf_net -intf_net image_processing_M_AXIS1 [get_bd_intf_pins host_writer_0/integration_in] [get_bd_intf_pins image_processing/integration_result_out]
|
||||
connect_bd_intf_net -intf_net image_processing_data_out6 [get_bd_intf_pins axis_data_fifo_11/S_AXIS] [get_bd_intf_pins image_processing/data_out]
|
||||
connect_bd_intf_net -intf_net image_processing_m_axi_d_hbm_p0 [get_bd_intf_pins image_processing/m_axi_d_hbm_p0] [get_bd_intf_pins smartconnect_1/S00_AXI]
|
||||
connect_bd_intf_net -intf_net image_processing_m_axi_d_hbm_p1 [get_bd_intf_pins m_axi_d_hbm_p1] [get_bd_intf_pins image_processing/m_axi_d_hbm_p1]
|
||||
connect_bd_intf_net -intf_net image_processing_m_axi_d_hbm_p2 [get_bd_intf_pins image_processing/m_axi_d_hbm_p2] [get_bd_intf_pins smartconnect_2/S00_AXI]
|
||||
connect_bd_intf_net -intf_net image_processing_m_axi_d_hbm_p3 [get_bd_intf_pins m_axi_d_hbm_p3] [get_bd_intf_pins image_processing/m_axi_d_hbm_p3]
|
||||
connect_bd_intf_net -intf_net image_processing_m_axi_d_hbm_p4 [get_bd_intf_pins m_axi_d_hbm_p4] [get_bd_intf_pins image_processing/m_axi_d_hbm_p4]
|
||||
connect_bd_intf_net -intf_net image_processing_m_axi_d_hbm_p5 [get_bd_intf_pins m_axi_d_hbm_p5] [get_bd_intf_pins image_processing/m_axi_d_hbm_p5]
|
||||
connect_bd_intf_net -intf_net image_processing_m_axi_d_hbm_p6 [get_bd_intf_pins m_axi_d_hbm_p6] [get_bd_intf_pins image_processing/m_axi_d_hbm_p6]
|
||||
connect_bd_intf_net -intf_net image_processing_m_axi_d_hbm_p7 [get_bd_intf_pins m_axi_d_hbm_p7] [get_bd_intf_pins image_processing/m_axi_d_hbm_p7]
|
||||
connect_bd_intf_net -intf_net image_processing_m_axi_d_hbm_p8 [get_bd_intf_pins m_axi_d_hbm_p8] [get_bd_intf_pins image_processing/m_axi_d_hbm_p8]
|
||||
connect_bd_intf_net -intf_net image_processing_m_axi_d_hbm_p9 [get_bd_intf_pins m_axi_d_hbm_p9] [get_bd_intf_pins image_processing/m_axi_d_hbm_p9]
|
||||
connect_bd_intf_net -intf_net image_processing_m_axi_d_hbm_p10 [get_bd_intf_pins m_axi_d_hbm_p10] [get_bd_intf_pins image_processing/m_axi_d_hbm_p10]
|
||||
connect_bd_intf_net -intf_net image_processing_m_axi_d_hbm_p11 [get_bd_intf_pins m_axi_d_hbm_p11] [get_bd_intf_pins image_processing/m_axi_d_hbm_p11]
|
||||
connect_bd_intf_net -intf_net image_processing_m_axi_d_hbm_p16 [get_bd_intf_pins m_axi_d_hbm_p16] [get_bd_intf_pins image_processing/m_axi_d_hbm_p16]
|
||||
connect_bd_intf_net -intf_net image_processing_m_axi_d_hbm_p17 [get_bd_intf_pins m_axi_d_hbm_p17] [get_bd_intf_pins image_processing/m_axi_d_hbm_p17]
|
||||
connect_bd_intf_net -intf_net image_processing_m_axi_d_hbm_p18 [get_bd_intf_pins m_axi_d_hbm_p18] [get_bd_intf_pins image_processing/m_axi_d_hbm_p18]
|
||||
connect_bd_intf_net -intf_net image_processing_m_axi_d_hbm_p19 [get_bd_intf_pins m_axi_d_hbm_p19] [get_bd_intf_pins image_processing/m_axi_d_hbm_p19]
|
||||
connect_bd_intf_net -intf_net image_processing_m_axis_completion3 [get_bd_intf_pins axis_compl_fifo_6/S_AXIS] [get_bd_intf_pins image_processing/m_axis_completion]
|
||||
connect_bd_intf_net -intf_net image_processing_result_out [get_bd_intf_pins axis_adu_histo_result_fifo/S_AXIS] [get_bd_intf_pins image_processing/result_out]
|
||||
connect_bd_intf_net -intf_net load_calibration_0_datamover_in_cmd [get_bd_intf_pins axis_data_fifo_h2c_cmd/S_AXIS] [get_bd_intf_pins load_calibration_0/datamover_in_cmd]
|
||||
connect_bd_intf_net -intf_net load_calibration_0_m_axi_d_hbm_p0 [get_bd_intf_pins load_calibration_0/m_axi_d_hbm_p0] [get_bd_intf_pins smartconnect_1/S01_AXI]
|
||||
connect_bd_intf_net -intf_net load_calibration_0_m_axi_d_hbm_p1 [get_bd_intf_pins load_calibration_0/m_axi_d_hbm_p1] [get_bd_intf_pins smartconnect_2/S01_AXI]
|
||||
connect_bd_intf_net -intf_net load_from_hbm_0_data_out [get_bd_intf_pins axis_data_fifo_3/S_AXIS] [get_bd_intf_pins load_from_hbm_0/data_out]
|
||||
connect_bd_intf_net -intf_net load_from_hbm_0_datamover_0_cmd [get_bd_intf_pins axis_datamover_cmd_fifo_2/S_AXIS] [get_bd_intf_pins load_from_hbm_0/datamover_0_cmd]
|
||||
connect_bd_intf_net -intf_net load_from_hbm_0_datamover_1_cmd [get_bd_intf_pins axis_datamover_cmd_fifo_3/S_AXIS] [get_bd_intf_pins load_from_hbm_0/datamover_1_cmd]
|
||||
connect_bd_intf_net -intf_net load_from_hbm_0_m_axis_completion [get_bd_intf_pins axis_compl_fifo_1/S_AXIS] [get_bd_intf_pins load_from_hbm_0/m_axis_completion]
|
||||
connect_bd_intf_net -intf_net load_from_hbm_0_m_axis_free_handles [get_bd_intf_pins axis_hbm_handles_fifo/S_AXIS] [get_bd_intf_pins load_from_hbm_0/m_axis_free_handles]
|
||||
connect_bd_intf_net -intf_net mailbox_0_M1_AXIS [get_bd_intf_pins axis_work_request_fifo_0/S_AXIS] [get_bd_intf_pins mailbox_0/M1_AXIS]
|
||||
connect_bd_intf_net -intf_net mask_missing_0_data_out [get_bd_intf_pins axis_data_fifo_5/S_AXIS] [get_bd_intf_pins mask_missing_0/data_out]
|
||||
connect_bd_intf_net -intf_net mask_missing_0_m_axis_completion [get_bd_intf_pins axis_compl_fifo_3/S_AXIS] [get_bd_intf_pins mask_missing_0/m_axis_completion]
|
||||
connect_bd_intf_net -intf_net module_upside_down_0_data_out [get_bd_intf_pins axis_register_slice_data_4/S_AXIS] [get_bd_intf_pins module_upside_down_0/data_out]
|
||||
connect_bd_intf_net -intf_net network_stack_udp_addr_out [get_bd_intf_pins axis_udp_addr_fifo_0/S_AXIS] [get_bd_intf_pins network_stack/udp_addr_out]
|
||||
connect_bd_intf_net -intf_net network_stack_udp_out [get_bd_intf_pins axis_udp_fifo_0/S_AXIS] [get_bd_intf_pins network_stack/udp_out]
|
||||
connect_bd_intf_net -intf_net s_axi_1 [get_bd_intf_pins s_axi] [get_bd_intf_pins smartconnect_0/S00_AXI]
|
||||
connect_bd_intf_net -intf_net save_to_hbm_0_data_out [get_bd_intf_pins axis_data_fifo_2/S_AXIS] [get_bd_intf_pins save_to_hbm_0/data_out]
|
||||
connect_bd_intf_net -intf_net save_to_hbm_0_datamover_0_cmd [get_bd_intf_pins axis_datamover_cmd_fifo_0/S_AXIS] [get_bd_intf_pins save_to_hbm_0/datamover_0_cmd]
|
||||
connect_bd_intf_net -intf_net save_to_hbm_0_datamover_1_cmd [get_bd_intf_pins axis_datamover_cmd_fifo_1/S_AXIS] [get_bd_intf_pins save_to_hbm_0/datamover_1_cmd]
|
||||
connect_bd_intf_net -intf_net save_to_hbm_0_hbm_out_0 [get_bd_intf_pins axis_datamover_fifo_0/S_AXIS] [get_bd_intf_pins save_to_hbm_0/hbm_out_0]
|
||||
connect_bd_intf_net -intf_net save_to_hbm_0_hbm_out_1 [get_bd_intf_pins axis_datamover_fifo_1/S_AXIS] [get_bd_intf_pins save_to_hbm_0/hbm_out_1]
|
||||
connect_bd_intf_net -intf_net save_to_hbm_0_m_axis_completion [get_bd_intf_pins axis_compl_fifo_0/S_AXIS] [get_bd_intf_pins save_to_hbm_0/m_axis_completion]
|
||||
connect_bd_intf_net -intf_net smartconnect_0_M00_AXI [get_bd_intf_pins action_config_0/s_axi] [get_bd_intf_pins smartconnect_0/M00_AXI]
|
||||
connect_bd_intf_net -intf_net smartconnect_0_M01_AXI [get_bd_intf_pins mailbox_0/S0_AXI] [get_bd_intf_pins smartconnect_0/M01_AXI]
|
||||
connect_bd_intf_net -intf_net smartconnect_0_M02_AXI [get_bd_intf_pins load_calibration_0/s_axi_control] [get_bd_intf_pins smartconnect_0/M02_AXI]
|
||||
connect_bd_intf_net -intf_net smartconnect_0_M04_AXI [get_bd_intf_pins frame_generator_0/s_axi_control] [get_bd_intf_pins smartconnect_0/M03_AXI]
|
||||
connect_bd_intf_net -intf_net smartconnect_1_M00_AXI [get_bd_intf_pins m_axi_d_hbm_p0] [get_bd_intf_pins smartconnect_1/M00_AXI]
|
||||
connect_bd_intf_net -intf_net smartconnect_2_M00_AXI [get_bd_intf_pins m_axi_d_hbm_p2] [get_bd_intf_pins smartconnect_2/M00_AXI]
|
||||
connect_bd_intf_net -intf_net spot_finder_0_data_out [get_bd_intf_pins axis_register_slice_data_2/S_AXIS] [get_bd_intf_pins spot_finder_0/data_out]
|
||||
connect_bd_intf_net -intf_net spot_finder_0_strong_pixel_out [get_bd_intf_pins axis_spot_finder_fifo_0/S_AXIS] [get_bd_intf_pins spot_finder_0/strong_pixel_out]
|
||||
connect_bd_intf_net -intf_net stream_merge_0_output_r [get_bd_intf_pins axis_eth_in_fifo/S_AXIS] [get_bd_intf_pins stream_merge_0/output_r]
|
||||
connect_bd_intf_net -intf_net timer_hbm_data_out [get_bd_intf_pins axis_data_fifo_1/S_AXIS] [get_bd_intf_pins timer_hbm/data_out]
|
||||
connect_bd_intf_net -intf_net timer_host_data_out [get_bd_intf_pins axis_data_fifo_12/S_AXIS] [get_bd_intf_pins timer_host/data_out]
|
||||
@@ -736,17 +427,16 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
|
||||
connect_bd_net -net action_config_0_fpga_ipv4_addr [get_bd_pins action_config_0/fpga_ipv4_addr] [get_bd_pins frame_generator_0/src_ipv4_addr] [get_bd_pins network_stack/fpga_ipv4_addr]
|
||||
connect_bd_net -net action_config_0_fpga_mac_addr [get_bd_pins action_config_0/fpga_mac_addr] [get_bd_pins frame_generator_0/src_mac_addr] [get_bd_pins network_stack/fpga_mac_addr]
|
||||
connect_bd_net -net action_config_0_frames_per_trigger [get_bd_pins action_config_0/nframes] [get_bd_pins data_collection_fsm_0/nframes]
|
||||
connect_bd_net -net action_config_0_hbm_size_bytes [get_bd_pins action_config_0/hbm_size_bytes] [get_bd_pins frame_generator_0/hbm_size_bytes] [get_bd_pins integration_0/hbm_size_bytes] [get_bd_pins jf_conversion_0/hbm_size_bytes] [get_bd_pins load_calibration_0/hbm_size_bytes] [get_bd_pins load_from_hbm_0/hbm_size_bytes] [get_bd_pins save_to_hbm_0/hbm_size_bytes]
|
||||
connect_bd_net -net action_config_0_hbm_size_bytes [get_bd_pins action_config_0/hbm_size_bytes] [get_bd_pins frame_generator_0/hbm_size_bytes] [get_bd_pins hbm_cache/hbm_size_bytes] [get_bd_pins image_processing/hbm_size_bytes] [get_bd_pins load_calibration_0/hbm_size_bytes]
|
||||
connect_bd_net -net action_config_0_nmodules [get_bd_pins action_config_0/nmodules] [get_bd_pins data_collection_fsm_0/nmodules]
|
||||
connect_bd_net -net action_config_0_nstorage_cells [get_bd_pins action_config_0/nstorage_cells] [get_bd_pins data_collection_fsm_0/nstorage_cells]
|
||||
connect_bd_net -net action_config_0_nsummation [get_bd_pins action_config_0/nsummation] [get_bd_pins data_collection_fsm_0/nsummation]
|
||||
connect_bd_net -net action_config_0_one_over_energy [get_bd_pins action_config_0/one_over_energy] [get_bd_pins data_collection_fsm_0/one_over_energy]
|
||||
connect_bd_net -net action_config_0_spot_finder_snr [get_bd_pins action_config_0/spot_finder_snr_threshold] [get_bd_pins spot_finder_0/in_snr_threshold]
|
||||
connect_bd_net -net action_config_0_spot_finder_threshold [get_bd_pins action_config_0/spot_finder_count_threshold] [get_bd_pins spot_finder_0/in_count_threshold]
|
||||
connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins add_multipixel_0/ap_clk] [get_bd_pins adu_histo_0/ap_clk] [get_bd_pins axi_datamover_0/m_axi_mm2s_aclk] [get_bd_pins axi_datamover_0/m_axi_s2mm_aclk] [get_bd_pins axi_datamover_0/m_axis_mm2s_cmdsts_aclk] [get_bd_pins axi_datamover_0/m_axis_s2mm_cmdsts_awclk] [get_bd_pins axi_datamover_1/m_axi_mm2s_aclk] [get_bd_pins axi_datamover_1/m_axi_s2mm_aclk] [get_bd_pins axi_datamover_1/m_axis_mm2s_cmdsts_aclk] [get_bd_pins axi_datamover_1/m_axis_s2mm_cmdsts_awclk] [get_bd_pins axis_128_to_512_0/ap_clk] [get_bd_pins axis_32_to_512_0/ap_clk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_adu_histo_result_fifo/s_axis_aclk] [get_bd_pins axis_compl_fifo_0/s_axis_aclk] [get_bd_pins axis_compl_fifo_1/s_axis_aclk] [get_bd_pins axis_compl_fifo_2/s_axis_aclk] [get_bd_pins axis_compl_fifo_3/s_axis_aclk] [get_bd_pins axis_compl_fifo_4/s_axis_aclk] [get_bd_pins axis_compl_fifo_5/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_10/s_axis_aclk] [get_bd_pins axis_data_fifo_11/s_axis_aclk] [get_bd_pins axis_data_fifo_12/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_5/s_axis_aclk] [get_bd_pins axis_data_fifo_6/s_axis_aclk] [get_bd_pins axis_data_fifo_7/s_axis_aclk] [get_bd_pins axis_data_fifo_8/s_axis_aclk] [get_bd_pins axis_data_fifo_9/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_datamover_cmd_fifo_0/s_axis_aclk] [get_bd_pins axis_datamover_cmd_fifo_1/s_axis_aclk] [get_bd_pins axis_datamover_cmd_fifo_2/s_axis_aclk] [get_bd_pins axis_datamover_cmd_fifo_3/s_axis_aclk] [get_bd_pins axis_datamover_fifo_0/s_axis_aclk] [get_bd_pins axis_datamover_fifo_1/s_axis_aclk] [get_bd_pins axis_datamover_fifo_2/s_axis_aclk] [get_bd_pins axis_datamover_fifo_3/s_axis_aclk] [get_bd_pins axis_eth_in_fifo/s_axis_aclk] [get_bd_pins axis_frame_generator_fifo_0/s_axis_aclk] [get_bd_pins axis_hbm_handles_fifo/s_axis_aclk] [get_bd_pins axis_integration_result_fifo_0/s_axis_aclk] [get_bd_pins axis_integration_result_fifo_1/s_axis_aclk] [get_bd_pins axis_register_slice_addr_0/aclk] [get_bd_pins axis_register_slice_data_0/aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_2/aclk] [get_bd_pins axis_register_slice_data_3/aclk] [get_bd_pins axis_register_slice_data_4/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_spot_finder_fifo_0/s_axis_aclk] [get_bd_pins axis_spot_finder_fifo_1/s_axis_aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins bitshuffle_0/ap_clk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins frame_generator_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins integration_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins load_from_hbm_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins mask_missing_0/ap_clk] [get_bd_pins module_upside_down_0/ap_clk] [get_bd_pins network_stack/axiclk] [get_bd_pins save_to_hbm_0/ap_clk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins smartconnect_1/aclk] [get_bd_pins smartconnect_2/aclk] [get_bd_pins spot_finder_0/ap_clk] [get_bd_pins stream_merge_0/ap_clk] [get_bd_pins timer_hbm/ap_clk] [get_bd_pins timer_host/ap_clk]
|
||||
connect_bd_net -net action_config_0_spot_finder_count_threshold [get_bd_pins action_config_0/spot_finder_count_threshold] [get_bd_pins image_processing/in_count_threshold]
|
||||
connect_bd_net -net action_config_0_spot_finder_snr_threshold [get_bd_pins action_config_0/spot_finder_snr_threshold] [get_bd_pins image_processing/in_snr_threshold]
|
||||
connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_adu_histo_result_fifo/s_axis_aclk] [get_bd_pins axis_compl_fifo_1/s_axis_aclk] [get_bd_pins axis_compl_fifo_6/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_11/s_axis_aclk] [get_bd_pins axis_data_fifo_12/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_eth_in_fifo/s_axis_aclk] [get_bd_pins axis_frame_generator_fifo_0/s_axis_aclk] [get_bd_pins axis_register_slice_addr_0/aclk] [get_bd_pins axis_register_slice_data_0/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins frame_generator_0/ap_clk] [get_bd_pins hbm_cache/axi_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins image_processing/axi_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins network_stack/axiclk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins smartconnect_1/aclk] [get_bd_pins smartconnect_2/aclk] [get_bd_pins stream_merge_0/ap_clk] [get_bd_pins timer_hbm/ap_clk] [get_bd_pins timer_host/ap_clk]
|
||||
connect_bd_net -net axis_addr_fifo_0_almost_empty [get_bd_pins action_config_0/calib_addr_fifo_empty] [get_bd_pins axis_addr_fifo_0/almost_empty]
|
||||
connect_bd_net -net axis_addr_fifo_0_almost_full [get_bd_pins action_config_0/calib_addr_fifo_full] [get_bd_pins axis_addr_fifo_0/almost_full]
|
||||
connect_bd_net -net axis_compl_fifo_0_almost_empty [get_bd_pins action_config_0/hbm_compl_fifo_empty] [get_bd_pins axis_compl_fifo_0/almost_empty]
|
||||
connect_bd_net -net axis_compl_fifo_0_almost_full [get_bd_pins action_config_0/hbm_compl_fifo_full] [get_bd_pins axis_compl_fifo_0/almost_full]
|
||||
connect_bd_net -net axis_compl_fifo_1_almost_empty [get_bd_pins action_config_0/last_addr_fifo_empty] [get_bd_pins axis_compl_fifo_1/almost_empty]
|
||||
connect_bd_net -net axis_compl_fifo_1_almost_full [get_bd_pins action_config_0/last_addr_fifo_full] [get_bd_pins axis_compl_fifo_1/almost_full]
|
||||
connect_bd_net -net axis_data_fifo_10_almost_empty [get_bd_pins action_config_0/last_data_fifo_empty] [get_bd_pins axis_data_fifo_12/almost_empty]
|
||||
@@ -765,8 +455,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
|
||||
connect_bd_net -net axis_eth_in_fifo_almost_full [get_bd_pins action_config_0/eth_in_fifo_full] [get_bd_pins axis_eth_in_fifo/almost_full]
|
||||
connect_bd_net -net axis_frame_generator_fifo_0_almost_empty [get_bd_pins action_config_0/frame_generator_fifo_empty] [get_bd_pins axis_frame_generator_fifo_0/almost_empty]
|
||||
connect_bd_net -net axis_frame_generator_fifo_0_almost_full [get_bd_pins action_config_0/frame_generator_fifo_full] [get_bd_pins axis_frame_generator_fifo_0/almost_full]
|
||||
connect_bd_net -net axis_hbm_handles_fifo_almost_empty [get_bd_pins action_config_0/hbm_handles_fifo_empty] [get_bd_pins axis_hbm_handles_fifo/almost_empty]
|
||||
connect_bd_net -net axis_hbm_handles_fifo_almost_full [get_bd_pins action_config_0/hbm_handles_fifo_full] [get_bd_pins axis_hbm_handles_fifo/almost_full]
|
||||
connect_bd_net -net axis_udp_fifo_0_almost_empty [get_bd_pins action_config_0/udp_fifo_empty] [get_bd_pins axis_udp_fifo_0/almost_empty]
|
||||
connect_bd_net -net axis_udp_fifo_0_almost_full [get_bd_pins action_config_0/udp_fifo_full] [get_bd_pins axis_udp_fifo_0/almost_full]
|
||||
connect_bd_net -net axis_work_completion_fifo_0_almost_empty [get_bd_pins action_config_0/work_compl_fifo_empty] [get_bd_pins axis_work_completion_fifo_0/almost_empty]
|
||||
@@ -774,6 +462,10 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
|
||||
connect_bd_net -net axis_work_request_fifo_0_almost_empty [get_bd_pins action_config_0/work_req_fifo_empty] [get_bd_pins axis_work_request_fifo_0/almost_empty]
|
||||
connect_bd_net -net axis_work_request_fifo_0_almost_full [get_bd_pins action_config_0/work_req_fifo_full] [get_bd_pins axis_work_request_fifo_0/almost_full]
|
||||
connect_bd_net -net data_collection_fsm_0_out_idle_V [get_bd_pins action_config_0/data_collection_idle] [get_bd_pins data_collection_fsm_0/out_idle]
|
||||
connect_bd_net -net hbm_cache_almost_empty [get_bd_pins action_config_0/hbm_handles_fifo_empty] [get_bd_pins hbm_cache/hbm_handle_fifo_empty]
|
||||
connect_bd_net -net hbm_cache_almost_empty1 [get_bd_pins action_config_0/hbm_compl_fifo_empty] [get_bd_pins hbm_cache/compl_fifo_empty]
|
||||
connect_bd_net -net hbm_cache_almost_full [get_bd_pins action_config_0/hbm_handles_fifo_full] [get_bd_pins hbm_cache/hbm_handle_fifo_full]
|
||||
connect_bd_net -net hbm_cache_almost_full1 [get_bd_pins action_config_0/hbm_compl_fifo_full] [get_bd_pins hbm_cache/compl_fifo_full]
|
||||
connect_bd_net -net host_writer_0_err_reg [get_bd_pins action_config_0/host_writer_err] [get_bd_pins host_writer_0/err_reg]
|
||||
connect_bd_net -net host_writer_0_err_reg_ap_vld [get_bd_pins action_config_0/host_writer_err_valid] [get_bd_pins host_writer_0/err_reg_ap_vld]
|
||||
connect_bd_net -net host_writer_0_idle [get_bd_pins action_config_0/host_writer_idle] [get_bd_pins host_writer_0/idle]
|
||||
@@ -793,9 +485,8 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } {
|
||||
connect_bd_net -net network_stack_packets_sls_ap_vld [get_bd_pins action_config_0/packets_sls_valid] [get_bd_pins network_stack/packets_sls_ap_vld]
|
||||
connect_bd_net -net network_stack_packets_udp [get_bd_pins action_config_0/packets_udp] [get_bd_pins network_stack/packets_udp]
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connect_bd_net -net network_stack_packets_udp_ap_vld [get_bd_pins action_config_0/packets_udp_valid] [get_bd_pins network_stack/packets_udp_ap_vld]
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connect_bd_net -net one_dout [get_bd_pins add_multipixel_0/ap_start] [get_bd_pins axi_datamover_0/m_axis_mm2s_sts_tready] [get_bd_pins axi_datamover_0/m_axis_s2mm_sts_tready] [get_bd_pins axi_datamover_1/m_axis_mm2s_sts_tready] [get_bd_pins axi_datamover_1/m_axis_s2mm_sts_tready] [get_bd_pins module_upside_down_0/ap_start] [get_bd_pins one/dout] [get_bd_pins spot_finder_0/ap_start]
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connect_bd_net -net reset_axi [get_bd_pins axi_rst_n] [get_bd_pins action_config_0/resetn] [get_bd_pins axis_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_adu_histo_result_fifo/s_axis_aresetn] [get_bd_pins axis_compl_fifo_0/s_axis_aresetn] [get_bd_pins axis_compl_fifo_1/s_axis_aresetn] [get_bd_pins axis_compl_fifo_2/s_axis_aresetn] [get_bd_pins axis_compl_fifo_3/s_axis_aresetn] [get_bd_pins axis_compl_fifo_4/s_axis_aresetn] [get_bd_pins axis_compl_fifo_5/s_axis_aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins axis_data_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_10/s_axis_aresetn] [get_bd_pins axis_data_fifo_11/s_axis_aresetn] [get_bd_pins axis_data_fifo_12/s_axis_aresetn] [get_bd_pins axis_data_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_5/s_axis_aresetn] [get_bd_pins axis_data_fifo_6/s_axis_aresetn] [get_bd_pins axis_data_fifo_7/s_axis_aresetn] [get_bd_pins axis_data_fifo_8/s_axis_aresetn] [get_bd_pins axis_data_fifo_9/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aresetn] [get_bd_pins axis_datamover_cmd_fifo_0/s_axis_aresetn] [get_bd_pins axis_datamover_cmd_fifo_1/s_axis_aresetn] [get_bd_pins axis_datamover_cmd_fifo_2/s_axis_aresetn] [get_bd_pins axis_datamover_cmd_fifo_3/s_axis_aresetn] [get_bd_pins axis_datamover_fifo_0/s_axis_aresetn] [get_bd_pins axis_datamover_fifo_1/s_axis_aresetn] [get_bd_pins axis_datamover_fifo_2/s_axis_aresetn] [get_bd_pins axis_datamover_fifo_3/s_axis_aresetn] [get_bd_pins axis_eth_in_fifo/s_axis_aresetn] [get_bd_pins axis_frame_generator_fifo_0/s_axis_aresetn] [get_bd_pins axis_hbm_handles_fifo/s_axis_aresetn] [get_bd_pins axis_integration_result_fifo_0/s_axis_aresetn] [get_bd_pins axis_integration_result_fifo_1/s_axis_aresetn] [get_bd_pins axis_register_slice_addr_0/aresetn] [get_bd_pins axis_register_slice_data_0/aresetn] [get_bd_pins axis_register_slice_data_1/aresetn] [get_bd_pins axis_register_slice_data_2/aresetn] [get_bd_pins axis_register_slice_data_3/aresetn] [get_bd_pins axis_register_slice_data_4/aresetn] [get_bd_pins axis_register_slice_data_in_0/aresetn] [get_bd_pins axis_register_slice_host_mem/aresetn] [get_bd_pins axis_register_slice_udp/aresetn] [get_bd_pins axis_spot_finder_fifo_0/s_axis_aresetn] [get_bd_pins axis_spot_finder_fifo_1/s_axis_aresetn] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_udp_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_completion_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_request_fifo_0/s_axis_aresetn] [get_bd_pins network_stack/resetn] [get_bd_pins smartconnect_0/aresetn] [get_bd_pins smartconnect_1/aresetn] [get_bd_pins smartconnect_2/aresetn]
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connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins add_multipixel_0/ap_rst_n] [get_bd_pins adu_histo_0/ap_rst_n] [get_bd_pins axi_datamover_0/m_axi_mm2s_aresetn] [get_bd_pins axi_datamover_0/m_axi_s2mm_aresetn] [get_bd_pins axi_datamover_0/m_axis_mm2s_cmdsts_aresetn] [get_bd_pins axi_datamover_0/m_axis_s2mm_cmdsts_aresetn] [get_bd_pins axi_datamover_1/m_axi_mm2s_aresetn] [get_bd_pins axi_datamover_1/m_axi_s2mm_aresetn] [get_bd_pins axi_datamover_1/m_axis_mm2s_cmdsts_aresetn] [get_bd_pins axi_datamover_1/m_axis_s2mm_cmdsts_aresetn] [get_bd_pins axis_128_to_512_0/ap_rst_n] [get_bd_pins axis_32_to_512_0/ap_rst_n] [get_bd_pins bitshuffle_0/ap_rst_n] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins frame_generator_0/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins integration_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins load_from_hbm_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins mask_missing_0/ap_rst_n] [get_bd_pins module_upside_down_0/ap_rst_n] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins save_to_hbm_0/ap_rst_n] [get_bd_pins spot_finder_0/ap_rst_n] [get_bd_pins stream_merge_0/ap_rst_n] [get_bd_pins timer_hbm/ap_rst_n] [get_bd_pins timer_host/ap_rst_n]
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connect_bd_net -net reset_axi [get_bd_pins axi_rst_n] [get_bd_pins action_config_0/resetn] [get_bd_pins axis_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_adu_histo_result_fifo/s_axis_aresetn] [get_bd_pins axis_compl_fifo_1/s_axis_aresetn] [get_bd_pins axis_compl_fifo_6/s_axis_aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins axis_data_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_11/s_axis_aresetn] [get_bd_pins axis_data_fifo_12/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aresetn] [get_bd_pins axis_eth_in_fifo/s_axis_aresetn] [get_bd_pins axis_frame_generator_fifo_0/s_axis_aresetn] [get_bd_pins axis_register_slice_addr_0/aresetn] [get_bd_pins axis_register_slice_data_0/aresetn] [get_bd_pins axis_register_slice_data_in_0/aresetn] [get_bd_pins axis_register_slice_host_mem/aresetn] [get_bd_pins axis_register_slice_udp/aresetn] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_udp_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_completion_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_request_fifo_0/s_axis_aresetn] [get_bd_pins hbm_cache/axi_rst_n] [get_bd_pins image_processing/axi_rst_n] [get_bd_pins network_stack/resetn] [get_bd_pins smartconnect_0/aresetn] [get_bd_pins smartconnect_1/aresetn] [get_bd_pins smartconnect_2/aresetn]
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connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins frame_generator_0/ap_rst_n] [get_bd_pins hbm_cache/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins image_processing/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins stream_merge_0/ap_rst_n] [get_bd_pins timer_hbm/ap_rst_n] [get_bd_pins timer_host/ap_rst_n]
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connect_bd_net -net timer_hbm_counter [get_bd_pins action_config_0/stalls_hbm] [get_bd_pins timer_hbm/counter]
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||||
connect_bd_net -net timer_hbm_counter_ap_vld [get_bd_pins action_config_0/stalls_hbm_valid] [get_bd_pins timer_hbm/counter_ap_vld]
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connect_bd_net -net timer_host_counter [get_bd_pins action_config_0/stalls_host] [get_bd_pins timer_host/counter]
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Reference in New Issue
Block a user