4 Commits

Include renames

Author	SHA1	Message	Date
leonarski_f	0421e517fc	FPGA: host writer - fix wrong req handle check + add marker in work complection for flushing frame	2023-07-25 12:40:57 +02:00
leonarski_f	13b2e16b33	FPGA: handle better weird work request handle	2023-07-25 12:40:57 +02:00
leonarski_f	35b3704ccf	FPGA: ignore packets with module number out of bounds + set bit in error register	2023-07-25 12:40:57 +02:00
leonarski_f	7a98766304	FPGA: Split receiver and FPGA design directories	2023-06-07 21:21:22 +02:00