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a3996a81e3
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FPGA: Remove data collection counter
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2023-05-30 20:13:54 +02:00 |
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72cdb88c0c
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FPGA: Add host_writer idle marker
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2023-05-27 21:45:21 +02:00 |
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c1212a14d9
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FPGA: work requests are consumed while host_writer not working
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2023-05-26 22:12:34 +02:00 |
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b926e69885
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FPGA: data_collection_fsm counter
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2023-05-26 20:39:12 +02:00 |
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7d5694139f
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FPGA: Save full JF timestamp and exptime
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2023-05-17 21:30:42 +02:00 |
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bf2a23ef7e
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AcquisitionDevice: Completion queue is handled by particular implementation of the device
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2023-04-25 15:58:07 +02:00 |
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df15755612
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AcquisitionDevice: Use work_completion_queue to read start completion message
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2023-04-25 10:41:18 +02:00 |
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de1d7e1c67
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HLSSimulatedDevice: refactor to have HLS run as member function
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2023-04-25 10:22:44 +02:00 |
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14a1f6d961
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FPGAAcquisitionDevice: Add a level in inheritance to group FPGA related functions for PCIe and HLS simulated devices
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2023-04-25 09:55:36 +02:00 |
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feb5fcacf3
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DiffractionExperiment: Refactor IPv4 handling (now it is just base addr for detector IP)
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2023-04-15 12:29:14 +02:00 |
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32baaef1e4
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AcquisitionDevice: IPv4 address and UDP destination port is property of the device and not of a particular run
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2023-04-15 12:08:01 +02:00 |
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653b82d6c3
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FPGA + receiver + detector: Use column ID to decode detector half-module number
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2023-04-15 11:08:32 +02:00 |
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f44cb55252
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jf_packet.h: renamed, moved to jungfrau/, and slightly refactored
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2023-04-07 10:00:07 +02:00 |
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68923ca376
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ProcessRawPacket: Refactor, so it can be used also for standard (Linux kernel) UDP stack
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2023-04-06 14:10:27 +02:00 |
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1757d42182
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Initial commit
Signed-off-by: Filip Leonarski <filip.leonarski@psi.ch>
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2023-04-06 11:17:59 +02:00 |
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