FPGA: Use volatile variable for counter

2023-09-13 10:35:02 +02:00
parent 33a15e87df
commit 95d20085dd
2 changed files with 4 additions and 2 deletions
@@ -3,7 +3,7 @@

 #include "hls_jfjoch.h"

-void timer_host(STREAM_512 &data_in, STREAM_512 &data_out, uint64_t &counter) {
+void timer_host(STREAM_512 &data_in, STREAM_512 &data_out, volatile uint64_t &counter) {
 #pragma HLS INTERFACE register both axis port=data_in
 #pragma HLS INTERFACE register both axis port=data_out
 #pragma HLS INTERFACE register ap_vld port=counter