From 95d20085dd46548ccdf034111480d50635c0660f Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 13 Sep 2023 10:35:02 +0200 Subject: [PATCH] FPGA: Use volatile variable for counter --- fpga/hls/hls_jfjoch.h | 4 +++- fpga/hls/timer.cpp | 2 +- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/fpga/hls/hls_jfjoch.h b/fpga/hls/hls_jfjoch.h index 00652bf1..a16f3952 100644 --- a/fpga/hls/hls_jfjoch.h +++ b/fpga/hls/hls_jfjoch.h @@ -115,7 +115,9 @@ void host_writer(STREAM_512 &data_in, volatile ap_uint<1> &idle, ap_uint<8> &err_reg); -void timer_host(STREAM_512 &data_in, STREAM_512 &data_out, uint64_t &counter); +void timer_host(STREAM_512 &data_in, + STREAM_512 &data_out, + volatile uint64_t &counter); void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, hls::stream &addr_in, diff --git a/fpga/hls/timer.cpp b/fpga/hls/timer.cpp index 8973c2e2..a0c6ad27 100644 --- a/fpga/hls/timer.cpp +++ b/fpga/hls/timer.cpp @@ -3,7 +3,7 @@ #include "hls_jfjoch.h" -void timer_host(STREAM_512 &data_in, STREAM_512 &data_out, uint64_t &counter) { +void timer_host(STREAM_512 &data_in, STREAM_512 &data_out, volatile uint64_t &counter) { #pragma HLS INTERFACE register both axis port=data_in #pragma HLS INTERFACE register both axis port=data_out #pragma HLS INTERFACE register ap_vld port=counter