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1001/pytho
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574127b5ac |
@@ -28,9 +28,8 @@ Checks: '*,
|
||||
-modernize-use-trailing-return-type,
|
||||
-llvmlibc-*'
|
||||
|
||||
# HeaderFilterRegex: \.h
|
||||
HeaderFilterRegex: '^(?!.*([/\\])libs([/\\])).*'
|
||||
#AnalyzeTemporaryDtors: false
|
||||
HeaderFilterRegex: \.h
|
||||
AnalyzeTemporaryDtors: false
|
||||
FormatStyle: none
|
||||
CheckOptions:
|
||||
- { key: readability-identifier-naming.NamespaceCase, value: lower_case }
|
||||
|
||||
@@ -1,33 +0,0 @@
|
||||
name: Build on local RHEL8
|
||||
|
||||
on:
|
||||
push:
|
||||
branches:
|
||||
- developer
|
||||
workflow_dispatch:
|
||||
|
||||
permissions:
|
||||
contents: read
|
||||
|
||||
jobs:
|
||||
build:
|
||||
runs-on: "detectors-software-RH8"
|
||||
steps:
|
||||
- uses: actions/checkout@v4
|
||||
|
||||
- name: Build library
|
||||
run: |
|
||||
source /home/gitea_runner/.bashrc
|
||||
conda activate det
|
||||
mkdir build && cd build
|
||||
conda activate det
|
||||
cmake .. -DSLS_USE_PYTHON=ON
|
||||
make -j 2
|
||||
cd ../pyctbgui
|
||||
make
|
||||
|
||||
- name: Deploy to NFS update server
|
||||
if: gitea.ref == 'refs/heads/developer'
|
||||
run: |
|
||||
sftp -r gitea_runner@mpc2935:/slsDetectorSoftware/RH8 <<< $'put build/bin'
|
||||
sftp -r gitea_runner@mpc2935:/slsDetectorSoftware/RH8 <<< $'put pyctbgui'
|
||||
@@ -21,9 +21,9 @@ jobs:
|
||||
- name: Build library
|
||||
run: |
|
||||
mkdir build && cd build
|
||||
cmake .. -DSLS_USE_PYTHON=ON -DSLS_USE_TESTS=ON -DSLS_USE_SIMULATOR=ON
|
||||
cmake .. -DSLS_USE_PYTHON=ON -DSLS_USE_TESTS=ON
|
||||
make -j 2
|
||||
|
||||
- name: C++ unit tests
|
||||
working-directory: ${{gitea.workspace}}/build
|
||||
run: ctest -j1 --rerun-failed --output-on-failure
|
||||
run: ctest
|
||||
@@ -1,30 +0,0 @@
|
||||
name: Build on local RHEL9
|
||||
|
||||
on:
|
||||
push:
|
||||
branches:
|
||||
- developer
|
||||
workflow_dispatch:
|
||||
|
||||
permissions:
|
||||
contents: read
|
||||
|
||||
jobs:
|
||||
build:
|
||||
runs-on: "detectors-software-RH9"
|
||||
steps:
|
||||
- uses: actions/checkout@v4
|
||||
|
||||
- name: Build library
|
||||
run: |
|
||||
mkdir build && cd build
|
||||
cmake -DSLS_USE_PYTHON=ON -DPython_EXECUTABLE=/usr/bin/python3.13 -DPython_INCLUDE_DIR=/usr/include/python3.13 -DPython_LIBRARY=/usr/lib64/libpython3.13.so ..
|
||||
make -j 2
|
||||
cd ../pyctbgui
|
||||
make
|
||||
|
||||
- name: Deploy to NFS update server
|
||||
if: gitea.ref == 'refs/heads/developer'
|
||||
run: |
|
||||
sftp -r gitea_runner@mpc2935:/slsDetectorSoftware/RH9 <<< $'put build/bin'
|
||||
sftp -r gitea_runner@mpc2935:/slsDetectorSoftware/RH9 <<< $'put pyctbgui'
|
||||
@@ -19,9 +19,9 @@ jobs:
|
||||
- name: Build library
|
||||
run: |
|
||||
mkdir build && cd build
|
||||
cmake .. -DSLS_USE_PYTHON=ON -DSLS_USE_TESTS=ON -DSLS_USE_SIMULATOR=ON
|
||||
cmake .. -DSLS_USE_PYTHON=ON -DSLS_USE_TESTS=ON
|
||||
make -j 2
|
||||
|
||||
- name: C++ unit tests
|
||||
working-directory: ${{gitea.workspace}}/build
|
||||
run: ctest -j1 --rerun-failed --output-on-failure
|
||||
run: ctest
|
||||
2
.github/workflows/build_wheel.yml
vendored
2
.github/workflows/build_wheel.yml
vendored
@@ -23,7 +23,7 @@ jobs:
|
||||
- uses: actions/checkout@v4
|
||||
|
||||
- name: Build wheels
|
||||
run: pipx run cibuildwheel==3.2.1
|
||||
run: pipx run cibuildwheel==2.23.0
|
||||
|
||||
- uses: actions/upload-artifact@v4
|
||||
with:
|
||||
|
||||
2
.github/workflows/cmake.yaml
vendored
2
.github/workflows/cmake.yaml
vendored
@@ -37,7 +37,7 @@ jobs:
|
||||
|
||||
- name: C++ unit tests
|
||||
working-directory: ${{github.workspace}}/build
|
||||
run: ctest -C ${{env.BUILD_TYPE}} -j1 --rerun-failed --output-on-failure
|
||||
run: ctest -C ${{env.BUILD_TYPE}} -j1
|
||||
|
||||
- name: Python unit tests
|
||||
working-directory: ${{github.workspace}}/build/bin
|
||||
|
||||
47
.github/workflows/conda_deploy_library.yaml
vendored
47
.github/workflows/conda_deploy_library.yaml
vendored
@@ -1,47 +0,0 @@
|
||||
name: Build and deploy slsdetlib
|
||||
|
||||
on:
|
||||
release:
|
||||
types:
|
||||
- published
|
||||
|
||||
jobs:
|
||||
build:
|
||||
strategy:
|
||||
fail-fast: false
|
||||
matrix:
|
||||
platform: [ubuntu-latest, ] # macos-12, windows-2019]
|
||||
python-version: ["3.12",]
|
||||
|
||||
runs-on: ${{ matrix.platform }}
|
||||
|
||||
# The setup-miniconda action needs this to activate miniconda
|
||||
defaults:
|
||||
run:
|
||||
shell: "bash -l {0}"
|
||||
|
||||
steps:
|
||||
- uses: actions/checkout@v4
|
||||
|
||||
- name: Get conda
|
||||
uses: conda-incubator/setup-miniconda@v3.0.4
|
||||
with:
|
||||
python-version: ${{ matrix.python-version }}
|
||||
channels: conda-forge
|
||||
|
||||
- name: Prepare
|
||||
run: conda install conda-build conda-verify pytest anaconda-client
|
||||
|
||||
- name: Enable upload
|
||||
run: conda config --set anaconda_upload yes
|
||||
|
||||
- name: Build
|
||||
env:
|
||||
CONDA_TOKEN: ${{ secrets.CONDA_TOKEN }}
|
||||
run: conda build conda-recipes/main-library --user slsdetectorgroup --token ${CONDA_TOKEN} --output-folder build_output
|
||||
|
||||
- name: Upload all Conda to github as artifacts
|
||||
uses: actions/upload-artifact@v4
|
||||
with:
|
||||
name: conda-packages
|
||||
path: build_output/** # Uploads all packages
|
||||
47
.github/workflows/conda_deploy_slsdet.yaml
vendored
47
.github/workflows/conda_deploy_slsdet.yaml
vendored
@@ -1,47 +0,0 @@
|
||||
name: deploy slsdet
|
||||
|
||||
on:
|
||||
release:
|
||||
types:
|
||||
- published
|
||||
|
||||
jobs:
|
||||
build:
|
||||
strategy:
|
||||
fail-fast: false
|
||||
matrix:
|
||||
platform: [ubuntu-latest, ] # macos-12, windows-2019]
|
||||
python-version: ["3.12",]
|
||||
|
||||
runs-on: ${{ matrix.platform }}
|
||||
|
||||
# The setup-miniconda action needs this to activate miniconda
|
||||
defaults:
|
||||
run:
|
||||
shell: "bash -l {0}"
|
||||
|
||||
steps:
|
||||
- uses: actions/checkout@v4
|
||||
|
||||
- name: Get conda
|
||||
uses: conda-incubator/setup-miniconda@v3.0.4
|
||||
with:
|
||||
python-version: ${{ matrix.python-version }}
|
||||
channels: conda-forge
|
||||
|
||||
- name: Prepare
|
||||
run: conda install conda-build conda-verify pytest anaconda-client
|
||||
|
||||
- name: Enable upload
|
||||
run: conda config --set anaconda_upload yes
|
||||
|
||||
- name: Build
|
||||
env:
|
||||
CONDA_TOKEN: ${{ secrets.CONDA_TOKEN }}
|
||||
run: conda build conda-recipes/python-client --user slsdetectorgroup --token ${CONDA_TOKEN} --output-folder build_output
|
||||
|
||||
- name: Upload all Conda packages
|
||||
uses: actions/upload-artifact@v4
|
||||
with:
|
||||
name: conda-packages
|
||||
path: build_output/** # Uploads all packages
|
||||
159
CMakeLists.txt
159
CMakeLists.txt
@@ -24,16 +24,6 @@ include(cmake/SlsAddFlag.cmake)
|
||||
include(cmake/helpers.cmake)
|
||||
|
||||
|
||||
find_package(Threads REQUIRED)
|
||||
|
||||
# POSIX threads are required for the moment but we use CMake to find them
|
||||
# Once migrated to std::thread this can be removed
|
||||
if(NOT CMAKE_USE_PTHREADS_INIT)
|
||||
message(FATAL_ERROR "A POSIX threads (pthread) implementation is required, but was not found.")
|
||||
endif()
|
||||
|
||||
|
||||
option(SLS_USE_SYSTEM_ZMQ "Use system installed libzmq" OFF)
|
||||
|
||||
# Using FetchContent to get libzmq
|
||||
include(FetchContent)
|
||||
@@ -60,111 +50,51 @@ if(NOT PATCH_EXECUTABLE)
|
||||
message(FATAL_ERROR "The 'patch' tool is required for patching lib zeromq. Please install it.")
|
||||
endif()
|
||||
|
||||
if(SLS_USE_SYSTEM_ZMQ)
|
||||
# find_package(ZeroMQ REQUIRED)
|
||||
# 1) Try a CMake package config if available (vcpkg, Homebrew, source builds)
|
||||
# Many installs export either ZeroMQ::libzmq or libzmq.
|
||||
find_package(ZeroMQ QUIET CONFIG)
|
||||
|
||||
set(ZEROMQ_TARGET "")
|
||||
|
||||
if (TARGET ZeroMQ::libzmq)
|
||||
set(ZEROMQ_TARGET ZeroMQ::libzmq)
|
||||
message(STATUS "Found target: ${ZEROMQ_TARGET} version: ${ZeroMQ_VERSION}")
|
||||
elseif (TARGET libzmq)
|
||||
set(ZEROMQ_TARGET libzmq)
|
||||
message(STATUS "Found target: ${ZEROMQ_TARGET} version: ${ZeroMQ_VERSION}")
|
||||
elseif (TARGET ZeroMQ::ZeroMQ) # rare older naming
|
||||
set(ZEROMQ_TARGET ZeroMQ::ZeroMQ)
|
||||
message(STATUS "Found target: ${ZEROMQ_TARGET} version: ${ZeroMQ_VERSION}")
|
||||
endif()
|
||||
|
||||
# 2) Fallback: use pkg-config hints + manual find_* to create an imported target
|
||||
if (NOT ZEROMQ_TARGET)
|
||||
find_package(PkgConfig QUIET)
|
||||
if (PkgConfig_FOUND)
|
||||
pkg_check_modules(PC_ZeroMQ QUIET libzmq)
|
||||
endif()
|
||||
|
||||
find_path(ZEROMQ_INCLUDE_DIR
|
||||
NAMES zmq.h
|
||||
HINTS ${PC_ZeroMQ_INCLUDE_DIRS}
|
||||
)
|
||||
|
||||
find_library(ZEROMQ_LIBRARY
|
||||
NAMES zmq libzmq
|
||||
HINTS ${PC_ZeroMQ_LIBRARY_DIRS}
|
||||
)
|
||||
|
||||
if (ZEROMQ_INCLUDE_DIR AND ZEROMQ_LIBRARY)
|
||||
add_library(libzmq UNKNOWN IMPORTED)
|
||||
set_target_properties(libzmq PROPERTIES
|
||||
IMPORTED_LOCATION "${ZEROMQ_LIBRARY}"
|
||||
INTERFACE_INCLUDE_DIRECTORIES "${ZEROMQ_INCLUDE_DIR}"
|
||||
)
|
||||
set(ZEROMQ_TARGET libzmq)
|
||||
endif()
|
||||
message(STATUS "ZeroMQ version (pkg-config): ${PC_ZeroMQ_VERSION}")
|
||||
|
||||
endif()
|
||||
|
||||
# 3) Error out if still not found, with a helpful message
|
||||
if (NOT ZEROMQ_TARGET)
|
||||
message(FATAL_ERROR "ZeroMQ (libzmq) not found. Please install ZeroMQ development files.")
|
||||
endif()
|
||||
|
||||
# Use it
|
||||
# target_link_libraries(your_target PRIVATE ${ZEROMQ_TARGET})
|
||||
|
||||
message(STATUS "Using system installed libzmq: ${ZeroMQ_LIBRARIES}")
|
||||
message(STATUS "ZeroMQ target: ${ZEROMQ_TARGET}")
|
||||
message(STATUS "ZeroMQ include dirs: ${ZeroMQ_INCLUDE_DIRS}")
|
||||
if(SLS_FETCH_ZMQ_FROM_GITHUB)
|
||||
# Opt in to pull down a zmq version from github instead of
|
||||
# using the bundled version
|
||||
FetchContent_Declare(
|
||||
libzmq
|
||||
GIT_REPOSITORY https://github.com/zeromq/libzmq.git
|
||||
GIT_TAG v${SLS_LIBZMQ_VERSION}
|
||||
PATCH_COMMAND ${CMAKE_COMMAND} -E chdir <SOURCE_DIR> patch -p1 < ${CMAKE_CURRENT_SOURCE_DIR}/libs/libzmq/libzmq_cmake_version.patch
|
||||
UPDATE_DISCONNECTED 1
|
||||
)
|
||||
else()
|
||||
if(SLS_FETCH_ZMQ_FROM_GITHUB)
|
||||
# Opt in to pull down a zmq version from github instead of
|
||||
# using the bundled version
|
||||
FetchContent_Declare(
|
||||
libzmq
|
||||
GIT_REPOSITORY https://github.com/zeromq/libzmq.git
|
||||
GIT_TAG v${SLS_LIBZMQ_VERSION}
|
||||
PATCH_COMMAND ${CMAKE_COMMAND} -E chdir <SOURCE_DIR> patch -p1 < ${CMAKE_CURRENT_SOURCE_DIR}/libs/libzmq/libzmq_cmake_version.patch
|
||||
UPDATE_DISCONNECTED 1
|
||||
)
|
||||
else()
|
||||
# Standard behaviour use libzmq included in this repo (libs/libzmq)
|
||||
FetchContent_Declare(
|
||||
libzmq
|
||||
URL ${CMAKE_CURRENT_SOURCE_DIR}/libs/libzmq/libzmq-${SLS_LIBZMQ_VERSION}.tar.gz
|
||||
URL_HASH MD5=cc20b769ac10afa352e5ed2769bb23b3
|
||||
PATCH_COMMAND ${CMAKE_COMMAND} -E chdir <SOURCE_DIR> patch -p1 < ${CMAKE_CURRENT_SOURCE_DIR}/libs/libzmq/libzmq_cmake_version.patch
|
||||
UPDATE_DISCONNECTED 1
|
||||
)
|
||||
endif()
|
||||
|
||||
|
||||
# Disable unwanted options from libzmq
|
||||
set(BUILD_TESTS OFF CACHE BOOL "Switch off libzmq test build")
|
||||
set(BUILD_SHARED OFF CACHE BOOL "Switch off libzmq shared libs")
|
||||
set(WITH_PERF_TOOL OFF CACHE BOOL "")
|
||||
set(ENABLE_CPACK OFF CACHE BOOL "")
|
||||
set(ENABLE_CLANG OFF CACHE BOOL "")
|
||||
set(ENABLE_CURVE OFF CACHE BOOL "")
|
||||
set(ENABLE_DRAFTS OFF CACHE BOOL "")
|
||||
set(ENABLE_PRECOMPILED OFF CACHE BOOL "")
|
||||
set(WITH_DOC OFF CACHE BOOL "")
|
||||
set(WITH_DOCS OFF CACHE BOOL "")
|
||||
|
||||
|
||||
# Using GetProperties and Populate to be able to exclude zmq
|
||||
# from install (not possible with FetchContent_MakeAvailable(libzmq))
|
||||
FetchContent_GetProperties(libzmq)
|
||||
if(NOT libzmq_POPULATED)
|
||||
FetchContent_Populate(libzmq)
|
||||
add_subdirectory(${libzmq_SOURCE_DIR} ${libzmq_BINARY_DIR} EXCLUDE_FROM_ALL)
|
||||
endif()
|
||||
|
||||
# Standard behaviour use libzmq included in this repo (libs/libzmq)
|
||||
FetchContent_Declare(
|
||||
libzmq
|
||||
URL ${CMAKE_CURRENT_SOURCE_DIR}/libs/libzmq/libzmq-${SLS_LIBZMQ_VERSION}.tar.gz
|
||||
URL_HASH MD5=cc20b769ac10afa352e5ed2769bb23b3
|
||||
PATCH_COMMAND ${CMAKE_COMMAND} -E chdir <SOURCE_DIR> patch -p1 < ${CMAKE_CURRENT_SOURCE_DIR}/libs/libzmq/libzmq_cmake_version.patch
|
||||
UPDATE_DISCONNECTED 1
|
||||
)
|
||||
endif()
|
||||
|
||||
# Disable unwanted options from libzmq
|
||||
set(BUILD_TESTS OFF CACHE BOOL "Switch off libzmq test build")
|
||||
set(BUILD_SHARED OFF CACHE BOOL "Switch off libzmq shared libs")
|
||||
set(WITH_PERF_TOOL OFF CACHE BOOL "")
|
||||
set(ENABLE_CPACK OFF CACHE BOOL "")
|
||||
set(ENABLE_CLANG OFF CACHE BOOL "")
|
||||
set(ENABLE_CURVE OFF CACHE BOOL "")
|
||||
set(ENABLE_DRAFTS OFF CACHE BOOL "")
|
||||
set(ENABLE_PRECOMPILED OFF CACHE BOOL "")
|
||||
set(WITH_DOC OFF CACHE BOOL "")
|
||||
set(WITH_DOCS OFF CACHE BOOL "")
|
||||
|
||||
|
||||
|
||||
# Using GetProperties and Populate to be able to exclude zmq
|
||||
# from install (not possible with FetchContent_MakeAvailable(libzmq))
|
||||
FetchContent_GetProperties(libzmq)
|
||||
if(NOT libzmq_POPULATED)
|
||||
FetchContent_Populate(libzmq)
|
||||
add_subdirectory(${libzmq_SOURCE_DIR} ${libzmq_BINARY_DIR} EXCLUDE_FROM_ALL)
|
||||
endif()
|
||||
|
||||
|
||||
|
||||
include(GNUInstallDirs)
|
||||
|
||||
# If conda build, always set lib dir to 'lib'
|
||||
@@ -192,7 +122,7 @@ endif()
|
||||
|
||||
|
||||
option(SLS_USE_HDF5 "HDF5 File format" OFF)
|
||||
option(SLS_BUILD_SHARED_LIBRARIES "Build shared libaries" OFF)
|
||||
option(SLS_BUILD_SHARED_LIBRARIES "Build shared libaries" ON)
|
||||
option(SLS_USE_TEXTCLIENT "Text Client" ON)
|
||||
option(SLS_USE_DETECTOR "Detector libs" ON)
|
||||
option(SLS_USE_RECEIVER "Receiver" ON)
|
||||
@@ -341,9 +271,6 @@ if (NOT TARGET slsProjectCSettings)
|
||||
-Wno-format-truncation
|
||||
)
|
||||
sls_disable_c_warning("-Wstringop-truncation")
|
||||
target_link_libraries(slsProjectCSettings INTERFACE
|
||||
Threads::Threads
|
||||
)
|
||||
endif()
|
||||
|
||||
|
||||
|
||||
@@ -1,41 +1,55 @@
|
||||
SLS Detector Package Major Release x.x.x released on xx.xx.202x
|
||||
===============================================================
|
||||
SLS Detector Package Minor Release 10.0.1 released on ?
|
||||
================================================================
|
||||
|
||||
This document describes the differences between vx.x.x and v10.0.0
|
||||
This document describes the differences between v10.0.1 and v10.0.0
|
||||
|
||||
|
||||
|
||||
CONTENTS
|
||||
--------
|
||||
1 New, Changed or Resolved Features
|
||||
1.1 Compilation
|
||||
1.2 Callback
|
||||
1.3 Python
|
||||
1.4 Client
|
||||
1.5 Detector Server
|
||||
1.6 Simulator
|
||||
1.7 Receiver
|
||||
1.8 Gui
|
||||
2 On-board Detector Server Compatibility
|
||||
3 Firmware Requirements
|
||||
4 Kernel Requirements
|
||||
5 Download, Documentation & Support
|
||||
1 Changes
|
||||
1.1 Compilation Changes
|
||||
1.2 New or Changed Features
|
||||
1.2.1 Breaking API
|
||||
1.2.2 Resolved or Changed Features
|
||||
1.2.3 New Features
|
||||
3 On-board Detector Server Compatibility
|
||||
4 Firmware Requirements
|
||||
5 Kernel Requirements
|
||||
6 Download, Documentation & Support
|
||||
|
||||
|
||||
|
||||
1 New, Changed or Resolved Features
|
||||
=====================================
|
||||
1 Changes
|
||||
==========
|
||||
|
||||
Building shared libraries is disabled by default. If you need to link
|
||||
against any of the libSls*.so libraries, you can enable this by passing
|
||||
-DSLS_BUILD_SHARED_LIBRARIES=ON to CMake.
|
||||
|
||||
Added SLS_USE_SYSTEM_ZMQ option (default OFF) to use the libzmq of the host
|
||||
instead of the one included in our repo.
|
||||
|
||||
Experimental support for building the detector client (including python bindings) on macOS
|
||||
1.1 Compilation Changes
|
||||
========================
|
||||
|
||||
|
||||
1.2 New or Changed Features
|
||||
============================
|
||||
|
||||
Python
|
||||
-------
|
||||
|
||||
* receiver ROI can be set from Python using command ``rx_roi``(it supports any sequence of four or two (for mythen3 and gotthard) ints e.g. a tuple (xmin, xmax, ymin, ymax) or a sequence of such for multiple ROIS)
|
||||
* one can clear all ROI's from Python using command ``rx_clearroi``
|
||||
|
||||
|
||||
1.2.1 Breaking API
|
||||
===================
|
||||
|
||||
|
||||
1.2.2 Resolved or Changed Features
|
||||
===================================
|
||||
|
||||
|
||||
|
||||
1.2.3 New Features
|
||||
===================
|
||||
|
||||
``rx_dbitlist`` keeps the order of the passed bit list
|
||||
|
||||
2 On-board Detector Server Compatibility
|
||||
==========================================
|
||||
@@ -19,7 +19,6 @@ cmake .. -G Ninja \
|
||||
-DSLS_USE_PYTHON=OFF \
|
||||
-DCMAKE_BUILD_TYPE=Release \
|
||||
-DSLS_USE_HDF5=OFF \
|
||||
-DSLS_USE_SYSTEM_ZMQ=ON \
|
||||
|
||||
NCORES=$(getconf _NPROCESSORS_ONLN)
|
||||
echo "Building using: ${NCORES} cores"
|
||||
|
||||
@@ -29,7 +29,6 @@ requirements:
|
||||
- libtiff
|
||||
- zlib
|
||||
- expat
|
||||
- zeromq
|
||||
|
||||
run:
|
||||
- libstdcxx-ng
|
||||
|
||||
@@ -2,8 +2,6 @@ python:
|
||||
- 3.11
|
||||
- 3.12
|
||||
- 3.13
|
||||
- 3.14
|
||||
|
||||
|
||||
c_compiler:
|
||||
- gcc # [linux]
|
||||
@@ -15,4 +13,4 @@ cxx_compiler:
|
||||
- gxx # [linux]
|
||||
|
||||
c_stdlib_version: # [linux]
|
||||
- 2.17 # [linux]
|
||||
- 2.17 # [linux]
|
||||
@@ -9,11 +9,11 @@ package:
|
||||
build:
|
||||
number: 0
|
||||
script:
|
||||
- unset CMAKE_GENERATOR && {{ PYTHON }} -m pip install . -vv --config-settings=cmake.define.SLS_USE_SYSTEM_ZMQ=ON # [not win]
|
||||
- unset CMAKE_GENERATOR && {{ PYTHON }} -m pip install . -vv # [not win]
|
||||
|
||||
requirements:
|
||||
build:
|
||||
- python
|
||||
- python {{python}}
|
||||
- {{ compiler('c') }}
|
||||
- {{ stdlib("c") }}
|
||||
- {{ compiler('cxx') }}
|
||||
@@ -21,7 +21,7 @@ requirements:
|
||||
host:
|
||||
- cmake
|
||||
- ninja
|
||||
- python
|
||||
- python {{python}}
|
||||
- pip
|
||||
- scikit-build-core
|
||||
- pybind11 >=2.13.0
|
||||
@@ -31,7 +31,7 @@ requirements:
|
||||
- catch2
|
||||
|
||||
run:
|
||||
- python
|
||||
- python {{python}}
|
||||
- numpy
|
||||
|
||||
|
||||
|
||||
@@ -20,7 +20,7 @@ print(sys.path)
|
||||
|
||||
# -- Project information -----------------------------------------------------
|
||||
|
||||
project = 'slsDetectorPackage @PROJECT_VERSION@'
|
||||
project = 'slsDetectorPackage'
|
||||
copyright = '2020, PSD Detector Group'
|
||||
author = 'PSD Detector Group'
|
||||
version = '@PROJECT_VERSION@'
|
||||
|
||||
@@ -19,7 +19,7 @@ std::string replace_all(const std::string &src, const std::string &from,
|
||||
const std::string &to) {
|
||||
|
||||
std::string results;
|
||||
std::string::const_iterator const end = src.end();
|
||||
std::string::const_iterator end = src.end();
|
||||
std::string::const_iterator current = src.begin();
|
||||
std::string::const_iterator next =
|
||||
std::search(current, end, from.begin(), from.end());
|
||||
|
||||
@@ -3,13 +3,13 @@
|
||||
You can adapt this file completely to your liking, but it should at least
|
||||
contain the root `toctree` directive.
|
||||
|
||||
slsDetectorPackage
|
||||
Welcome to slsDetectorPackage's documentation!
|
||||
==============================================
|
||||
|
||||
.. note ::
|
||||
|
||||
This is the documentation for the latest development version of slsDetectorPackage.
|
||||
For further detector specific documentation, visit `this page <https://www.psi.ch/en/detectors/documentation>`__.
|
||||
For further documentation, visit the official page: https://www.psi.ch/en/detectors/documentation
|
||||
|
||||
.. toctree::
|
||||
:maxdepth: 3
|
||||
|
||||
@@ -28,7 +28,7 @@ This instructs the firmware to execute the commands from address 0 to 4 (includi
|
||||
.. code-block::
|
||||
|
||||
start [Ctb, Xilinx_Ctb]
|
||||
patternstart [Mythen3, Ctb, Xilinx_Ctb]
|
||||
patternstart [Mythen3]
|
||||
|
||||
The maximal number of patword addresses is 8192. However, it is possible to extend the length of the pattern sequence using loops and wait commands. Loops can be configured with the following commands:
|
||||
|
||||
@@ -70,11 +70,11 @@ The mappings of bit positions in the pattern word to signals/pads of the FPGA ar
|
||||
|
||||
.. table::
|
||||
|
||||
+----+---+------+----+----------+----------+----------------+
|
||||
| 63 | 62| 61-57| 56 | 55-48 | 47-32 | 31-0 |
|
||||
+----+---+------+----+----------+----------+----------------+
|
||||
| A | D| --- | T | EXTIO | DO | DIO |
|
||||
+----+---+------+----+----------+----------+----------------+
|
||||
+----+---+------+----+----------+-------------------+----------------+
|
||||
| 63 | 62| 61-57| 56 | 55-48 | 47-32 | 31-0 |
|
||||
+----+---+------+----+----------+-------------------+----------------+
|
||||
| A | D| --- | T | EXTIO | DO, stream source | DIO |
|
||||
+----+---+------+----+----------+-------------------+----------------+
|
||||
|
||||
DIO: Driving the 32 FPGA pins corresponding to the lowest 32 bits of the patioctrl command. If bits in patioctrl are 0, the same bit positions in DIO will switch to input pins and connect to dbit sampling. Additionally, some of these 32 bits have an automatic override by detector-specific statemachines which is active whenever one of these statemachines is running (currently bits 7,8,11,14 and 20).
|
||||
|
||||
@@ -119,12 +119,4 @@ DIO: Driving the 32 FPGA pins corresponding to the lowest 32 bits of the patioct
|
||||
| SR_MODE | clk | EN | PULSE | RD | CHSIN | ANAMode | TBLOAD |
|
||||
+---------+-----+-------+-------+----+-------+---------+--------+
|
||||
|
||||
For Mythen3 the pattern word only connects to output pins of the FPGA when the pattern is running. Afterwards the signals will switch back to other logic in the FPGA. Both CTB's hold the last executed pattern word until a new pattern is started.
|
||||
|
||||
**Relation of received data to pattern execution**
|
||||
|
||||
In the default configuration the Ctb will send out udp packets to the sls_receiver for every end of a pattern execution. This behavior can be changed using STREAMING_CTRL_REG, where one can configure a bit position in the 64-bit pattern word to trigger udp packets. This allows to send more than one packet per pattern or also no packets at all.
|
||||
|
||||
The "patternstart" command on the ctb exectues the pattern. As long as streaming_ctrl_reg is disabeld, every pattern execution using this command will not send UDP packets.
|
||||
|
||||
For Mythen3 the sending of udp packets is not connected to pattern execution.
|
||||
For Mythen3 the pattern word only connects to output pins of the FPGA when the pattern is running. Afterwards the signals will switch back to other logic in the FPGA. Both CTB's hold the last executed pattern word until a new pattern is started.
|
||||
@@ -50,12 +50,6 @@ datetime.timedelta, DurationWrapper or by setting the time in seconds.
|
||||
>>> d.getExptime()
|
||||
[sls::DurationWrapper(total_seconds: 181.23 count: 181230000000)]
|
||||
|
||||
# In C++ it is possible to use chrono literals to set time more easily
|
||||
# d.setExptime(7ms). However, this is not possible due to pythons syntax.
|
||||
# instead we can create a unit that we use for conversion.
|
||||
>>> ms = dt.timedelta(milliseconds = 1)
|
||||
>>> d.exptime = 7.5*ms
|
||||
|
||||
|
||||
|
||||
------------------------------------
|
||||
|
||||
@@ -154,8 +154,6 @@ class AdcTab(QtWidgets.QWidget):
|
||||
self.mainWindow.analogPlots[i].setData(waveform)
|
||||
plotName = getattr(self.view, f"labelADC{i}").text()
|
||||
waveforms[plotName] = waveform
|
||||
elif checkBoxEn.isChecked():
|
||||
idx += 1
|
||||
return waveforms
|
||||
|
||||
@recordOrApplyPedestal
|
||||
|
||||
@@ -50,20 +50,20 @@ class AcquisitionTab(QtWidgets.QWidget):
|
||||
self.plotTab = self.mainWindow.plotTab
|
||||
self.toggleStartButton(False)
|
||||
if self.det.type == detectorType.XILINX_CHIPTESTBOARD:
|
||||
self.view.labelRunF.setDisabled(True)
|
||||
self.view.labelADCF.setDisabled(True)
|
||||
self.view.labelADCPhase.setDisabled(True)
|
||||
self.view.labelADCPipeline.setDisabled(True)
|
||||
self.view.labelDBITF.setDisabled(True)
|
||||
self.view.labelDBITPhase.setDisabled(True)
|
||||
self.view.labelDBITPipeline.setDisabled(True)
|
||||
self.view.spinBoxRunF.setDisabled(True)
|
||||
self.view.spinBoxADCF.setDisabled(True)
|
||||
self.view.spinBoxADCPhase.setDisabled(True)
|
||||
self.view.spinBoxADCPipeline.setDisabled(True)
|
||||
self.view.spinBoxDBITF.setDisabled(True)
|
||||
self.view.spinBoxDBITPhase.setDisabled(True)
|
||||
self.view.spinBoxDBITPipeline.setDisabled(True)
|
||||
self.view.labelRunF.setText("Run Clock Frequency (kHz):")
|
||||
self.view.labelDBITF.setText("DBIT Clock Frequency (kHz):")
|
||||
self.view.labelADCF.setText("ADC Clock Frequency (kHz):")
|
||||
self.view.spinBoxRunF.setMaximum(250000)
|
||||
self.view.spinBoxDBITF.setMaximum(250000)
|
||||
self.view.spinBoxADCF.setMaximum(250000)
|
||||
|
||||
def connect_ui(self):
|
||||
# For Acquistions Tab
|
||||
@@ -72,13 +72,12 @@ class AcquisitionTab(QtWidgets.QWidget):
|
||||
self.view.spinBoxAnalog.editingFinished.connect(self.setAnalog)
|
||||
self.view.spinBoxDigital.editingFinished.connect(self.setDigital)
|
||||
|
||||
if self.det.type in [detectorType.CHIPTESTBOARD, detectorType.XILINX_CHIPTESTBOARD]:
|
||||
if self.det.type == detectorType.CHIPTESTBOARD:
|
||||
self.view.spinBoxRunF.editingFinished.connect(self.setRunFrequency)
|
||||
self.view.spinBoxADCF.editingFinished.connect(self.setADCFrequency)
|
||||
self.view.spinBoxDBITF.editingFinished.connect(self.setDBITFrequency)
|
||||
if self.det.type == detectorType.CHIPTESTBOARD:
|
||||
self.view.spinBoxADCPhase.editingFinished.connect(self.setADCPhase)
|
||||
self.view.spinBoxADCPipeline.editingFinished.connect(self.setADCPipeline)
|
||||
self.view.spinBoxDBITF.editingFinished.connect(self.setDBITFrequency)
|
||||
self.view.spinBoxDBITPhase.editingFinished.connect(self.setDBITPhase)
|
||||
self.view.spinBoxDBITPipeline.editingFinished.connect(self.setDBITPipeline)
|
||||
|
||||
@@ -99,13 +98,12 @@ class AcquisitionTab(QtWidgets.QWidget):
|
||||
self.getAnalog()
|
||||
self.getDigital()
|
||||
|
||||
if self.det.type in [detectorType.CHIPTESTBOARD, detectorType.XILINX_CHIPTESTBOARD]:
|
||||
if self.det.type == detectorType.CHIPTESTBOARD:
|
||||
self.getRunFrequency()
|
||||
self.getADCFrequency()
|
||||
self.getDBITFrequency()
|
||||
if self.det.type == detectorType.CHIPTESTBOARD:
|
||||
self.getADCPhase()
|
||||
self.getADCPipeline()
|
||||
self.getDBITFrequency()
|
||||
self.getDBITPhase()
|
||||
self.getDBITPipeline()
|
||||
|
||||
|
||||
@@ -17,7 +17,7 @@ dependencies = [
|
||||
|
||||
[tool.cibuildwheel]
|
||||
before-all = "uname -a"
|
||||
build = "cp{311,312,313,314}-manylinux_x86_64"
|
||||
build = "cp{311,312,313}-manylinux_x86_64"
|
||||
|
||||
[tool.scikit-build.build]
|
||||
verbose = true
|
||||
|
||||
@@ -3346,11 +3346,7 @@ class Detector(CppDetectorApi):
|
||||
@property
|
||||
@element
|
||||
def runclk(self):
|
||||
"""
|
||||
[Ctb] Sets Run clock frequency in MHz. \n
|
||||
[Xilinx Ctb] Sets Run clock frequency in kHz.
|
||||
"""
|
||||
|
||||
"""[Ctb] Run clock in MHz."""
|
||||
return self.getRUNClock()
|
||||
|
||||
@runclk.setter
|
||||
@@ -3431,11 +3427,7 @@ class Detector(CppDetectorApi):
|
||||
@property
|
||||
@element
|
||||
def dbitclk(self):
|
||||
"""
|
||||
[Ctb] Sets clock for latching the digital bits in MHz. \n
|
||||
[Xilinx Ctb] clock for latching the digital bits in kHz.
|
||||
"""
|
||||
|
||||
"""[Ctb] Clock for latching the digital bits in MHz."""
|
||||
return self.getDBITClock()
|
||||
|
||||
@dbitclk.setter
|
||||
@@ -3562,11 +3554,7 @@ class Detector(CppDetectorApi):
|
||||
@property
|
||||
@element
|
||||
def adcclk(self):
|
||||
"""
|
||||
[Ctb] Sets ADC clock frequency in MHz. \n
|
||||
[Xilinx Ctb] Sets ADC clock frequency in kHz.
|
||||
"""
|
||||
|
||||
"""[Ctb] Sets ADC clock frequency in MHz. """
|
||||
return self.getADCClock()
|
||||
|
||||
@adcclk.setter
|
||||
|
||||
@@ -24,7 +24,7 @@ void init_duration(py::module &m) {
|
||||
m.def(
|
||||
"test_return_DurationWrapper",
|
||||
[]() {
|
||||
DurationWrapper const t(1.3);
|
||||
DurationWrapper t(1.3);
|
||||
return t;
|
||||
},
|
||||
R"(
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
#include "sls/sls_detector_defs.h"
|
||||
namespace py = pybind11;
|
||||
void init_enums(py::module &m) {
|
||||
py::class_<slsDetectorDefs> const Defs(m, "slsDetectorDefs");
|
||||
py::class_<slsDetectorDefs> Defs(m, "slsDetectorDefs");
|
||||
py::class_<slsDetectorDefs::xy> xy(m, "xy");
|
||||
xy.def(py::init());
|
||||
xy.def(py::init<int, int>());
|
||||
|
||||
@@ -15,7 +15,7 @@ void init_pattern(py::module &m) {
|
||||
|
||||
patternParameters.def(py::init());
|
||||
patternParameters.def("numpy_view", [](py::object &obj) {
|
||||
pat const&o = obj.cast<pat &>();
|
||||
pat &o = obj.cast<pat &>();
|
||||
return py::array_t<pat>(1, &o, obj);
|
||||
});
|
||||
|
||||
|
||||
@@ -3,6 +3,8 @@
|
||||
add_executable(using_logger using_logger.cpp)
|
||||
target_link_libraries(using_logger
|
||||
slsSupportShared
|
||||
pthread
|
||||
rt
|
||||
)
|
||||
|
||||
set_target_properties(using_logger PROPERTIES
|
||||
|
||||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
@@ -76,8 +76,11 @@ foreach(exe ${JUNGFRAU_EXECUTABLES})
|
||||
target_link_libraries(${exe}
|
||||
PUBLIC
|
||||
slsSupportStatic
|
||||
pthread
|
||||
tiffio
|
||||
fmt::fmt
|
||||
#-L/usr/lib64/
|
||||
#-lm -lstdc++ -lrt
|
||||
|
||||
PRIVATE
|
||||
slsProjectWarnings
|
||||
|
||||
@@ -69,6 +69,7 @@ foreach(exe ${MOENCH_EXECUTABLES})
|
||||
PUBLIC
|
||||
slsSupportStatic
|
||||
${ZeroMQ_LIBRARIES}
|
||||
pthread
|
||||
tiffio
|
||||
|
||||
PRIVATE
|
||||
|
||||
@@ -37,9 +37,7 @@ target_compile_definitions(ctbDetectorServer_virtual
|
||||
)
|
||||
|
||||
target_link_libraries(ctbDetectorServer_virtual
|
||||
PUBLIC
|
||||
m
|
||||
slsProjectCSettings
|
||||
PUBLIC pthread rt m slsProjectCSettings
|
||||
)
|
||||
|
||||
set_target_properties(ctbDetectorServer_virtual PROPERTIES
|
||||
|
||||
@@ -5,7 +5,6 @@
|
||||
|
||||
/* Definitions for FPGA */
|
||||
#define MEM_MAP_SHIFT 1
|
||||
#define REG_OFFSET (2)
|
||||
|
||||
/* FPGA Version RO register */
|
||||
#define FPGA_VERSION_REG (0x00 << MEM_MAP_SHIFT)
|
||||
@@ -66,8 +65,8 @@
|
||||
(0x000000FF << STATUS_PT_CNTRL_STTS_OFF_OFST)
|
||||
#define STATUS_IDLE_MSK (0x677FF)
|
||||
|
||||
/* Register containing the git hash of the FPGA firmware */
|
||||
#define FIRMWARE_GIT_HASH_REG (0x03 << MEM_MAP_SHIFT)
|
||||
/* Look at me RO register TODO */
|
||||
#define LOOK_AT_ME_REG (0x03 << MEM_MAP_SHIFT)
|
||||
|
||||
/* System Status RO register */
|
||||
#define SYSTEM_STATUS_REG (0x04 << MEM_MAP_SHIFT)
|
||||
@@ -120,7 +119,7 @@
|
||||
#define MOD_SERIAL_NUMBER_VRSN_MSK (0x0000003F << MOD_SERIAL_NUMBER_VRSN_OFST)
|
||||
|
||||
/* API Version RO register */
|
||||
#define API_VERSION_REG (0x0B << MEM_MAP_SHIFT)
|
||||
#define API_VERSION_REG (0x0F << MEM_MAP_SHIFT)
|
||||
|
||||
#define API_VERSION_OFST (0)
|
||||
#define API_VERSION_MSK (0x00FFFFFF << API_VERSION_OFST)
|
||||
@@ -129,24 +128,24 @@
|
||||
|
||||
/* Time from Start 64 bit RO register. t = GCLK x 50 ns. Reset using
|
||||
* CONTROL_CRST. TODO */
|
||||
#define TIME_FROM_START_LSB_REG (0x97 << MEM_MAP_SHIFT)
|
||||
#define TIME_FROM_START_MSB_REG (0x98 << MEM_MAP_SHIFT)
|
||||
#define TIME_FROM_START_LSB_REG (0x10 << MEM_MAP_SHIFT)
|
||||
#define TIME_FROM_START_MSB_REG (0x11 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Delay Left 64 bit RO register. t = DLY x 50 ns. TODO */
|
||||
#define DELAY_LEFT_LSB_REG (0x8D << MEM_MAP_SHIFT)
|
||||
#define DELAY_LEFT_MSB_REG (0x8E << MEM_MAP_SHIFT)
|
||||
#define DELAY_LEFT_LSB_REG (0x12 << MEM_MAP_SHIFT)
|
||||
#define DELAY_LEFT_MSB_REG (0x13 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Triggers Left 64 bit RO register TODO */
|
||||
#define CYCLES_LEFT_LSB_REG (0x8F << MEM_MAP_SHIFT)
|
||||
#define CYCLES_LEFT_MSB_REG (0x90 << MEM_MAP_SHIFT)
|
||||
#define CYCLES_LEFT_LSB_REG (0x14 << MEM_MAP_SHIFT)
|
||||
#define CYCLES_LEFT_MSB_REG (0x15 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Frames Left 64 bit RO register TODO */
|
||||
#define FRAMES_LEFT_LSB_REG (0x91 << MEM_MAP_SHIFT)
|
||||
#define FRAMES_LEFT_MSB_REG (0x92 << MEM_MAP_SHIFT)
|
||||
#define FRAMES_LEFT_LSB_REG (0x16 << MEM_MAP_SHIFT)
|
||||
#define FRAMES_LEFT_MSB_REG (0x17 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Period Left 64 bit RO register. t = T x 50 ns. TODO */
|
||||
#define PERIOD_LEFT_LSB_REG (0x93 << MEM_MAP_SHIFT)
|
||||
#define PERIOD_LEFT_MSB_REG (0x94 << MEM_MAP_SHIFT)
|
||||
#define PERIOD_LEFT_LSB_REG (0x18 << MEM_MAP_SHIFT)
|
||||
#define PERIOD_LEFT_MSB_REG (0x19 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Exposure Time Left 64 bit RO register */
|
||||
// #define EXPTIME_LEFT_LSB_REG (0x1A << MEM_MAP_SHIFT) // Not
|
||||
@@ -161,34 +160,34 @@
|
||||
//// Not used in FW
|
||||
|
||||
/* Data In 64 bit RO register TODO */
|
||||
#define DATA_IN_LSB_REG (0x10 << MEM_MAP_SHIFT)
|
||||
#define DATA_IN_MSB_REG (0x11 << MEM_MAP_SHIFT)
|
||||
#define DATA_IN_LSB_REG (0x1E << MEM_MAP_SHIFT)
|
||||
#define DATA_IN_MSB_REG (0x1F << MEM_MAP_SHIFT)
|
||||
|
||||
/* Pattern Out 64 bit RO register */
|
||||
#define PATTERN_OUT_LSB_REG (0x80 << MEM_MAP_SHIFT)
|
||||
#define PATTERN_OUT_MSB_REG (0x81 << MEM_MAP_SHIFT)
|
||||
#define PATTERN_OUT_LSB_REG (0x20 << MEM_MAP_SHIFT)
|
||||
#define PATTERN_OUT_MSB_REG (0x21 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Frame number of next acquisition register (64 bit register) */
|
||||
#define NEXT_FRAME_NUMB_LOCAL_LSB_REG (0x12 << MEM_MAP_SHIFT)
|
||||
#define NEXT_FRAME_NUMB_LOCAL_MSB_REG (0x13 << MEM_MAP_SHIFT)
|
||||
#define NEXT_FRAME_NUMB_LOCAL_LSB_REG (0x22 << MEM_MAP_SHIFT)
|
||||
#define NEXT_FRAME_NUMB_LOCAL_MSB_REG (0x23 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Frames From Start PG 64 bit RO register. Reset using CONTROL_CRST. TODO */
|
||||
#define FRAMES_FROM_START_PG_LSB_REG (0x99 << MEM_MAP_SHIFT)
|
||||
#define FRAMES_FROM_START_PG_MSB_REG (0x9A << MEM_MAP_SHIFT)
|
||||
#define FRAMES_FROM_START_PG_LSB_REG (0x24 << MEM_MAP_SHIFT)
|
||||
#define FRAMES_FROM_START_PG_MSB_REG (0x25 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Start Frame Time (Measurement Time) 64 bit register (timestamp at a frame
|
||||
* start until reset) TODO */
|
||||
#define START_FRAME_TIME_LSB_REG (0x9B << MEM_MAP_SHIFT)
|
||||
#define START_FRAME_TIME_MSB_REG (0x9C << MEM_MAP_SHIFT)
|
||||
#define START_FRAME_TIME_LSB_REG (0x26 << MEM_MAP_SHIFT)
|
||||
#define START_FRAME_TIME_MSB_REG (0x27 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Power Status RO register */
|
||||
#define POWER_STATUS_REG (0x18 << MEM_MAP_SHIFT)
|
||||
#define POWER_STATUS_REG (0x29 << MEM_MAP_SHIFT)
|
||||
|
||||
#define POWER_STATUS_ALRT_OFST (27)
|
||||
#define POWER_STATUS_ALRT_MSK (0x0000001F << POWER_STATUS_ALRT_OFST)
|
||||
|
||||
/* FIFO Transceiver In Status RO register */
|
||||
#define FIFO_TIN_STATUS_REG (0x1A << MEM_MAP_SHIFT)
|
||||
#define FIFO_TIN_STATUS_REG (0x30 << MEM_MAP_SHIFT)
|
||||
#define FIFO_TIN_STATUS_FIFO_EMPTY_1_OFST (4)
|
||||
#define FIFO_TIN_STATUS_FIFO_EMPTY_1_MSK (0x00000001 << FIFO_TIN_STATUS_FIFO_EMPTY_1_OFST)
|
||||
#define FIFO_TIN_STATUS_FIFO_EMPTY_2_OFST (5)
|
||||
@@ -199,54 +198,23 @@
|
||||
#define FIFO_TIN_STATUS_FIFO_EMPTY_4_MSK (0x00000001 << FIFO_TIN_STATUS_FIFO_EMPTY_4_OFST)
|
||||
#define FIFO_TIN_STATUS_FIFO_EMPTY_ALL_MSK (0x0000000F << FIFO_TIN_STATUS_FIFO_EMPTY_1_OFST)
|
||||
|
||||
/* FIFO Transceiver Fill level RO register */
|
||||
#define FIFO_TIN_FILL_REG (0x25 << MEM_MAP_SHIFT)
|
||||
#define FIFO_TIN_FILL_FIFO_1_OFST (0)
|
||||
#define FIFO_TIN_FILL_FIFO_1_MSK (0x00003FFF << FIFO_TIN_FILL_FIFO__1_OFST)
|
||||
#define FIFO_TIN_FILL_FIFO_2_OFST (16)
|
||||
#define FIFO_TIN_FILL_FIFO_2_MSK (0x00003FFF << FIFO_TIN_FILL_FIFO__2_OFST)
|
||||
|
||||
/* FIFO ADC Fill level RO register */
|
||||
#define FIFO_ADC_FILL_REG (0x26 << MEM_MAP_SHIFT)
|
||||
#define FIFO_ADC_FILL_FIFO_OFST (0)
|
||||
#define FIFO_ADC_FILL_FIFO_MSK (0x00003FFF << FIFO_ADC_FILL_FIFO_OFST)
|
||||
|
||||
/* Enable continuos readout register */
|
||||
#define CONTINUOUS_RO_ENABLE_REG (0x27 << MEM_MAP_SHIFT)
|
||||
#define CONTINUOUS_RO_ADC_ENABLE_OFST (0)
|
||||
#define CONTINUOUS_RO_TIN_ENABLE_OFST (1)
|
||||
#define CONTINUOUS_RO_DBIT_ENABLE_OFST (2)
|
||||
#define CONTINUOUS_RO_ADC_ENABLE_MSK (0x00000001 << CONTINUOUS_RO_ADC_ENABLE_OFST)
|
||||
#define CONTINUOUS_RO_TIN_ENABLE_MSK (0x00000001 << CONTINUOUS_RO_TIN_ENABLE_OFST)
|
||||
#define CONTINUOUS_RO_DBIT_ENABLE_MSK (0x00000001 << CONTINUOUS_RO_DBIT_ENABLE_OFST)
|
||||
#define DBIT_INJECT_COUNTER_ENA_OFST (3) // continuously injects fake-data into the dbit fifo when enabled.
|
||||
#define DBIT_INJECT_COUNTER_ENA_MSK (0x00000001 << DBIT_INJECT_COUNTER_ENA_OFST)
|
||||
#define DBIT_INJECT_COUNTER_CLKDIV_OFST (8) // Additional clock divider for fake-data injection
|
||||
#define DBIT_INJECT_COUNTER_CLKDIV_MSK (0x000000FF << DBIT_INJECT_COUNTER_CLKDIV_OFST)
|
||||
|
||||
/* 64-bit FPGA chip ID. Unique for every device. read-only */
|
||||
#define FPGA_chipID_0_REG (0x28 << MEM_MAP_SHIFT)
|
||||
#define FPGA_chipID_1_REG (0x29 << MEM_MAP_SHIFT)
|
||||
|
||||
/* FIFO Transceiver In 64 bit RO register */
|
||||
#define FIFO_TIN_LSB_REG (0x1B << MEM_MAP_SHIFT)
|
||||
#define FIFO_TIN_MSB_REG (0x1C << MEM_MAP_SHIFT)
|
||||
#define FIFO_TIN_LSB_REG (0x31 << MEM_MAP_SHIFT)
|
||||
#define FIFO_TIN_MSB_REG (0x32 << MEM_MAP_SHIFT)
|
||||
|
||||
/* FIFO Digital In Status RO register */
|
||||
#define FIFO_DIN_STATUS_REG (0x1D << MEM_MAP_SHIFT)
|
||||
#define FIFO_DIN_STATUS_FIFO_FILL_OFST (0)
|
||||
#define FIFO_DIN_STATUS_FIFO_FILL_MSK (0x00003FFF)
|
||||
#define FIFO_DIN_STATUS_REG (0x3B << MEM_MAP_SHIFT)
|
||||
#define FIFO_DIN_STATUS_FIFO_FULL_OFST (30)
|
||||
#define FIFO_DIN_STATUS_FIFO_FULL_MSK (0x00000001 << FIFO_DIN_STATUS_FIFO_FULL_OFST)
|
||||
#define FIFO_DIN_STATUS_FIFO_EMPTY_OFST (31)
|
||||
#define FIFO_DIN_STATUS_FIFO_EMPTY_MSK (0x00000001 << FIFO_DIN_STATUS_FIFO_EMPTY_OFST)
|
||||
|
||||
/* FIFO Digital In 64 bit RO register */
|
||||
#define FIFO_DIN_LSB_REG (0x1E << MEM_MAP_SHIFT)
|
||||
#define FIFO_DIN_MSB_REG (0x1F << MEM_MAP_SHIFT)
|
||||
#define FIFO_DIN_LSB_REG (0x3C << MEM_MAP_SHIFT)
|
||||
#define FIFO_DIN_MSB_REG (0x3D << MEM_MAP_SHIFT)
|
||||
|
||||
/* SPI (Serial Peripheral Interface) DAC, HV RW register */
|
||||
#define SPI_REG (0x20 << MEM_MAP_SHIFT)
|
||||
#define SPI_REG (0x40 << MEM_MAP_SHIFT)
|
||||
|
||||
#define SPI_DAC_SRL_DGTL_OTPT_OFST (0)
|
||||
#define SPI_DAC_SRL_DGTL_OTPT_MSK (0x00000001 << SPI_DAC_SRL_DGTL_OTPT_OFST)
|
||||
@@ -262,7 +230,7 @@
|
||||
#define SPI_HV_SRL_CS_OTPT_MSK (0x00000001 << SPI_HV_SRL_CS_OTPT_OFST)
|
||||
|
||||
/* ADC SPI (Serial Peripheral Interface) RW register */
|
||||
#define ADC_SPI_REG (0x21 << MEM_MAP_SHIFT)
|
||||
#define ADC_SPI_REG (0x41 << MEM_MAP_SHIFT)
|
||||
|
||||
#define ADC_SPI_SRL_CLK_OTPT_OFST (0)
|
||||
#define ADC_SPI_SRL_CLK_OTPT_MSK (0x00000001 << ADC_SPI_SRL_CLK_OTPT_OFST)
|
||||
@@ -272,7 +240,7 @@
|
||||
#define ADC_SPI_SRL_CS_OTPT_MSK (0x0000000F << ADC_SPI_SRL_CS_OTPT_OFST)
|
||||
|
||||
/* ADC Offset RW register */
|
||||
#define ADC_OFFSET_REG (0x22 << MEM_MAP_SHIFT)
|
||||
#define ADC_OFFSET_REG (0x42 << MEM_MAP_SHIFT)
|
||||
|
||||
#define ADC_OFFSET_ADC_PPLN_OFST (0)
|
||||
#define ADC_OFFSET_ADC_PPLN_MSK (0x000000FF << ADC_OFFSET_ADC_PPLN_OFST)
|
||||
@@ -280,7 +248,7 @@
|
||||
#define ADC_OFFSET_DBT_PPLN_MSK (0x000000FF << ADC_OFFSET_DBT_PPLN_OFST)
|
||||
|
||||
/* ADC Port Invert RW register */
|
||||
#define ADC_PORT_INVERT_REG (0x23 << MEM_MAP_SHIFT)
|
||||
#define ADC_PORT_INVERT_REG (0x43 << MEM_MAP_SHIFT)
|
||||
|
||||
#define ADC_PORT_INVERT_0_INPT_OFST (0)
|
||||
#define ADC_PORT_INVERT_0_INPT_MSK (0x000000FF << ADC_PORT_INVERT_0_INPT_OFST)
|
||||
@@ -292,7 +260,7 @@
|
||||
#define ADC_PORT_INVERT_3_INPT_MSK (0x000000FF << ADC_PORT_INVERT_3_INPT_OFST)
|
||||
|
||||
/* Dummy RW register */
|
||||
#define DUMMY_REG (0x24 << MEM_MAP_SHIFT)
|
||||
#define DUMMY_REG (0x44 << MEM_MAP_SHIFT)
|
||||
|
||||
#define DUMMY_FIFO_CHNNL_SLCT_OFST (0)
|
||||
#define DUMMY_FIFO_CHNNL_SLCT_MSK (0x0000003F << DUMMY_FIFO_CHNNL_SLCT_OFST)
|
||||
@@ -305,8 +273,46 @@
|
||||
#define DUMMY_TRNSCVR_FIFO_RD_STRBE_OFST (14)
|
||||
#define DUMMY_TRNSCVR_FIFO_RD_STRBE_MSK (0x00000001 << DUMMY_TRNSCVR_FIFO_RD_STRBE_OFST)
|
||||
|
||||
/* Receiver IP Address RW register */
|
||||
#define RX_IP_REG (0x45 << MEM_MAP_SHIFT)
|
||||
|
||||
/* UDP Port RW register */
|
||||
#define UDP_PORT_REG (0x46 << MEM_MAP_SHIFT)
|
||||
|
||||
#define UDP_PORT_RX_OFST (0)
|
||||
#define UDP_PORT_RX_MSK (0x0000FFFF << UDP_PORT_RX_OFST)
|
||||
#define UDP_PORT_TX_OFST (16)
|
||||
#define UDP_PORT_TX_MSK (0x0000FFFF << UDP_PORT_TX_OFST)
|
||||
|
||||
/* Receiver Mac Address 64 bit RW register */
|
||||
#define RX_MAC_LSB_REG (0x47 << MEM_MAP_SHIFT)
|
||||
#define RX_MAC_MSB_REG (0x48 << MEM_MAP_SHIFT)
|
||||
|
||||
#define RX_MAC_LSB_OFST (0)
|
||||
#define RX_MAC_LSB_MSK (0xFFFFFFFF << RX_MAC_LSB_OFST)
|
||||
#define RX_MAC_MSB_OFST (0)
|
||||
#define RX_MAC_MSB_MSK (0x0000FFFF << RX_MAC_MSB_OFST)
|
||||
|
||||
/* Detector/ Transmitter Mac Address 64 bit RW register */
|
||||
#define TX_MAC_LSB_REG (0x49 << MEM_MAP_SHIFT)
|
||||
#define TX_MAC_MSB_REG (0x4A << MEM_MAP_SHIFT)
|
||||
|
||||
#define TX_MAC_LSB_OFST (0)
|
||||
#define TX_MAC_LSB_MSK (0xFFFFFFFF << TX_MAC_LSB_OFST)
|
||||
#define TX_MAC_MSB_OFST (0)
|
||||
#define TX_MAC_MSB_MSK (0x0000FFFF << TX_MAC_MSB_OFST)
|
||||
|
||||
/* Detector/ Transmitter IP Address RW register */
|
||||
#define TX_IP_REG (0x4B << MEM_MAP_SHIFT)
|
||||
|
||||
/* Detector/ Transmitter IP Checksum RW register */
|
||||
#define TX_IP_CHECKSUM_REG (0x4C << MEM_MAP_SHIFT)
|
||||
|
||||
#define TX_IP_CHECKSUM_OFST (0)
|
||||
#define TX_IP_CHECKSUM_MSK (0x0000FFFF << TX_IP_CHECKSUM_OFST)
|
||||
|
||||
/* Configuration RW register */
|
||||
#define CONFIG_REG (0x2D << MEM_MAP_SHIFT)
|
||||
#define CONFIG_REG (0x4D << MEM_MAP_SHIFT)
|
||||
|
||||
#define CONFIG_LED_DSBL_OFST (0)
|
||||
#define CONFIG_LED_DSBL_MSK (0x00000001 << CONFIG_LED_DSBL_OFST)
|
||||
@@ -321,7 +327,7 @@
|
||||
#define CONFIG_GB10_SND_UDP_MSK (0x00000001 << CONFIG_GB10_SND_UDP_OFST)
|
||||
|
||||
/* External Signal RW register */
|
||||
#define EXT_SIGNAL_REG (0x2E << MEM_MAP_SHIFT)
|
||||
#define EXT_SIGNAL_REG (0x4E << MEM_MAP_SHIFT)
|
||||
|
||||
#define EXT_SIGNAL_OFST (0)
|
||||
#define EXT_SIGNAL_MSK (0x00000001 << EXT_SIGNAL_OFST)
|
||||
@@ -329,7 +335,7 @@
|
||||
#define EXT_SIGNAL_TRGGR_VAL ((0x1 << EXT_SIGNAL_OFST) & EXT_SIGNAL_MSK)
|
||||
|
||||
/* Control RW register */
|
||||
#define CONTROL_REG (0x2F << MEM_MAP_SHIFT)
|
||||
#define CONTROL_REG (0x4F << MEM_MAP_SHIFT)
|
||||
|
||||
#define CONTROL_STRT_ACQSTN_OFST (0)
|
||||
#define CONTROL_STRT_ACQSTN_MSK (0x00000001 << CONTROL_STRT_ACQSTN_OFST)
|
||||
@@ -369,10 +375,10 @@
|
||||
#define CONTROL_CLR_ACQSTN_FIFO_MSK (0x00000001 << CONTROL_CLR_ACQSTN_FIFO_OFST)
|
||||
|
||||
/* Reconfiguratble PLL Paramater RW register */
|
||||
#define PLL_PARAM_REG (0x30 << MEM_MAP_SHIFT)
|
||||
#define PLL_PARAM_REG (0x50 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Reconfiguratble PLL Control RW regiser */
|
||||
#define PLL_CNTRL_REG (0x31 << MEM_MAP_SHIFT)
|
||||
#define PLL_CNTRL_REG (0x51 << MEM_MAP_SHIFT)
|
||||
|
||||
#define PLL_CNTRL_RCNFG_PRMTR_RST_OFST (0)
|
||||
#define PLL_CNTRL_RCNFG_PRMTR_RST_MSK \
|
||||
@@ -384,15 +390,8 @@
|
||||
#define PLL_CNTRL_ADDR_OFST (16)
|
||||
#define PLL_CNTRL_ADDR_MSK (0x0000003F << PLL_CNTRL_ADDR_OFST)
|
||||
|
||||
/* Streaming Control RW regiser */
|
||||
#define STREAMING_CTRL_REG (0x3D << MEM_MAP_SHIFT)
|
||||
#define STREAMING_CTRL_ENA_OFST (15)
|
||||
#define STREAMING_CTRL_ENA_MSK (0x00000001 << STREAMING_CTRL_ENA_OFST)
|
||||
#define STREAMING_CTRL_SELECT_OFST (0)
|
||||
#define STREAMING_CTRL_SELECT_MSK (0x0000003F << STREAMING_CTRL_SELECT_OFST)
|
||||
|
||||
/* Pattern Control RW register */
|
||||
#define PATTERN_CNTRL_REG (0x88 << MEM_MAP_SHIFT)
|
||||
#define PATTERN_CNTRL_REG (0x52 << MEM_MAP_SHIFT)
|
||||
|
||||
#define PATTERN_CNTRL_WR_OFST (0)
|
||||
#define PATTERN_CNTRL_WR_MSK (0x00000001 << PATTERN_CNTRL_WR_OFST)
|
||||
@@ -402,31 +401,70 @@
|
||||
#define PATTERN_CNTRL_ADDR_MSK (0x00001FFF << PATTERN_CNTRL_ADDR_OFST)
|
||||
|
||||
/* Pattern Limit RW regiser */
|
||||
#define PATTERN_LIMIT_REG (0x89 << MEM_MAP_SHIFT)
|
||||
#define PATTERN_LIMIT_REG (0x53 << MEM_MAP_SHIFT)
|
||||
|
||||
#define PATTERN_LIMIT_STRT_OFST (0)
|
||||
#define PATTERN_LIMIT_STRT_MSK (0x00001FFF << PATTERN_LIMIT_STRT_OFST)
|
||||
#define PATTERN_LIMIT_STP_OFST (16)
|
||||
#define PATTERN_LIMIT_STP_MSK (0x00001FFF << PATTERN_LIMIT_STP_OFST)
|
||||
|
||||
/** Pattern Loop and Wait Definitions, 5 regs each */
|
||||
#define PATTERN_LOOPDEF_BASE (0xA0 << MEM_MAP_SHIFT)
|
||||
#define PATTERN_LOOP_ADDR_WORD_OFST (0)
|
||||
#define PATTERN_LOOP_ITERATION_WORD_OFST (1)
|
||||
#define PATTERN_WAIT_ADDR_WORD_OFST (2)
|
||||
#define PATTERN_WAIT_TIMER_LSB_WORD_OFST (3)
|
||||
#define PATTERN_WAIT_TIMER_MSB_WORD_OFST (4)
|
||||
#define PATTERN_LOOPDEF_NWORDS_OFST (5)
|
||||
/* Pattern Loop 0 Address RW regiser */
|
||||
#define PATTERN_LOOP_0_ADDR_REG (0x54 << MEM_MAP_SHIFT)
|
||||
|
||||
#define PATTERN_WAIT_ADDR_OFST (0)
|
||||
#define PATTERN_WAIT_ADDR_MSK (0x00001FFF << PATTERN_WAIT_ADDR_OFST)
|
||||
#define PATTERN_LOOP_ADDR_STRT_OFST (0)
|
||||
#define PATTERN_LOOP_ADDR_STRT_MSK (0x00001FFF << PATTERN_LOOP_ADDR_STRT_OFST)
|
||||
#define PATTERN_LOOP_ADDR_STP_OFST (16)
|
||||
#define PATTERN_LOOP_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_ADDR_STP_OFST)
|
||||
#define PATTERN_LOOP_0_ADDR_STRT_OFST (0)
|
||||
#define PATTERN_LOOP_0_ADDR_STRT_MSK \
|
||||
(0x00001FFF << PATTERN_LOOP_0_ADDR_STRT_OFST)
|
||||
#define PATTERN_LOOP_0_ADDR_STP_OFST (16)
|
||||
#define PATTERN_LOOP_0_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_0_ADDR_STP_OFST)
|
||||
|
||||
/* Pattern Loop 0 Iteration RW regiser */
|
||||
#define PATTERN_LOOP_0_ITERATION_REG (0x55 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Pattern Loop 1 Address RW regiser */
|
||||
#define PATTERN_LOOP_1_ADDR_REG (0x56 << MEM_MAP_SHIFT)
|
||||
|
||||
#define PATTERN_LOOP_1_ADDR_STRT_OFST (0)
|
||||
#define PATTERN_LOOP_1_ADDR_STRT_MSK \
|
||||
(0x00001FFF << PATTERN_LOOP_1_ADDR_STRT_OFST)
|
||||
#define PATTERN_LOOP_1_ADDR_STP_OFST (16)
|
||||
#define PATTERN_LOOP_1_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_1_ADDR_STP_OFST)
|
||||
|
||||
/* Pattern Loop 1 Iteration RW regiser */
|
||||
#define PATTERN_LOOP_1_ITERATION_REG (0x57 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Pattern Loop 2 Address RW regiser */
|
||||
#define PATTERN_LOOP_2_ADDR_REG (0x58 << MEM_MAP_SHIFT)
|
||||
|
||||
#define PATTERN_LOOP_2_ADDR_STRT_OFST (0)
|
||||
#define PATTERN_LOOP_2_ADDR_STRT_MSK \
|
||||
(0x00001FFF << PATTERN_LOOP_2_ADDR_STRT_OFST)
|
||||
#define PATTERN_LOOP_2_ADDR_STP_OFST (16)
|
||||
#define PATTERN_LOOP_2_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_2_ADDR_STP_OFST)
|
||||
|
||||
/* Pattern Loop 2 Iteration RW regiser */
|
||||
#define PATTERN_LOOP_2_ITERATION_REG (0x59 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Pattern Wait 0 RW regiser */
|
||||
#define PATTERN_WAIT_0_ADDR_REG (0x5A << MEM_MAP_SHIFT)
|
||||
|
||||
#define PATTERN_WAIT_0_ADDR_OFST (0)
|
||||
#define PATTERN_WAIT_0_ADDR_MSK (0x00001FFF << PATTERN_WAIT_0_ADDR_OFST)
|
||||
// FIXME: is mask 3FF
|
||||
|
||||
/* Pattern Wait 1 RW regiser */
|
||||
#define PATTERN_WAIT_1_ADDR_REG (0x5B << MEM_MAP_SHIFT)
|
||||
|
||||
#define PATTERN_WAIT_1_ADDR_OFST (0)
|
||||
#define PATTERN_WAIT_1_ADDR_MSK (0x00001FFF << PATTERN_WAIT_1_ADDR_OFST)
|
||||
|
||||
/* Pattern Wait 2 RW regiser */
|
||||
#define PATTERN_WAIT_2_ADDR_REG (0x5C << MEM_MAP_SHIFT)
|
||||
|
||||
#define PATTERN_WAIT_2_ADDR_OFST (0)
|
||||
#define PATTERN_WAIT_2_ADDR_MSK (0x00001FFF << PATTERN_WAIT_2_ADDR_OFST)
|
||||
|
||||
/* Samples RW register */
|
||||
#define SAMPLES_REG (0x32 << MEM_MAP_SHIFT)
|
||||
#define SAMPLES_REG (0x5D << MEM_MAP_SHIFT)
|
||||
|
||||
#define SAMPLES_DIGITAL_OFST (0)
|
||||
#define SAMPLES_DIGITAL_MSK (0x0000FFFF << SAMPLES_DIGITAL_OFST)
|
||||
@@ -434,7 +472,7 @@
|
||||
#define SAMPLES_ANALOG_MSK (0x0000FFFF << SAMPLES_ANALOG_OFST)
|
||||
|
||||
/** Power RW register */
|
||||
#define POWER_REG (0x33 << MEM_MAP_SHIFT)
|
||||
#define POWER_REG (0x5E << MEM_MAP_SHIFT)
|
||||
|
||||
#define POWER_ENBL_VLTG_RGLTR_OFST (16)
|
||||
#define POWER_ENBL_VLTG_RGLTR_MSK (0x0000001F << POWER_ENBL_VLTG_RGLTR_OFST)
|
||||
@@ -442,25 +480,25 @@
|
||||
#define POWER_HV_INTERNAL_SLCT_MSK (0x00000001 << POWER_HV_INTERNAL_SLCT_OFST)
|
||||
|
||||
/* Number of samples from transceiver RW register */
|
||||
#define SAMPLES_TRANSCEIVER_REG (0x34 << MEM_MAP_SHIFT)
|
||||
#define SAMPLES_TRANSCEIVER_REG (0x5F << MEM_MAP_SHIFT)
|
||||
#define SAMPLES_TRANSCEIVER_OFST (0)
|
||||
#define SAMPLES_TRANSCEIVER_MSK (0x0000FFFF << SAMPLES_TRANSCEIVER_OFST)
|
||||
|
||||
/* Delay 64 bit RW register. t = DLY x 50 ns. */
|
||||
#define DELAY_LSB_REG (0x8D << MEM_MAP_SHIFT)
|
||||
#define DELAY_MSB_REG (0x8E << MEM_MAP_SHIFT)
|
||||
#define DELAY_LSB_REG (0x60 << MEM_MAP_SHIFT)
|
||||
#define DELAY_MSB_REG (0x61 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Triggers 64 bit RW register */
|
||||
#define CYCLES_LSB_REG (0x8F << MEM_MAP_SHIFT)
|
||||
#define CYCLES_MSB_REG (0x90 << MEM_MAP_SHIFT)
|
||||
#define CYCLES_LSB_REG (0x62 << MEM_MAP_SHIFT)
|
||||
#define CYCLES_MSB_REG (0x63 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Frames 64 bit RW register */
|
||||
#define FRAMES_LSB_REG (0x91 << MEM_MAP_SHIFT)
|
||||
#define FRAMES_MSB_REG (0x92 << MEM_MAP_SHIFT)
|
||||
#define FRAMES_LSB_REG (0x64 << MEM_MAP_SHIFT)
|
||||
#define FRAMES_MSB_REG (0x65 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Period 64 bit RW register */
|
||||
#define PERIOD_LSB_REG (0x93 << MEM_MAP_SHIFT)
|
||||
#define PERIOD_MSB_REG (0x94 << MEM_MAP_SHIFT)
|
||||
#define PERIOD_LSB_REG (0x66 << MEM_MAP_SHIFT)
|
||||
#define PERIOD_MSB_REG (0x67 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Period 64 bit RW register */
|
||||
// #define EXPTIME_LSB_REG (0x68 << MEM_MAP_SHIFT) //
|
||||
@@ -475,15 +513,33 @@
|
||||
|
||||
/* Pattern IO Control 64 bit RW regiser
|
||||
* Each bit configured as output(1)/ input(0) */
|
||||
#define PATTERN_IO_CNTRL_LSB_REG (0x8A << MEM_MAP_SHIFT)
|
||||
#define PATTERN_IO_CNTRL_MSB_REG (0x8B << MEM_MAP_SHIFT)
|
||||
#define PATTERN_IO_CNTRL_LSB_REG (0x6C << MEM_MAP_SHIFT)
|
||||
#define PATTERN_IO_CNTRL_MSB_REG (0x6D << MEM_MAP_SHIFT)
|
||||
|
||||
/* Pattern IO Clock Control 64 bit RW regiser
|
||||
* When bit n enabled (1), clocked output for DIO[n] (T run clock)
|
||||
* When bit n disabled (0), Dio[n] driven by its pattern output */
|
||||
#define PATTERN_IO_CLK_CNTRL_LSB_REG (0x6E << MEM_MAP_SHIFT)
|
||||
#define PATTERN_IO_CLK_CNTRL_MSB_REG (0x6F << MEM_MAP_SHIFT)
|
||||
|
||||
/* Pattern In 64 bit RW register */
|
||||
#define PATTERN_IN_LSB_REG (0x82 << MEM_MAP_SHIFT)
|
||||
#define PATTERN_IN_MSB_REG (0x83 << MEM_MAP_SHIFT)
|
||||
#define PATTERN_IN_LSB_REG (0x70 << MEM_MAP_SHIFT)
|
||||
#define PATTERN_IN_MSB_REG (0x71 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Pattern Wait Timer 0 64 bit RW register. t = PWT1 x T run clock */
|
||||
#define PATTERN_WAIT_TIMER_0_LSB_REG (0x72 << MEM_MAP_SHIFT)
|
||||
#define PATTERN_WAIT_TIMER_0_MSB_REG (0x73 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Pattern Wait Timer 1 64 bit RW register. t = PWT2 x T run clock */
|
||||
#define PATTERN_WAIT_TIMER_1_LSB_REG (0x74 << MEM_MAP_SHIFT)
|
||||
#define PATTERN_WAIT_TIMER_1_MSB_REG (0x75 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Pattern Wait Timer 2 64 bit RW register. t = PWT3 x T run clock */
|
||||
#define PATTERN_WAIT_TIMER_2_LSB_REG (0x76 << MEM_MAP_SHIFT)
|
||||
#define PATTERN_WAIT_TIMER_2_MSB_REG (0x77 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Readout enable RW register */
|
||||
#define READOUT_10G_ENABLE_REG (0x3C << MEM_MAP_SHIFT)
|
||||
#define READOUT_10G_ENABLE_REG (0x79 << MEM_MAP_SHIFT)
|
||||
|
||||
#define READOUT_10G_ENABLE_ANLG_OFST (0)
|
||||
#define READOUT_10G_ENABLE_ANLG_MSK (0x000000FF << READOUT_10G_ENABLE_ANLG_OFST)
|
||||
@@ -494,7 +550,7 @@
|
||||
(0x0000000F << READOUT_10G_ENABLE_TRNSCVR_OFST)
|
||||
|
||||
/* Digital Bit External Trigger RW register */
|
||||
#define DBIT_EXT_TRG_REG (0x3E << MEM_MAP_SHIFT)
|
||||
#define DBIT_EXT_TRG_REG (0x7B << MEM_MAP_SHIFT)
|
||||
|
||||
#define DBIT_EXT_TRG_SRC_OFST (0)
|
||||
#define DBIT_EXT_TRG_SRC_MSK (0x0000003F << DBIT_EXT_TRG_SRC_OFST)
|
||||
@@ -502,7 +558,7 @@
|
||||
#define DBIT_EXT_TRG_OPRTN_MD_MSK (0x00000001 << DBIT_EXT_TRG_OPRTN_MD_OFST)
|
||||
|
||||
/* Pin Delay 0 RW register */
|
||||
#define OUTPUT_DELAY_0_REG (0x3F << MEM_MAP_SHIFT)
|
||||
#define OUTPUT_DELAY_0_REG (0x7C << MEM_MAP_SHIFT)
|
||||
#define OUTPUT_DELAY_0_OTPT_STTNG_STEPS (25)
|
||||
#define OUTPUT_DELAY_0_OTPT_STTNG_OFST \
|
||||
(0) // t = OTPT_STTNG * 25 ps, max for Cyclone V = 775 ps
|
||||
@@ -518,21 +574,87 @@
|
||||
|
||||
/* Pin Delay 1 RW register
|
||||
* Each bit configured as enable for dynamic output delay configuration */
|
||||
#define PIN_DELAY_1_REG (0x40 << MEM_MAP_SHIFT)
|
||||
#define PIN_DELAY_1_REG (0x7D << MEM_MAP_SHIFT)
|
||||
|
||||
/** Pattern Mask 64 bit RW regiser */
|
||||
#define PATTERN_MASK_LSB_REG (0x84 << MEM_MAP_SHIFT)
|
||||
#define PATTERN_MASK_MSB_REG (0x85 << MEM_MAP_SHIFT)
|
||||
#define PATTERN_MASK_LSB_REG (0x80 << MEM_MAP_SHIFT)
|
||||
#define PATTERN_MASK_MSB_REG (0x81 << MEM_MAP_SHIFT)
|
||||
|
||||
/** Pattern Set 64 bit RW regiser */
|
||||
#define PATTERN_SET_LSB_REG (0x86 << MEM_MAP_SHIFT)
|
||||
#define PATTERN_SET_MSB_REG (0x87 << MEM_MAP_SHIFT)
|
||||
#define PATTERN_SET_LSB_REG (0x82 << MEM_MAP_SHIFT)
|
||||
#define PATTERN_SET_MSB_REG (0x83 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Pattern Loop 3 Address RW regiser */
|
||||
#define PATTERN_LOOP_3_ADDR_REG (0x84 << MEM_MAP_SHIFT)
|
||||
|
||||
#define PATTERN_LOOP_3_ADDR_STRT_OFST (0)
|
||||
#define PATTERN_LOOP_3_ADDR_STRT_MSK \
|
||||
(0x00001FFF << PATTERN_LOOP_3_ADDR_STRT_OFST)
|
||||
#define PATTERN_LOOP_3_ADDR_STP_OFST (16)
|
||||
#define PATTERN_LOOP_3_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_3_ADDR_STP_OFST)
|
||||
|
||||
/* Pattern Loop 3 Iteration RW regiser */
|
||||
#define PATTERN_LOOP_3_ITERATION_REG (0x85 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Pattern Loop 4 Address RW regiser */
|
||||
#define PATTERN_LOOP_4_ADDR_REG (0x86 << MEM_MAP_SHIFT)
|
||||
|
||||
#define PATTERN_LOOP_4_ADDR_STRT_OFST (0)
|
||||
#define PATTERN_LOOP_4_ADDR_STRT_MSK \
|
||||
(0x00001FFF << PATTERN_LOOP_4_ADDR_STRT_OFST)
|
||||
#define PATTERN_LOOP_4_ADDR_STP_OFST (16)
|
||||
#define PATTERN_LOOP_4_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_4_ADDR_STP_OFST)
|
||||
|
||||
/* Pattern Loop 4 Iteration RW regiser */
|
||||
#define PATTERN_LOOP_4_ITERATION_REG (0x87 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Pattern Loop 5 Address RW regiser */
|
||||
#define PATTERN_LOOP_5_ADDR_REG (0x88 << MEM_MAP_SHIFT)
|
||||
|
||||
#define PATTERN_LOOP_5_ADDR_STRT_OFST (0)
|
||||
#define PATTERN_LOOP_5_ADDR_STRT_MSK \
|
||||
(0x00001FFF << PATTERN_LOOP_5_ADDR_STRT_OFST)
|
||||
#define PATTERN_LOOP_5_ADDR_STP_OFST (16)
|
||||
#define PATTERN_LOOP_5_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_5_ADDR_STP_OFST)
|
||||
|
||||
/* Pattern Loop 5 Iteration RW regiser */
|
||||
#define PATTERN_LOOP_5_ITERATION_REG (0x89 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Pattern Wait 3 RW regiser */
|
||||
#define PATTERN_WAIT_3_ADDR_REG (0x8A << MEM_MAP_SHIFT)
|
||||
|
||||
#define PATTERN_WAIT_3_ADDR_OFST (0)
|
||||
#define PATTERN_WAIT_3_ADDR_MSK (0x00001FFF << PATTERN_WAIT_3_ADDR_OFST)
|
||||
|
||||
/* Pattern Wait 4 RW regiser */
|
||||
#define PATTERN_WAIT_4_ADDR_REG (0x8B << MEM_MAP_SHIFT)
|
||||
|
||||
#define PATTERN_WAIT_4_ADDR_OFST (0)
|
||||
#define PATTERN_WAIT_4_ADDR_MSK (0x00001FFF << PATTERN_WAIT_4_ADDR_OFST)
|
||||
|
||||
/* Pattern Wait 5 RW regiser */
|
||||
#define PATTERN_WAIT_5_ADDR_REG (0x8C << MEM_MAP_SHIFT)
|
||||
|
||||
#define PATTERN_WAIT_5_ADDR_OFST (0)
|
||||
#define PATTERN_WAIT_5_ADDR_MSK (0x00001FFF << PATTERN_WAIT_5_ADDR_OFST)
|
||||
|
||||
/* Pattern Wait Timer 3 64 bit RW register. t = PWT1 x T run clock */
|
||||
#define PATTERN_WAIT_TIMER_3_LSB_REG (0x8D << MEM_MAP_SHIFT)
|
||||
#define PATTERN_WAIT_TIMER_3_MSB_REG (0x8E << MEM_MAP_SHIFT)
|
||||
|
||||
/* Pattern Wait Timer 4 64 bit RW register. t = PWT1 x T run clock */
|
||||
#define PATTERN_WAIT_TIMER_4_LSB_REG (0x8F << MEM_MAP_SHIFT)
|
||||
#define PATTERN_WAIT_TIMER_4_MSB_REG (0x90 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Pattern Wait Timer 5 64 bit RW register. t = PWT1 x T run clock */
|
||||
#define PATTERN_WAIT_TIMER_5_LSB_REG (0x91 << MEM_MAP_SHIFT)
|
||||
#define PATTERN_WAIT_TIMER_5_MSB_REG (0x92 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Slow ADC SPI Value RO register */
|
||||
#define ADC_SLOW_DATA_REG (0x41 << MEM_MAP_SHIFT)
|
||||
#define ADC_SLOW_DATA_REG (0x93 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Slow ADC SPI Value Config register */
|
||||
#define ADC_SLOW_CFG_REG (0x42 << MEM_MAP_SHIFT)
|
||||
#define ADC_SLOW_CFG_REG (0x94 << MEM_MAP_SHIFT)
|
||||
/** Read back CFG Register */
|
||||
#define ADC_SLOW_CFG_RB_OFST (2)
|
||||
#define ADC_SLOW_CFG_RB_MSK (0x00000001 << ADC_SLOW_CFG_RB_OFST)
|
||||
@@ -611,7 +733,7 @@
|
||||
((0x1 << ADC_SLOW_CFG_CFG_OFST) & ADC_SLOW_CFG_CFG_MSK)
|
||||
|
||||
/* Slow ADC SPI Value Control register */
|
||||
#define ADC_SLOW_CTRL_REG (0x43 << MEM_MAP_SHIFT)
|
||||
#define ADC_SLOW_CTRL_REG (0x95 << MEM_MAP_SHIFT)
|
||||
|
||||
#define ADC_SLOW_CTRL_STRT_OFST (0)
|
||||
#define ADC_SLOW_CTRL_STRT_MSK (0x00000001 << ADC_SLOW_CTRL_STRT_OFST)
|
||||
|
||||
Binary file not shown.
@@ -54,7 +54,6 @@
|
||||
#define DEFAULT_ADC_CLK (40) // 20
|
||||
#define DEFAULT_SYNC_CLK (40) // 20
|
||||
#define DEFAULT_DBIT_CLK (200)
|
||||
#define NS_TO_CLK_CYCLE (1E-3) // ns to MHz
|
||||
#define DEFAULT_TRANSCEIVER_MASK (0x3)
|
||||
|
||||
#define MAX_TRANSCEIVER_MASK (0xF)
|
||||
|
||||
@@ -30,8 +30,7 @@ target_compile_definitions(eigerDetectorServer_virtual
|
||||
)
|
||||
|
||||
target_link_libraries(eigerDetectorServer_virtual
|
||||
PUBLIC
|
||||
slsProjectCSettings
|
||||
PUBLIC pthread rt slsProjectCSettings
|
||||
)
|
||||
|
||||
set_target_properties(eigerDetectorServer_virtual PROPERTIES
|
||||
|
||||
BIN
slsDetectorServers/eigerDetectorServer/bin/eigerDetectorServerv10.0.0
Executable file
BIN
slsDetectorServers/eigerDetectorServer/bin/eigerDetectorServerv10.0.0
Executable file
Binary file not shown.
@@ -31,8 +31,7 @@ target_compile_definitions(gotthard2DetectorServer_virtual
|
||||
)
|
||||
|
||||
target_link_libraries(gotthard2DetectorServer_virtual
|
||||
PUBLIC
|
||||
slsProjectCSettings
|
||||
PUBLIC pthread rt slsProjectCSettings
|
||||
)
|
||||
|
||||
set_target_properties(gotthard2DetectorServer_virtual PROPERTIES
|
||||
|
||||
BIN
slsDetectorServers/gotthard2DetectorServer/bin/gotthard2DetectorServerv10.0.0
Executable file
BIN
slsDetectorServers/gotthard2DetectorServer/bin/gotthard2DetectorServerv10.0.0
Executable file
Binary file not shown.
@@ -29,8 +29,7 @@ target_compile_definitions(jungfrauDetectorServer_virtual
|
||||
)
|
||||
|
||||
target_link_libraries(jungfrauDetectorServer_virtual
|
||||
PUBLIC
|
||||
slsProjectCSettings
|
||||
PUBLIC pthread rt slsProjectCSettings
|
||||
)
|
||||
|
||||
set_target_properties(jungfrauDetectorServer_virtual PROPERTIES
|
||||
|
||||
BIN
slsDetectorServers/jungfrauDetectorServer/bin/jungfrauDetectorServerv10.0.0
Executable file
BIN
slsDetectorServers/jungfrauDetectorServer/bin/jungfrauDetectorServerv10.0.0
Executable file
Binary file not shown.
@@ -29,8 +29,7 @@ target_compile_definitions(moenchDetectorServer_virtual
|
||||
)
|
||||
|
||||
target_link_libraries(moenchDetectorServer_virtual
|
||||
PUBLIC
|
||||
slsProjectCSettings
|
||||
PUBLIC pthread rt slsProjectCSettings
|
||||
)
|
||||
|
||||
set_target_properties(moenchDetectorServer_virtual PROPERTIES
|
||||
|
||||
BIN
slsDetectorServers/moenchDetectorServer/bin/moenchDetectorServerv10.0.0
Executable file
BIN
slsDetectorServers/moenchDetectorServer/bin/moenchDetectorServerv10.0.0
Executable file
Binary file not shown.
@@ -33,8 +33,7 @@ target_compile_definitions(mythen3DetectorServer_virtual
|
||||
)
|
||||
|
||||
target_link_libraries(mythen3DetectorServer_virtual
|
||||
PUBLIC
|
||||
slsProjectCSettings
|
||||
PUBLIC pthread rt slsProjectCSettings
|
||||
)
|
||||
|
||||
set_target_properties(mythen3DetectorServer_virtual PROPERTIES
|
||||
|
||||
@@ -348,21 +348,68 @@
|
||||
#define PATTERN_SET_LSB_REG (0x44 * REG_OFFSET + BASE_PATTERN_CONTROL)
|
||||
#define PATTERN_SET_MSB_REG (0x45 * REG_OFFSET + BASE_PATTERN_CONTROL)
|
||||
|
||||
/** Pattern Loop and Wait Definitions, 5 regs each */
|
||||
#define PATTERN_LOOPDEF_BASE (0x60 * REG_OFFSET + BASE_PATTERN_CONTROL)
|
||||
#define PATTERN_LOOPDEF_NWORDS_OFST (5)
|
||||
#define PATTERN_WAIT_TIMER_LSB_WORD_OFST (0)
|
||||
#define PATTERN_WAIT_TIMER_MSB_WORD_OFST (1)
|
||||
#define PATTERN_WAIT_ADDR_WORD_OFST (2)
|
||||
#define PATTERN_LOOP_ITERATION_WORD_OFST (3)
|
||||
#define PATTERN_LOOP_ADDR_WORD_OFST (4)
|
||||
/* Pattern Wait Timer 0 64bit RW Register */
|
||||
#define PATTERN_WAIT_TIMER_0_LSB_REG (0x60 * REG_OFFSET + BASE_PATTERN_CONTROL)
|
||||
#define PATTERN_WAIT_TIMER_0_MSB_REG (0x61 * REG_OFFSET + BASE_PATTERN_CONTROL)
|
||||
|
||||
#define PATTERN_WAIT_ADDR_OFST (0)
|
||||
#define PATTERN_WAIT_ADDR_MSK (0x00001FFF << PATTERN_WAIT_ADDR_OFST)
|
||||
#define PATTERN_LOOP_ADDR_STRT_OFST (0)
|
||||
#define PATTERN_LOOP_ADDR_STRT_MSK (0x00001FFF << PATTERN_LOOP_ADDR_STRT_OFST)
|
||||
#define PATTERN_LOOP_ADDR_STP_OFST (16)
|
||||
#define PATTERN_LOOP_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_ADDR_STP_OFST)
|
||||
/* Pattern Wait 0 RW Register*/
|
||||
#define PATTERN_WAIT_0_ADDR_REG (0x62 * REG_OFFSET + BASE_PATTERN_CONTROL)
|
||||
|
||||
#define PATTERN_WAIT_0_ADDR_OFST (0)
|
||||
#define PATTERN_WAIT_0_ADDR_MSK (0x00001FFF << PATTERN_WAIT_0_ADDR_OFST)
|
||||
|
||||
/* Pattern Loop 0 Iteration RW Register */
|
||||
#define PATTERN_LOOP_0_ITERATION_REG (0x63 * REG_OFFSET + BASE_PATTERN_CONTROL)
|
||||
|
||||
/* Pattern Loop 0 Address RW Register */
|
||||
#define PATTERN_LOOP_0_ADDR_REG (0x64 * REG_OFFSET + BASE_PATTERN_CONTROL)
|
||||
|
||||
#define PATTERN_LOOP_0_ADDR_STRT_OFST (0)
|
||||
#define PATTERN_LOOP_0_ADDR_STRT_MSK (0x00001FFF << PATTERN_LOOP_0_ADDR_STRT_OFST)
|
||||
#define PATTERN_LOOP_0_ADDR_STP_OFST (16)
|
||||
#define PATTERN_LOOP_0_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_0_ADDR_STP_OFST)
|
||||
|
||||
/* Pattern Wait Timer 1 64bit RW Register */
|
||||
#define PATTERN_WAIT_TIMER_1_LSB_REG (0x65 * REG_OFFSET + BASE_PATTERN_CONTROL)
|
||||
#define PATTERN_WAIT_TIMER_1_MSB_REG (0x66 * REG_OFFSET + BASE_PATTERN_CONTROL)
|
||||
|
||||
/* Pattern Wait 1 RW Register*/
|
||||
#define PATTERN_WAIT_1_ADDR_REG (0x67 * REG_OFFSET + BASE_PATTERN_CONTROL)
|
||||
|
||||
#define PATTERN_WAIT_1_ADDR_OFST (0)
|
||||
#define PATTERN_WAIT_1_ADDR_MSK (0x00001FFF << PATTERN_WAIT_1_ADDR_OFST)
|
||||
|
||||
/* Pattern Loop 1 Iteration RW Register */
|
||||
#define PATTERN_LOOP_1_ITERATION_REG (0x68 * REG_OFFSET + BASE_PATTERN_CONTROL)
|
||||
|
||||
/* Pattern Loop 1 Address RW Register */
|
||||
#define PATTERN_LOOP_1_ADDR_REG (0x69 * REG_OFFSET + BASE_PATTERN_CONTROL)
|
||||
|
||||
#define PATTERN_LOOP_1_ADDR_STRT_OFST (0)
|
||||
#define PATTERN_LOOP_1_ADDR_STRT_MSK (0x00001FFF << PATTERN_LOOP_1_ADDR_STRT_OFST)
|
||||
#define PATTERN_LOOP_1_ADDR_STP_OFST (16)
|
||||
#define PATTERN_LOOP_1_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_1_ADDR_STP_OFST)
|
||||
|
||||
/* Pattern Wait Timer 2 64bit RW Register */
|
||||
#define PATTERN_WAIT_TIMER_2_LSB_REG (0x6A * REG_OFFSET + BASE_PATTERN_CONTROL)
|
||||
#define PATTERN_WAIT_TIMER_2_MSB_REG (0x6B * REG_OFFSET + BASE_PATTERN_CONTROL)
|
||||
|
||||
/* Pattern Wait 2 RW Register*/
|
||||
#define PATTERN_WAIT_2_ADDR_REG (0x6C * REG_OFFSET + BASE_PATTERN_CONTROL)
|
||||
|
||||
#define PATTERN_WAIT_2_ADDR_OFST (0)
|
||||
#define PATTERN_WAIT_2_ADDR_MSK (0x00001FFF << PATTERN_WAIT_2_ADDR_OFST)
|
||||
|
||||
/* Pattern Loop 2 Iteration RW Register */
|
||||
#define PATTERN_LOOP_2_ITERATION_REG (0x6D * REG_OFFSET + BASE_PATTERN_CONTROL)
|
||||
|
||||
/* Pattern Loop 0 Address RW Register */
|
||||
#define PATTERN_LOOP_2_ADDR_REG (0x6E * REG_OFFSET + BASE_PATTERN_CONTROL)
|
||||
|
||||
#define PATTERN_LOOP_2_ADDR_STRT_OFST (0)
|
||||
#define PATTERN_LOOP_2_ADDR_STRT_MSK (0x00001FFF << PATTERN_LOOP_2_ADDR_STRT_OFST)
|
||||
#define PATTERN_LOOP_2_ADDR_STP_OFST (16)
|
||||
#define PATTERN_LOOP_2_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_2_ADDR_STP_OFST)
|
||||
|
||||
/* Pattern RAM registers --------------------------------------------------*/
|
||||
|
||||
|
||||
BIN
slsDetectorServers/mythen3DetectorServer/bin/mythen3DetectorServerv10.0.0
Executable file
BIN
slsDetectorServers/mythen3DetectorServer/bin/mythen3DetectorServerv10.0.0
Executable file
Binary file not shown.
@@ -63,7 +63,6 @@
|
||||
#define DEFAULT_SYSTEM_C1 (6) //(166666666) // str_clk, 166 MHz const
|
||||
#define DEFAULT_SYSTEM_C2 (5) //(200000000) // smp_clk, 200 MHz const
|
||||
#define DEFAULT_TRIMMING_RUN_CLKDIV (40) // (25000000) // 25 MHz
|
||||
#define NS_TO_CLK_CYCLE (1E-3) // ns to MHz
|
||||
|
||||
#define FULL_SPEED_CLKDIV (10) //(100000000) 100 MHz
|
||||
#define HALF_SPEED_CLKDIV (20) //( 50000000) 50 MHz
|
||||
|
||||
@@ -1,12 +0,0 @@
|
||||
// SPDX-License-Identifier: LGPL-3.0-or-other
|
||||
// Copyright (C) 2021 Contributors to the SLS Detector Package
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
|
||||
int XILINX_PLL_setFrequency(uint32_t clk_index, uint32_t freq);
|
||||
uint32_t XILINX_PLL_getFrequency(uint32_t clkIDX);
|
||||
bool XILINX_PLL_isLocked();
|
||||
void XILINX_PLL_reset();
|
||||
void XILINX_PLL_waitForLock();
|
||||
void XILINX_PLL_load();
|
||||
@@ -6,9 +6,7 @@
|
||||
#include <sys/types.h>
|
||||
|
||||
void bus_w(u_int32_t offset, u_int32_t data);
|
||||
void bus_w_csp2(u_int32_t offset, u_int32_t data);
|
||||
u_int32_t bus_r(u_int32_t offset);
|
||||
u_int32_t bus_r_csp2(u_int32_t offset);
|
||||
uint64_t getU64BitReg(int aLSB, int aMSB);
|
||||
void setU64BitReg(uint64_t value, int aLSB, int aMSB);
|
||||
u_int32_t readRegister(u_int32_t offset);
|
||||
|
||||
@@ -58,8 +58,7 @@ uint64_t getPatternMask();
|
||||
void setPatternBitMask(uint64_t mask);
|
||||
uint64_t getPatternBitMask();
|
||||
|
||||
#if defined(MYTHEN3D) || defined(XILINX_CHIPTESTBOARDD) || \
|
||||
defined(CHIPTESTBOARDD)
|
||||
#ifdef MYTHEN3D
|
||||
void startPattern();
|
||||
#endif
|
||||
char *getPatternFileName();
|
||||
|
||||
@@ -398,8 +398,8 @@ int getPower();
|
||||
void setPower(enum DACINDEX ind, int val);
|
||||
void powerOff();
|
||||
#elif XILINX_CHIPTESTBOARDD
|
||||
int getBitOffsetFromDACIndex(enum DACINDEX ind);
|
||||
int isPowerValid(enum DACINDEX ind, int val);
|
||||
|
||||
int getPower();
|
||||
void setPower(enum DACINDEX ind, int val);
|
||||
#endif
|
||||
@@ -518,6 +518,8 @@ int setPhase(enum CLKINDEX ind, int val, int degrees);
|
||||
int getPhase(enum CLKINDEX ind, int degrees);
|
||||
int getMaxPhase(enum CLKINDEX ind);
|
||||
int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval);
|
||||
int setFrequency(enum CLKINDEX ind, int val);
|
||||
int getFrequency(enum CLKINDEX ind);
|
||||
void configureSyncFrequency(enum CLKINDEX ind);
|
||||
void setADCPipeline(int val);
|
||||
int getADCPipeline();
|
||||
@@ -527,11 +529,6 @@ int setLEDEnable(int enable);
|
||||
void setDigitalIODelay(uint64_t pinMask, int delay);
|
||||
#endif
|
||||
|
||||
#if defined(CHIPTESTBOARDD) || defined(XILINX_CHIPTESTBOARDD)
|
||||
int setFrequency(enum CLKINDEX ind, int val);
|
||||
int getFrequency(enum CLKINDEX ind);
|
||||
#endif
|
||||
|
||||
// jungfrau/moench specific - powerchip, autocompdisable, clockdiv, asictimer,
|
||||
// clock, pll, flashing firmware
|
||||
#if defined(MOENCHD)
|
||||
|
||||
@@ -1,201 +0,0 @@
|
||||
// SPDX-License-Identifier: LGPL-3.0-or-other
|
||||
// Copyright (C) 2021 Contributors to the SLS Detector Package
|
||||
#include "XILINX_PLL.h"
|
||||
#include "arm64.h"
|
||||
#include "clogger.h"
|
||||
#include <math.h>
|
||||
#include <stdbool.h>
|
||||
#include <unistd.h>
|
||||
|
||||
// https://docs.amd.com/r/en-US/pg065-clk-wiz/Register-Space (simplified, we
|
||||
// leave some things away)
|
||||
|
||||
// clang-format off
|
||||
#define XILINX_PLL_INPUT_FREQ (100000) // 100 MHz
|
||||
#define XILINX_PLL_MIN_FREQ (10000)
|
||||
#define XILINX_PLL_MAX_FREQ (250000)
|
||||
#define XILINX_PLL_MAX_CLK_DIV (256)
|
||||
#define XILINX_PLL_NUM_CLKS (7)
|
||||
#define XILINX_PLL_MAX_NUM_CLKS_FOR_GET (3)
|
||||
#define XILINX_PLL_STEP_SIZE (125)
|
||||
#define XILINX_PLL_HALF_STEP_SIZE (62)
|
||||
|
||||
#define XILINX_PLL_BASE_ADDR (0x0)
|
||||
#define XILINX_PLL_MEASURE_BASE_ADDR0 (0x1000) // added externally, not part of CLKWIZ core for clks 0 and 1
|
||||
#define XILINX_PLL_MEASURE_BASE_ADDR0_MAX_CLKS (2)
|
||||
#define XILINX_PLL_MEASURE_BASE_ADDR1 (0x2000) // for clks 2 to 6
|
||||
#define XILINX_PLL_MEASURE_WIDTH (8) // per clock
|
||||
|
||||
#define XILINX_PLL_RESET_REG (0x000)
|
||||
#define XILINX_PLL_RESET_VAL (0xA)
|
||||
|
||||
#define XILINX_PLL_STATUS_REG (0x004)
|
||||
#define XILINX_PLL_STATUS_LOCKED_OFST (0)
|
||||
#define XILINX_PLL_STATUS_LOCKED_MSK (0x00000001 << XILINX_PLL_STATUS_LOCKED_OFST)
|
||||
|
||||
#define XILINX_PLL_CLKCONFIG_REG (XILINX_PLL_BASE_ADDR + 0x200)
|
||||
#define XILINX_PLL_DIVCLK_DIVIDE_OFST (0)
|
||||
#define XILINX_PLL_DIVCLK_DIVIDE_MSK (0x000000FF << XILINX_PLL_DIVCLK_DIVIDE_OFST)
|
||||
#define XILINX_PLL_CLKFBOUT_MULT_OFST (8)
|
||||
#define XILINX_PLL_CLKFBOUT_MULT_MSK (0x000000FF << XILINX_PLL_CLKFBOUT_MULT_OFST)
|
||||
#define XILINX_PLL_CLKFBOUT_FRAC_OFST (16)
|
||||
#define XILINX_PLL_CLKFBOUT_FRAC_MSK (0x000003FF << XILINX_PLL_CLKFBOUT_FRAC_OFST)
|
||||
// The value from 0 to 875 representing the fractional multiplied by 1000
|
||||
#define XILINX_PLL_CLKFBOUT_FRAC_MAX_VAL (875)
|
||||
|
||||
|
||||
#define XILINX_PLL_CLKCONFIG_BASE_ADDR (XILINX_PLL_BASE_ADDR + 0x208)
|
||||
#define XILINX_PLL_CLKCONFIG_WIDTH (3 * 4) // per clock (7 clocks)
|
||||
|
||||
#define XILINX_PLL_CLK_DIV_REG_OFST (0)
|
||||
#define XILINX_PLL_CLK_DIV_DIVIDE_OFST (0)
|
||||
#define XILINX_PLL_CLK_DIV_DIVIDE_MSK (0x000000FF << XILINX_PLL_CLK_DIV_DIVIDE_OFST)
|
||||
#define XILINX_PLL_CLK_DIV_FRAC_OFST (8) // works on IDX 0 only
|
||||
#define XILINX_PLL_CLK_DIV_FRAC_MSK (0x000003FF << XILINX_PLL_CLK_DIV_FRAC_OFST)
|
||||
|
||||
#define XILINX_PLL_CLK_PHASE_REG_OFST (4) // signed num for +/- phase
|
||||
#define XILINX_PLL_CLK_PHASE_OFST (0)
|
||||
#define XILINX_PLL_CLK_PHASE_MSK (0x0000FFFF << XILINX_PLL_CLK_PHASE_OFST)
|
||||
|
||||
#define XILINX_PLL_CLK_DUTY_REG_OFST (8) // (in %) * 1000
|
||||
#define XILINX_PLL_CLK_DUTY_OFST (0)
|
||||
#define XILINX_PLL_CLK_DUTY_MSK (0x0000FFFF << XILINX_PLL_CLK_DUTY_OFST)
|
||||
|
||||
|
||||
|
||||
#define XILINX_PLL_LOAD_REG (0x25C)
|
||||
#define XILINX_PLL_LOAD_RECONFIGURE_OFST (0) // load and reconfigure state machine
|
||||
#define XILINX_PLL_LOAD_RECONFIGURE_MSK (0x00000001 << XILINX_PLL_LOAD_RECONFIGURE_OFST)
|
||||
#define XILINX_PLL_LOAD_FROM_REGS_OFST (1) // 0 for default values as compiled into firmware
|
||||
#define XILINX_PLL_LOAD_FROM_REGS_MSK (0x00000001 << XILINX_PLL_LOAD_FROM_REGS_OFST)
|
||||
|
||||
// clang-format on
|
||||
|
||||
// freq in kHz !!
|
||||
int XILINX_PLL_setFrequency(uint32_t clk_index, uint32_t freq) {
|
||||
if (clk_index >= XILINX_PLL_NUM_CLKS) {
|
||||
LOG(logERROR, ("XILINX_PLL: Invalid clock index %d\n", clk_index));
|
||||
return 1;
|
||||
}
|
||||
if (freq < XILINX_PLL_MIN_FREQ || freq > XILINX_PLL_MAX_FREQ) {
|
||||
LOG(logERROR, ("XILINX_PLL: Frequency %d kHz is out of range\n", freq));
|
||||
return 1;
|
||||
}
|
||||
|
||||
// calculate base clock frequency
|
||||
uint32_t global_reg = bus_r_csp2(XILINX_PLL_CLKCONFIG_REG);
|
||||
#ifdef VIRTUAL
|
||||
global_reg = 3073;
|
||||
#endif
|
||||
uint32_t clkfbout_mult = ((global_reg & XILINX_PLL_CLKFBOUT_MULT_MSK) >>
|
||||
XILINX_PLL_CLKFBOUT_MULT_OFST);
|
||||
uint32_t clkfbout_frac = ((global_reg & XILINX_PLL_CLKFBOUT_FRAC_MSK) >>
|
||||
XILINX_PLL_CLKFBOUT_FRAC_OFST);
|
||||
uint32_t divclk_divide = ((global_reg & XILINX_PLL_DIVCLK_DIVIDE_MSK) >>
|
||||
XILINX_PLL_DIVCLK_DIVIDE_OFST);
|
||||
uint32_t base_clk_freq = clkfbout_mult * XILINX_PLL_INPUT_FREQ;
|
||||
base_clk_freq += (clkfbout_frac * XILINX_PLL_INPUT_FREQ /
|
||||
XILINX_PLL_CLKFBOUT_FRAC_MAX_VAL);
|
||||
base_clk_freq /= divclk_divide;
|
||||
|
||||
// calcualte clock divider
|
||||
uint32_t clk_div = base_clk_freq / freq;
|
||||
if (clk_div < 1 || clk_div > XILINX_PLL_MAX_CLK_DIV) {
|
||||
LOG(logERROR,
|
||||
("XILINX_PLL: Invalid clock divider, need to change base clock\n"));
|
||||
return 1;
|
||||
}
|
||||
|
||||
uint32_t clk_div_frac = 0;
|
||||
// the first clock supports fractional division, increase the precision for
|
||||
// that one fractional divide is not allowed in fixed or dynamic phase shift
|
||||
// mode !!!!
|
||||
if (clk_index == 0) {
|
||||
float clk_div_frac_f =
|
||||
(float)base_clk_freq / freq - clk_div; // eg. 2.333 => 0.333
|
||||
clk_div_frac = (uint32_t)round(clk_div_frac_f * 1000); // 0.333 => 333
|
||||
clk_div_frac = ((clk_div_frac + XILINX_PLL_HALF_STEP_SIZE) /
|
||||
XILINX_PLL_STEP_SIZE) *
|
||||
XILINX_PLL_STEP_SIZE; // round to multiples of step size,
|
||||
// 333 = > 375
|
||||
if (clk_div_frac == 1000) {
|
||||
clk_div_frac = 0;
|
||||
clk_div++;
|
||||
}
|
||||
}
|
||||
|
||||
LOG(logINFOBLUE, ("XILINX_PLL: Setting clock divider to %u.%u\n", clk_div,
|
||||
clk_div_frac));
|
||||
uint32_t clk_addr = XILINX_PLL_CLKCONFIG_BASE_ADDR +
|
||||
clk_index * XILINX_PLL_CLKCONFIG_WIDTH +
|
||||
XILINX_PLL_CLK_DIV_REG_OFST;
|
||||
uint32_t clk_config_val = ((clk_div << XILINX_PLL_CLK_DIV_DIVIDE_OFST) &
|
||||
XILINX_PLL_CLK_DIV_DIVIDE_MSK) |
|
||||
((clk_div_frac << XILINX_PLL_CLK_DIV_FRAC_OFST) &
|
||||
XILINX_PLL_CLK_DIV_FRAC_MSK);
|
||||
|
||||
bus_w_csp2(clk_addr, clk_config_val);
|
||||
XILINX_PLL_load();
|
||||
XILINX_PLL_waitForLock();
|
||||
|
||||
// wait for firmware to measure the actual frequency
|
||||
usleep(2 * 1000 * 1000);
|
||||
return 0;
|
||||
}
|
||||
|
||||
uint32_t XILINX_PLL_getFrequency(uint32_t clk_index) {
|
||||
if (clk_index >= XILINX_PLL_NUM_CLKS) {
|
||||
LOG(logERROR, ("XILINX_PLL: Invalid clock index %d\n", clk_index));
|
||||
return -1;
|
||||
}
|
||||
if (clk_index > XILINX_PLL_MAX_NUM_CLKS_FOR_GET) {
|
||||
LOG(logERROR,
|
||||
("XILINX_PLL: get frequency not implemented for this clock %d\n",
|
||||
clk_index));
|
||||
return -1;
|
||||
}
|
||||
|
||||
uint32_t base_addr = XILINX_PLL_MEASURE_BASE_ADDR0;
|
||||
if (clk_index >= XILINX_PLL_MEASURE_BASE_ADDR0_MAX_CLKS) {
|
||||
clk_index -= XILINX_PLL_MEASURE_BASE_ADDR0_MAX_CLKS;
|
||||
base_addr = XILINX_PLL_MEASURE_BASE_ADDR1;
|
||||
}
|
||||
uint32_t addr = base_addr + clk_index * XILINX_PLL_MEASURE_WIDTH;
|
||||
uint32_t counter_val = bus_r_csp2(addr);
|
||||
// Hz => round to nearest kHz
|
||||
uint32_t freq_kHz = (counter_val + 500) / 1000; // round to nearest kHz
|
||||
return freq_kHz;
|
||||
}
|
||||
|
||||
bool XILINX_PLL_isLocked() {
|
||||
uint32_t status = bus_r_csp2(XILINX_PLL_BASE_ADDR + XILINX_PLL_STATUS_REG);
|
||||
return ((status & XILINX_PLL_STATUS_LOCKED_MSK) >>
|
||||
XILINX_PLL_STATUS_LOCKED_OFST);
|
||||
}
|
||||
|
||||
void XILINX_PLL_reset() {
|
||||
bus_w_csp2(XILINX_PLL_BASE_ADDR + XILINX_PLL_RESET_REG,
|
||||
XILINX_PLL_RESET_VAL);
|
||||
}
|
||||
|
||||
void XILINX_PLL_load() {
|
||||
bus_w_csp2(
|
||||
XILINX_PLL_BASE_ADDR + XILINX_PLL_LOAD_REG,
|
||||
(XILINX_PLL_LOAD_RECONFIGURE_MSK | XILINX_PLL_LOAD_FROM_REGS_MSK));
|
||||
}
|
||||
|
||||
void XILINX_PLL_waitForLock() {
|
||||
#ifdef VIRTUAL
|
||||
return;
|
||||
#endif
|
||||
int timeout_us = 10 * 1000;
|
||||
int count = 500;
|
||||
while (count > 0) {
|
||||
usleep(timeout_us);
|
||||
if (XILINX_PLL_isLocked())
|
||||
return;
|
||||
count--;
|
||||
}
|
||||
LOG(logERROR, ("XILINX_PLL: Timeout waiting for PLL to lock (%d ms)\n",
|
||||
(count * timeout_us) / 1000));
|
||||
}
|
||||
@@ -13,14 +13,11 @@
|
||||
/* global variables */
|
||||
#define CSP0 (0xB0080000)
|
||||
#define CSP1 (0xB0050000) // udp
|
||||
#define CSP2 (0xA0000000)
|
||||
#define MEM_SIZE_CSP0 (0x20000)
|
||||
#define MEM_SIZE_CSP0 (0x10000)
|
||||
#define MEM_SIZE_CSP1 (0x2000) // smaller size for udp
|
||||
#define MEM_SIZE_CSP2 (0x4000)
|
||||
|
||||
u_int32_t *csp0base = 0;
|
||||
u_int32_t *csp1base = 0;
|
||||
u_int32_t *csp2base = 0;
|
||||
|
||||
void bus_w(u_int32_t offset, u_int32_t data) {
|
||||
volatile u_int32_t *ptr1;
|
||||
@@ -34,18 +31,6 @@ u_int32_t bus_r(u_int32_t offset) {
|
||||
return *ptr1;
|
||||
}
|
||||
|
||||
void bus_w_csp2(u_int32_t offset, u_int32_t data) {
|
||||
volatile u_int32_t *ptr1;
|
||||
ptr1 = (u_int32_t *)(csp2base + offset / (sizeof(u_int32_t)));
|
||||
*ptr1 = data;
|
||||
}
|
||||
|
||||
u_int32_t bus_r_csp2(u_int32_t offset) {
|
||||
volatile u_int32_t *ptr1;
|
||||
ptr1 = (u_int32_t *)(csp2base + offset / (sizeof(u_int32_t)));
|
||||
return *ptr1;
|
||||
}
|
||||
|
||||
uint64_t getU64BitReg(int aLSB, int aMSB) {
|
||||
uint64_t retval = bus_r(aMSB);
|
||||
retval = (retval << 32) | bus_r(aLSB);
|
||||
@@ -66,12 +51,12 @@ u_int32_t writeRegister(u_int32_t offset, u_int32_t data) {
|
||||
|
||||
int mapCSP0(void) {
|
||||
LOG(logINFO, ("Mapping memory\n"));
|
||||
u_int32_t csps[3] = {CSP0, CSP1, CSP2};
|
||||
u_int32_t **cspbases[3] = {&csp0base, &csp1base, &csp2base};
|
||||
u_int32_t memsize[3] = {MEM_SIZE_CSP0, MEM_SIZE_CSP1, MEM_SIZE_CSP2};
|
||||
char names[3][10] = {"csp0base", "csp1base", "csp2base"};
|
||||
u_int32_t csps[2] = {CSP0, CSP1};
|
||||
u_int32_t **cspbases[2] = {&csp0base, &csp1base};
|
||||
u_int32_t memsize[2] = {MEM_SIZE_CSP0, MEM_SIZE_CSP1};
|
||||
char names[2][10] = {"csp0base", "csp1base"};
|
||||
|
||||
for (int i = 0; i < 3; ++i) {
|
||||
for (int i = 0; i < 2; ++i) {
|
||||
// if not mapped
|
||||
if (*cspbases[i] == 0) {
|
||||
LOG(logINFO, ("\tMapping memory for %s\n", names[i]));
|
||||
|
||||
@@ -13,7 +13,7 @@
|
||||
extern enum TLogLevel trimmingPrint;
|
||||
extern uint32_t clkDivider[];
|
||||
#endif
|
||||
#if defined(CHIPTESTBOARDD) || defined(XILINX_CHIPTESTBOARDD)
|
||||
#ifdef CHIPTESTBOARDD
|
||||
extern uint32_t clkFrequency[];
|
||||
#endif
|
||||
|
||||
@@ -54,12 +54,27 @@ void initializePatternWord() {
|
||||
memset(virtual_pattern, 0, sizeof(virtual_pattern));
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(CHIPTESTBOARDD) || defined(XILINX_CHIPTESTBOARDD)
|
||||
uint64_t validate_readPatternIOControl() {
|
||||
#if defined(CHIPTESTBOARDD)
|
||||
return getU64BitReg(PATTERN_IO_CNTRL_LSB_REG, PATTERN_IO_CNTRL_MSB_REG);
|
||||
#elif defined(XILINX_CHIPTESTBOARDD)
|
||||
return (uint64_t)(bus_r(PINIOCTRLREG));
|
||||
#endif
|
||||
}
|
||||
|
||||
int validate_writePatternIOControl(char *message, uint64_t arg) {
|
||||
// validate input
|
||||
#ifdef XILINX_CHIPTESTBOARDD
|
||||
if (arg > BIT32_MSK) {
|
||||
strcpy(message, "Could not set pattern IO Control. Must be 32 bit for "
|
||||
"this detector\n");
|
||||
LOG(logERROR, (message));
|
||||
return FAIL;
|
||||
}
|
||||
#endif
|
||||
|
||||
writePatternIOControl(arg);
|
||||
|
||||
@@ -80,9 +95,15 @@ int validate_writePatternIOControl(char *message, uint64_t arg) {
|
||||
}
|
||||
|
||||
void writePatternIOControl(uint64_t word) {
|
||||
#ifdef CHIPTESTBOARDD
|
||||
LOG(logINFO,
|
||||
("Setting Pattern I/O Control: 0x%llx\n", (long long int)word));
|
||||
setU64BitReg(word, PATTERN_IO_CNTRL_LSB_REG, PATTERN_IO_CNTRL_MSB_REG);
|
||||
#elif defined(XILINX_CHIPTESTBOARDD)
|
||||
uint32_t val = (uint32_t)word;
|
||||
LOG(logINFO, ("Setting Pattern I/O Control: 0x%x\n", val));
|
||||
bus_w(PINIOCTRLREG, val);
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -101,7 +122,7 @@ int validate_readPatternWord(char *message, int addr, uint64_t *word) {
|
||||
}
|
||||
|
||||
uint64_t readPatternWord(int addr) {
|
||||
#if defined(MYTHEN3D) || defined(XILINX_CHIPTESTBOARDD)
|
||||
#ifdef MYTHEN3D
|
||||
LOG(logDEBUG1, (" Reading Pattern Word (addr:0x%x)\n", addr));
|
||||
// the first word in RAM as base plus the offset of the word to write (addr)
|
||||
uint32_t reg_lsb = PATTERN_STEP0_LSB_REG + addr * REG_OFFSET * 2;
|
||||
@@ -161,7 +182,7 @@ void writePatternWord(int addr, uint64_t word) {
|
||||
LOG(logDEBUG1, ("Setting Pattern Word (addr:0x%x, word:0x%llx)\n", addr,
|
||||
(long long int)word));
|
||||
|
||||
#ifdef CHIPTESTBOARDD
|
||||
#ifndef MYTHEN3D
|
||||
uint32_t reg = PATTERN_CNTRL_REG;
|
||||
|
||||
// write word
|
||||
@@ -178,6 +199,7 @@ void writePatternWord(int addr, uint64_t word) {
|
||||
#ifdef VIRTUAL
|
||||
virtual_pattern[addr] = word;
|
||||
#endif
|
||||
// mythen
|
||||
#else
|
||||
// the first word in RAM as base plus the offset of the word to write (addr)
|
||||
uint32_t reg_lsb = PATTERN_STEP0_LSB_REG + addr * REG_OFFSET * 2;
|
||||
@@ -201,15 +223,29 @@ int validate_getPatternWaitAddresses(char *message, int level, int *addr) {
|
||||
}
|
||||
|
||||
int getPatternWaitAddress(int level) {
|
||||
if (level < 0 || level >= MAX_LEVELS) {
|
||||
switch (level) {
|
||||
case 0:
|
||||
return ((bus_r(PATTERN_WAIT_0_ADDR_REG) & PATTERN_WAIT_0_ADDR_MSK) >>
|
||||
PATTERN_WAIT_0_ADDR_OFST);
|
||||
case 1:
|
||||
return ((bus_r(PATTERN_WAIT_1_ADDR_REG) & PATTERN_WAIT_1_ADDR_MSK) >>
|
||||
PATTERN_WAIT_1_ADDR_OFST);
|
||||
case 2:
|
||||
return ((bus_r(PATTERN_WAIT_2_ADDR_REG) & PATTERN_WAIT_2_ADDR_MSK) >>
|
||||
PATTERN_WAIT_2_ADDR_OFST);
|
||||
#ifndef MYTHEN3D
|
||||
case 3:
|
||||
return ((bus_r(PATTERN_WAIT_3_ADDR_REG) & PATTERN_WAIT_3_ADDR_MSK) >>
|
||||
PATTERN_WAIT_3_ADDR_OFST);
|
||||
case 4:
|
||||
return ((bus_r(PATTERN_WAIT_4_ADDR_REG) & PATTERN_WAIT_4_ADDR_MSK) >>
|
||||
PATTERN_WAIT_4_ADDR_OFST);
|
||||
case 5:
|
||||
return ((bus_r(PATTERN_WAIT_5_ADDR_REG) & PATTERN_WAIT_5_ADDR_MSK) >>
|
||||
PATTERN_WAIT_5_ADDR_OFST);
|
||||
#endif
|
||||
default:
|
||||
return -1;
|
||||
} else {
|
||||
return ((bus_r(PATTERN_LOOPDEF_BASE +
|
||||
(PATTERN_WAIT_ADDR_WORD_OFST +
|
||||
level * PATTERN_LOOPDEF_NWORDS_OFST) *
|
||||
REG_OFFSET) &
|
||||
PATTERN_WAIT_ADDR_MSK) >>
|
||||
PATTERN_WAIT_ADDR_OFST);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -253,13 +289,35 @@ void setPatternWaitAddress(int level, int addr) {
|
||||
LOG(logINFO,
|
||||
#endif
|
||||
("Setting Pattern Wait Address (level:%d, addr:0x%x)\n", level, addr));
|
||||
if (level < 0 || level >= MAX_LEVELS) {
|
||||
switch (level) {
|
||||
case 0:
|
||||
bus_w(PATTERN_WAIT_0_ADDR_REG,
|
||||
((addr << PATTERN_WAIT_0_ADDR_OFST) & PATTERN_WAIT_0_ADDR_MSK));
|
||||
break;
|
||||
case 1:
|
||||
bus_w(PATTERN_WAIT_1_ADDR_REG,
|
||||
((addr << PATTERN_WAIT_1_ADDR_OFST) & PATTERN_WAIT_1_ADDR_MSK));
|
||||
break;
|
||||
case 2:
|
||||
bus_w(PATTERN_WAIT_2_ADDR_REG,
|
||||
((addr << PATTERN_WAIT_2_ADDR_OFST) & PATTERN_WAIT_2_ADDR_MSK));
|
||||
break;
|
||||
#ifndef MYTHEN3D
|
||||
case 3:
|
||||
bus_w(PATTERN_WAIT_3_ADDR_REG,
|
||||
((addr << PATTERN_WAIT_3_ADDR_OFST) & PATTERN_WAIT_3_ADDR_MSK));
|
||||
break;
|
||||
case 4:
|
||||
bus_w(PATTERN_WAIT_4_ADDR_REG,
|
||||
((addr << PATTERN_WAIT_4_ADDR_OFST) & PATTERN_WAIT_4_ADDR_MSK));
|
||||
break;
|
||||
case 5:
|
||||
bus_w(PATTERN_WAIT_5_ADDR_REG,
|
||||
((addr << PATTERN_WAIT_5_ADDR_OFST) & PATTERN_WAIT_5_ADDR_MSK));
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
return;
|
||||
} else {
|
||||
bus_w(PATTERN_LOOPDEF_BASE + (PATTERN_WAIT_ADDR_WORD_OFST +
|
||||
level * PATTERN_LOOPDEF_NWORDS_OFST) *
|
||||
REG_OFFSET,
|
||||
((addr << PATTERN_WAIT_ADDR_OFST) & PATTERN_WAIT_ADDR_MSK));
|
||||
}
|
||||
}
|
||||
|
||||
@@ -282,24 +340,39 @@ int validate_getPatternWaitClocksAndInterval(char *message, int level,
|
||||
}
|
||||
|
||||
uint64_t getPatternWaitClocks(int level) {
|
||||
if (level < 0 || level >= MAX_LEVELS) {
|
||||
switch (level) {
|
||||
case 0:
|
||||
return getU64BitReg(PATTERN_WAIT_TIMER_0_LSB_REG,
|
||||
PATTERN_WAIT_TIMER_0_MSB_REG);
|
||||
case 1:
|
||||
return getU64BitReg(PATTERN_WAIT_TIMER_1_LSB_REG,
|
||||
PATTERN_WAIT_TIMER_1_MSB_REG);
|
||||
case 2:
|
||||
return getU64BitReg(PATTERN_WAIT_TIMER_2_LSB_REG,
|
||||
PATTERN_WAIT_TIMER_2_MSB_REG);
|
||||
#ifndef MYTHEN3D
|
||||
case 3:
|
||||
return getU64BitReg(PATTERN_WAIT_TIMER_3_LSB_REG,
|
||||
PATTERN_WAIT_TIMER_3_MSB_REG);
|
||||
case 4:
|
||||
return getU64BitReg(PATTERN_WAIT_TIMER_4_LSB_REG,
|
||||
PATTERN_WAIT_TIMER_4_MSB_REG);
|
||||
case 5:
|
||||
return getU64BitReg(PATTERN_WAIT_TIMER_5_LSB_REG,
|
||||
PATTERN_WAIT_TIMER_5_MSB_REG);
|
||||
#endif
|
||||
default:
|
||||
return -1;
|
||||
} else {
|
||||
return getU64BitReg(
|
||||
PATTERN_LOOPDEF_BASE + (PATTERN_WAIT_TIMER_LSB_WORD_OFST +
|
||||
level * PATTERN_LOOPDEF_NWORDS_OFST) *
|
||||
REG_OFFSET,
|
||||
PATTERN_LOOPDEF_BASE + (PATTERN_WAIT_TIMER_MSB_WORD_OFST +
|
||||
level * PATTERN_LOOPDEF_NWORDS_OFST) *
|
||||
REG_OFFSET);
|
||||
}
|
||||
}
|
||||
|
||||
uint64_t getPatternWaitInterval(int level) {
|
||||
uint64_t numClocks = getPatternWaitClocks(level);
|
||||
int runclk = 0;
|
||||
#if defined(CHIPTESTBOARDD) || defined(XILINX_CHIPTESTBOARDD)
|
||||
#ifdef CHIPTESTBOARDD
|
||||
runclk = clkFrequency[RUN_CLK];
|
||||
#elif XILINX_CHIPTESTBOARDD
|
||||
runclk = RUN_CLK;
|
||||
#elif MYTHEN3D
|
||||
runclk = clkDivider[SYSTEM_C0];
|
||||
#endif
|
||||
@@ -307,7 +380,7 @@ uint64_t getPatternWaitInterval(int level) {
|
||||
LOG(logERROR, ("runclk is 0. Cannot divide by 0. Returning -1.\n"));
|
||||
return -1;
|
||||
}
|
||||
return numClocks / (NS_TO_CLK_CYCLE * runclk);
|
||||
return numClocks / (1E-3 * runclk);
|
||||
}
|
||||
|
||||
int validate_setPatternWaitClocksAndInterval(char *message, int level,
|
||||
@@ -352,18 +425,35 @@ void setPatternWaitClocks(int level, uint64_t t) {
|
||||
#endif
|
||||
("Setting Pattern Wait Time in clocks (level:%d) :%lld\n", level,
|
||||
(long long int)t));
|
||||
|
||||
if (level < 0 || level >= MAX_LEVELS) {
|
||||
switch (level) {
|
||||
case 0:
|
||||
setU64BitReg(t, PATTERN_WAIT_TIMER_0_LSB_REG,
|
||||
PATTERN_WAIT_TIMER_0_MSB_REG);
|
||||
break;
|
||||
case 1:
|
||||
setU64BitReg(t, PATTERN_WAIT_TIMER_1_LSB_REG,
|
||||
PATTERN_WAIT_TIMER_1_MSB_REG);
|
||||
break;
|
||||
case 2:
|
||||
setU64BitReg(t, PATTERN_WAIT_TIMER_2_LSB_REG,
|
||||
PATTERN_WAIT_TIMER_2_MSB_REG);
|
||||
break;
|
||||
#ifndef MYTHEN3D
|
||||
case 3:
|
||||
setU64BitReg(t, PATTERN_WAIT_TIMER_3_LSB_REG,
|
||||
PATTERN_WAIT_TIMER_3_MSB_REG);
|
||||
break;
|
||||
case 4:
|
||||
setU64BitReg(t, PATTERN_WAIT_TIMER_4_LSB_REG,
|
||||
PATTERN_WAIT_TIMER_4_MSB_REG);
|
||||
break;
|
||||
case 5:
|
||||
setU64BitReg(t, PATTERN_WAIT_TIMER_5_LSB_REG,
|
||||
PATTERN_WAIT_TIMER_5_MSB_REG);
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
return;
|
||||
} else {
|
||||
return setU64BitReg(
|
||||
t,
|
||||
PATTERN_LOOPDEF_BASE + (PATTERN_WAIT_TIMER_LSB_WORD_OFST +
|
||||
level * PATTERN_LOOPDEF_NWORDS_OFST) *
|
||||
REG_OFFSET,
|
||||
PATTERN_LOOPDEF_BASE + (PATTERN_WAIT_TIMER_MSB_WORD_OFST +
|
||||
level * PATTERN_LOOPDEF_NWORDS_OFST) *
|
||||
REG_OFFSET);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -376,12 +466,14 @@ void setPatternWaitInterval(int level, uint64_t t) {
|
||||
("Setting Pattern Wait Time (level:%d) :%lld ns\n", level,
|
||||
(long long int)t));
|
||||
int runclk = 0;
|
||||
#if defined(CHIPTESTBOARDD) || defined(XILINX_CHIPTESTBOARDD)
|
||||
#ifdef CHIPTESTBOARDD
|
||||
runclk = clkFrequency[RUN_CLK];
|
||||
#elif XILINX_CHIPTESTBOARDD
|
||||
runclk = RUN_CLK;
|
||||
#elif MYTHEN3D
|
||||
runclk = clkDivider[SYSTEM_C0];
|
||||
runclk = clkDivider[SYSTEM_C0];
|
||||
#endif
|
||||
uint64_t numClocks = t * (NS_TO_CLK_CYCLE * runclk);
|
||||
uint64_t numClocks = t * (1E-3 * runclk);
|
||||
setPatternWaitClocks(level, numClocks);
|
||||
}
|
||||
|
||||
@@ -399,13 +491,23 @@ int validate_getPatternLoopCycles(char *message, int level, int *numLoops) {
|
||||
}
|
||||
|
||||
int getPatternLoopCycles(int level) {
|
||||
if (level < 0 || level >= MAX_LEVELS) {
|
||||
switch (level) {
|
||||
case 0:
|
||||
return bus_r(PATTERN_LOOP_0_ITERATION_REG);
|
||||
case 1:
|
||||
return bus_r(PATTERN_LOOP_1_ITERATION_REG);
|
||||
case 2:
|
||||
return bus_r(PATTERN_LOOP_2_ITERATION_REG);
|
||||
#ifndef MYTHEN3D
|
||||
case 3:
|
||||
return bus_r(PATTERN_LOOP_3_ITERATION_REG);
|
||||
case 4:
|
||||
return bus_r(PATTERN_LOOP_4_ITERATION_REG);
|
||||
case 5:
|
||||
return bus_r(PATTERN_LOOP_5_ITERATION_REG);
|
||||
#endif
|
||||
default:
|
||||
return -1;
|
||||
} else {
|
||||
return bus_r(PATTERN_LOOPDEF_BASE +
|
||||
(PATTERN_LOOP_ITERATION_WORD_OFST +
|
||||
level * PATTERN_LOOPDEF_NWORDS_OFST) *
|
||||
REG_OFFSET);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -444,13 +546,29 @@ void setPatternLoopCycles(int level, int nLoop) {
|
||||
LOG(logINFO,
|
||||
#endif
|
||||
("Setting Pattern Loop Cycles(level:%d, nLoop:%d)\n", level, nLoop));
|
||||
if (level < 0 || level >= MAX_LEVELS) {
|
||||
switch (level) {
|
||||
case 0:
|
||||
bus_w(PATTERN_LOOP_0_ITERATION_REG, nLoop);
|
||||
break;
|
||||
case 1:
|
||||
bus_w(PATTERN_LOOP_1_ITERATION_REG, nLoop);
|
||||
break;
|
||||
case 2:
|
||||
bus_w(PATTERN_LOOP_2_ITERATION_REG, nLoop);
|
||||
break;
|
||||
#ifndef MYTHEN3D
|
||||
case 3:
|
||||
bus_w(PATTERN_LOOP_3_ITERATION_REG, nLoop);
|
||||
break;
|
||||
case 4:
|
||||
bus_w(PATTERN_LOOP_4_ITERATION_REG, nLoop);
|
||||
break;
|
||||
case 5:
|
||||
bus_w(PATTERN_LOOP_5_ITERATION_REG, nLoop);
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
return;
|
||||
} else {
|
||||
bus_w(PATTERN_LOOPDEF_BASE + (PATTERN_LOOP_ITERATION_WORD_OFST +
|
||||
level * PATTERN_LOOPDEF_NWORDS_OFST) *
|
||||
REG_OFFSET,
|
||||
nLoop);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -521,22 +639,59 @@ int validate_getPatternLoopAddresses(char *message, int level, int *startAddr,
|
||||
}
|
||||
|
||||
void getPatternLoopAddresses(int level, int *startAddr, int *stopAddr) {
|
||||
if (level < 0 || level >= MAX_LEVELS) {
|
||||
*startAddr = -1;
|
||||
*stopAddr = -1;
|
||||
} else {
|
||||
*startAddr = ((bus_r(PATTERN_LOOPDEF_BASE +
|
||||
(PATTERN_LOOP_ADDR_WORD_OFST +
|
||||
level * PATTERN_LOOPDEF_NWORDS_OFST) *
|
||||
REG_OFFSET) &
|
||||
PATTERN_LOOP_ADDR_STRT_MSK) >>
|
||||
PATTERN_LOOP_ADDR_STRT_OFST);
|
||||
*stopAddr = ((bus_r(PATTERN_LOOPDEF_BASE +
|
||||
(PATTERN_LOOP_ADDR_WORD_OFST +
|
||||
level * PATTERN_LOOPDEF_NWORDS_OFST) *
|
||||
REG_OFFSET) &
|
||||
PATTERN_LOOP_ADDR_STP_MSK) >>
|
||||
PATTERN_LOOP_ADDR_STP_OFST);
|
||||
switch (level) {
|
||||
case 0:
|
||||
*startAddr =
|
||||
((bus_r(PATTERN_LOOP_0_ADDR_REG) & PATTERN_LOOP_0_ADDR_STRT_MSK) >>
|
||||
PATTERN_LOOP_0_ADDR_STRT_OFST);
|
||||
*stopAddr =
|
||||
((bus_r(PATTERN_LOOP_0_ADDR_REG) & PATTERN_LOOP_0_ADDR_STP_MSK) >>
|
||||
PATTERN_LOOP_0_ADDR_STP_OFST);
|
||||
break;
|
||||
case 1:
|
||||
*startAddr =
|
||||
((bus_r(PATTERN_LOOP_1_ADDR_REG) & PATTERN_LOOP_1_ADDR_STRT_MSK) >>
|
||||
PATTERN_LOOP_1_ADDR_STRT_OFST);
|
||||
*stopAddr =
|
||||
((bus_r(PATTERN_LOOP_1_ADDR_REG) & PATTERN_LOOP_1_ADDR_STP_MSK) >>
|
||||
PATTERN_LOOP_1_ADDR_STP_OFST);
|
||||
break;
|
||||
case 2:
|
||||
*startAddr =
|
||||
((bus_r(PATTERN_LOOP_2_ADDR_REG) & PATTERN_LOOP_2_ADDR_STRT_MSK) >>
|
||||
PATTERN_LOOP_2_ADDR_STRT_OFST);
|
||||
*stopAddr =
|
||||
((bus_r(PATTERN_LOOP_2_ADDR_REG) & PATTERN_LOOP_2_ADDR_STP_MSK) >>
|
||||
PATTERN_LOOP_2_ADDR_STP_OFST);
|
||||
break;
|
||||
#ifndef MYTHEN3D
|
||||
case 3:
|
||||
*startAddr =
|
||||
((bus_r(PATTERN_LOOP_3_ADDR_REG) & PATTERN_LOOP_3_ADDR_STRT_MSK) >>
|
||||
PATTERN_LOOP_3_ADDR_STRT_OFST);
|
||||
*stopAddr =
|
||||
((bus_r(PATTERN_LOOP_3_ADDR_REG) & PATTERN_LOOP_3_ADDR_STP_MSK) >>
|
||||
PATTERN_LOOP_3_ADDR_STP_OFST);
|
||||
break;
|
||||
case 4:
|
||||
*startAddr =
|
||||
((bus_r(PATTERN_LOOP_4_ADDR_REG) & PATTERN_LOOP_4_ADDR_STRT_MSK) >>
|
||||
PATTERN_LOOP_4_ADDR_STRT_OFST);
|
||||
*stopAddr =
|
||||
((bus_r(PATTERN_LOOP_4_ADDR_REG) & PATTERN_LOOP_4_ADDR_STP_MSK) >>
|
||||
PATTERN_LOOP_4_ADDR_STP_OFST);
|
||||
break;
|
||||
case 5:
|
||||
*startAddr =
|
||||
((bus_r(PATTERN_LOOP_5_ADDR_REG) & PATTERN_LOOP_5_ADDR_STRT_MSK) >>
|
||||
PATTERN_LOOP_5_ADDR_STRT_OFST);
|
||||
*stopAddr =
|
||||
((bus_r(PATTERN_LOOP_5_ADDR_REG) & PATTERN_LOOP_5_ADDR_STP_MSK) >>
|
||||
PATTERN_LOOP_5_ADDR_STP_OFST);
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -592,16 +747,53 @@ void setPatternLoopAddresses(int level, int startAddr, int stopAddr) {
|
||||
("Setting Pattern Loop Address (level:%d, startaddr:0x%x, "
|
||||
"stopaddr:0x%x)\n",
|
||||
level, startAddr, stopAddr));
|
||||
if (level < 0 || level >= MAX_LEVELS) {
|
||||
switch (level) {
|
||||
case 0:
|
||||
bus_w(PATTERN_LOOP_0_ADDR_REG,
|
||||
((startAddr << PATTERN_LOOP_0_ADDR_STRT_OFST) &
|
||||
PATTERN_LOOP_0_ADDR_STRT_MSK) |
|
||||
((stopAddr << PATTERN_LOOP_0_ADDR_STP_OFST) &
|
||||
PATTERN_LOOP_0_ADDR_STP_MSK));
|
||||
break;
|
||||
case 1:
|
||||
bus_w(PATTERN_LOOP_1_ADDR_REG,
|
||||
((startAddr << PATTERN_LOOP_1_ADDR_STRT_OFST) &
|
||||
PATTERN_LOOP_1_ADDR_STRT_MSK) |
|
||||
((stopAddr << PATTERN_LOOP_1_ADDR_STP_OFST) &
|
||||
PATTERN_LOOP_1_ADDR_STP_MSK));
|
||||
break;
|
||||
case 2:
|
||||
bus_w(PATTERN_LOOP_2_ADDR_REG,
|
||||
((startAddr << PATTERN_LOOP_2_ADDR_STRT_OFST) &
|
||||
PATTERN_LOOP_2_ADDR_STRT_MSK) |
|
||||
((stopAddr << PATTERN_LOOP_2_ADDR_STP_OFST) &
|
||||
PATTERN_LOOP_2_ADDR_STP_MSK));
|
||||
break;
|
||||
#ifndef MYTHEN3D
|
||||
case 3:
|
||||
bus_w(PATTERN_LOOP_3_ADDR_REG,
|
||||
((startAddr << PATTERN_LOOP_3_ADDR_STRT_OFST) &
|
||||
PATTERN_LOOP_3_ADDR_STRT_MSK) |
|
||||
((stopAddr << PATTERN_LOOP_3_ADDR_STP_OFST) &
|
||||
PATTERN_LOOP_3_ADDR_STP_MSK));
|
||||
break;
|
||||
case 4:
|
||||
bus_w(PATTERN_LOOP_4_ADDR_REG,
|
||||
((startAddr << PATTERN_LOOP_4_ADDR_STRT_OFST) &
|
||||
PATTERN_LOOP_4_ADDR_STRT_MSK) |
|
||||
((stopAddr << PATTERN_LOOP_4_ADDR_STP_OFST) &
|
||||
PATTERN_LOOP_4_ADDR_STP_MSK));
|
||||
break;
|
||||
case 5:
|
||||
bus_w(PATTERN_LOOP_5_ADDR_REG,
|
||||
((startAddr << PATTERN_LOOP_5_ADDR_STRT_OFST) &
|
||||
PATTERN_LOOP_5_ADDR_STRT_MSK) |
|
||||
((stopAddr << PATTERN_LOOP_5_ADDR_STP_OFST) &
|
||||
PATTERN_LOOP_5_ADDR_STP_MSK));
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
return;
|
||||
} else {
|
||||
bus_w(PATTERN_LOOPDEF_BASE + (PATTERN_LOOP_ADDR_WORD_OFST +
|
||||
level * PATTERN_LOOPDEF_NWORDS_OFST) *
|
||||
REG_OFFSET,
|
||||
((startAddr << PATTERN_LOOP_ADDR_STRT_OFST) &
|
||||
PATTERN_LOOP_ADDR_STRT_MSK) |
|
||||
((stopAddr << PATTERN_LOOP_ADDR_STP_OFST) &
|
||||
PATTERN_LOOP_ADDR_STP_MSK));
|
||||
}
|
||||
}
|
||||
|
||||
@@ -623,43 +815,17 @@ uint64_t getPatternBitMask() {
|
||||
return getU64BitReg(PATTERN_SET_LSB_REG, PATTERN_SET_MSB_REG);
|
||||
}
|
||||
|
||||
#ifdef MYTHEN3D
|
||||
void startPattern() {
|
||||
LOG(logINFOBLUE, ("Starting Pattern\n"));
|
||||
#ifdef MYTHEN3D
|
||||
bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STRT_PATTERN_MSK);
|
||||
usleep(1);
|
||||
while (bus_r(PAT_STATUS_REG) & PAT_STATUS_RUN_BUSY_MSK) {
|
||||
usleep(1);
|
||||
}
|
||||
#elif CHIPTESTBOARDD
|
||||
// we only want to run the pattern here. No acquisition, no UDP packets
|
||||
|
||||
// disable 10G UDP temporarily
|
||||
// except if the pattern explicitly contains udp trigger points
|
||||
uint32_t conf_reg_tmp = bus_r(CONFIG_REG);
|
||||
if ((bus_r(STREAMING_CTRL_REG) & STREAMING_CTRL_ENA_MSK) == 0) {
|
||||
bus_w(CONFIG_REG, conf_reg_tmp & ~CONFIG_GB10_SND_UDP_MSK);
|
||||
}
|
||||
|
||||
// run the pattern, wait till done
|
||||
bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STRT_ACQSTN_MSK);
|
||||
bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_STRT_ACQSTN_MSK);
|
||||
usleep(1);
|
||||
while (bus_r(STATUS_REG) & STATUS_RN_BSY_MSK) {
|
||||
usleep(1);
|
||||
}
|
||||
|
||||
// go back to original config
|
||||
bus_w(CONFIG_REG, conf_reg_tmp);
|
||||
#elif XILINX_CHIPTESTBOARDD
|
||||
bus_w(FLOW_CONTROL_REG, bus_r(FLOW_CONTROL_REG) | START_F_MSK);
|
||||
usleep(1);
|
||||
while (bus_r(FLOW_CONTROL_REG) & RSM_BUSY_MSK) {
|
||||
usleep(1);
|
||||
}
|
||||
#endif
|
||||
LOG(logINFOBLUE, ("Pattern done\n"));
|
||||
}
|
||||
#endif
|
||||
|
||||
char *getPatternFileName() { return clientPatternfile; }
|
||||
|
||||
|
||||
@@ -5798,7 +5798,7 @@ int set_clock_frequency(int file_des) {
|
||||
return printSocketReadError();
|
||||
LOG(logDEBUG1, ("Setting clock (%d) frequency : %u\n", args[0], args[1]));
|
||||
|
||||
#if !defined(CHIPTESTBOARDD) && !defined(XILINX_CHIPTESTBOARDD)
|
||||
#if !defined(CHIPTESTBOARDD)
|
||||
functionNotImplemented();
|
||||
#else
|
||||
|
||||
@@ -5811,7 +5811,7 @@ int set_clock_frequency(int file_des) {
|
||||
case ADC_CLOCK:
|
||||
c = ADC_CLK;
|
||||
break;
|
||||
#if defined(CHIPTESTBOARDD) || defined(XILINX_CHIPTESTBOARDD)
|
||||
#ifdef CHIPTESTBOARDD
|
||||
case DBIT_CLOCK:
|
||||
c = DBIT_CLK;
|
||||
break;
|
||||
@@ -5839,24 +5839,11 @@ int set_clock_frequency(int file_des) {
|
||||
LOG(logINFO, ("Same %s: %d %s\n", modeName, val,
|
||||
myDetectorType == GOTTHARD2 ? "Hz" : "MHz"));
|
||||
} else {
|
||||
int ret = setFrequency(c, val);
|
||||
if (ret == FAIL) {
|
||||
sprintf(mess, "Could not set %s to %d %s\n", modeName, val,
|
||||
myDetectorType == XILINX_CHIPTESTBOARD ? "kHz"
|
||||
: "MHz");
|
||||
LOG(logERROR, (mess));
|
||||
} else {
|
||||
int retval = getFrequency(c);
|
||||
LOG(logDEBUG1,
|
||||
("retval %s: %d %s\n", modeName, retval,
|
||||
myDetectorType == XILINX_CHIPTESTBOARD ? "kHz"
|
||||
: "MHz"));
|
||||
#if !defined(XILINX_CHIPTESTBOARDD)
|
||||
// XCTB will give the actual frequency, which is not
|
||||
// 100% identical to the set frequency
|
||||
validate(&ret, mess, val, retval, modeName, DEC);
|
||||
#endif
|
||||
}
|
||||
setFrequency(c, val);
|
||||
int retval = getFrequency(c);
|
||||
LOG(logDEBUG1, ("retval %s: %d %s\n", modeName, retval,
|
||||
myDetectorType == GOTTHARD2 ? "Hz" : "MHz"));
|
||||
validate(&ret, mess, val, retval, modeName, DEC);
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -5874,14 +5861,13 @@ int get_clock_frequency(int file_des) {
|
||||
return printSocketReadError();
|
||||
LOG(logDEBUG1, ("Getting clock (%d) frequency\n", arg));
|
||||
|
||||
#if !defined(CHIPTESTBOARDD) && !defined(GOTTHARD2D) && !defined(MYTHEN3D) && \
|
||||
!defined(XILINX_CHIPTESTBOARDD)
|
||||
#if !defined(CHIPTESTBOARDD) && !defined(GOTTHARD2D) && !defined(MYTHEN3D)
|
||||
functionNotImplemented();
|
||||
#else
|
||||
// get only
|
||||
enum CLKINDEX c = 0;
|
||||
switch (arg) {
|
||||
#if defined(CHIPTESTBOARDD) || defined(XILINX_CHIPTESTBOARDD)
|
||||
#if defined(CHIPTESTBOARDD)
|
||||
case ADC_CLOCK:
|
||||
c = ADC_CLK;
|
||||
break;
|
||||
@@ -5911,11 +5897,8 @@ int get_clock_frequency(int file_des) {
|
||||
LOG(logDEBUG1,
|
||||
("retval %s clock (%d) frequency: %d %s\n", clock_names[c], (int)c,
|
||||
retval,
|
||||
myDetectorType == XILINX_CHIPTESTBOARD
|
||||
? "kHz"
|
||||
: (myDetectorType == GOTTHARD2 || myDetectorType == MYTHEN3
|
||||
? "Hz"
|
||||
: "MHz")));
|
||||
myDetectorType == GOTTHARD2 || myDetectorType == MYTHEN3 ? "Hz"
|
||||
: "MHz"));
|
||||
}
|
||||
#endif
|
||||
return Server_SendResult(file_des, INT32, &retval, sizeof(retval));
|
||||
@@ -7480,8 +7463,7 @@ int start_pattern(int file_des) {
|
||||
memset(mess, 0, sizeof(mess));
|
||||
|
||||
LOG(logDEBUG1, ("Starting Pattern\n"));
|
||||
#if !defined(MYTHEN3D) && !defined(XILINX_CHIPTESTBOARDD) && \
|
||||
!defined(CHIPTESTBOARDD)
|
||||
#ifndef MYTHEN3D
|
||||
functionNotImplemented();
|
||||
#else
|
||||
// only set
|
||||
|
||||
@@ -6,7 +6,6 @@ add_executable(xilinx_ctbDetectorServer_virtual
|
||||
../slsDetectorServer/src/slsDetectorServer_funcs.c
|
||||
../slsDetectorServer/src/communication_funcs.c
|
||||
../slsDetectorServer/src/arm64.c
|
||||
../slsDetectorServer/src/XILINX_PLL.c
|
||||
../slsDetectorServer/src/common.c
|
||||
../slsDetectorServer/src/sharedMemory.c
|
||||
../slsDetectorServer/src/loadPattern.c
|
||||
@@ -31,9 +30,7 @@ target_compile_definitions(xilinx_ctbDetectorServer_virtual
|
||||
)
|
||||
|
||||
target_link_libraries(xilinx_ctbDetectorServer_virtual
|
||||
PUBLIC
|
||||
m
|
||||
slsProjectCSettings
|
||||
PUBLIC pthread rt m slsProjectCSettings
|
||||
)
|
||||
|
||||
set_target_properties(xilinx_ctbDetectorServer_virtual PROPERTIES
|
||||
|
||||
@@ -23,7 +23,7 @@ DESTDIR ?= bin
|
||||
INSTMODE = 0777
|
||||
|
||||
SRCS = slsDetectorFunctionList.c
|
||||
SRCS += $(main_src)slsDetectorServer.c $(main_src)slsDetectorServer_funcs.c $(main_src)communication_funcs.c $(main_src)arm64.c $(main_src)XILINX_PLL.c $(main_src)common.c $(main_src)/sharedMemory.c $(main_src)/loadPattern.c $(md5_dir)md5.c $(main_src)programViaArm.c $(main_src)LTC2620_Driver.c
|
||||
SRCS += $(main_src)slsDetectorServer.c $(main_src)slsDetectorServer_funcs.c $(main_src)communication_funcs.c $(main_src)arm64.c $(main_src)common.c $(main_src)/sharedMemory.c $(main_src)/loadPattern.c $(md5_dir)md5.c $(main_src)programViaArm.c $(main_src)LTC2620_Driver.c
|
||||
|
||||
OBJS = $(SRCS:.c=.o)
|
||||
|
||||
|
||||
@@ -2,16 +2,10 @@
|
||||
// Copyright (C) 2021 Contributors to the SLS Detector Package
|
||||
#pragma once
|
||||
|
||||
// clang-format off
|
||||
|
||||
#define REG_OFFSET (4)
|
||||
#define PATTERN_STEP0_MSB_REG (0x10004)
|
||||
#define PATTERN_STEP0_LSB_REG (0x10000)
|
||||
|
||||
#define CTRL_REG (0x8000)
|
||||
|
||||
#define POWER_VIO_OFST (0)
|
||||
#define POWER_VIO_MSK (0x00000001 << POWER_VIO_OFST)
|
||||
#define POWER_VIO_OFST (0)
|
||||
#define POWER_VIO_MSK (0x00000001 << POWER_VIO_OFST)
|
||||
#define POWER_VCC_A_OFST (1)
|
||||
#define POWER_VCC_A_MSK (0x00000001 << POWER_VCC_A_OFST)
|
||||
#define POWER_VCC_B_OFST (2)
|
||||
@@ -23,20 +17,20 @@
|
||||
|
||||
#define STATUS_REG (0x8004)
|
||||
|
||||
#define PATTERN_RUNNING_OFST (0)
|
||||
#define PATTERN_RUNNING_MSK (0x00000001 << PATTERN_RUNNING_OFST)
|
||||
#define RX_BUSY_OFST (1)
|
||||
#define RX_BUSY_MSK (0x00000001 << RX_BUSY_OFST)
|
||||
#define PROCESSING_BUSY_OFST (2)
|
||||
#define PROCESSING_BUSY_MSK (0x00000001 << PROCESSING_BUSY_OFST)
|
||||
#define UDP_GEN_BUSY_OFST (3)
|
||||
#define UDP_GEN_BUSY_MSK (0x00000001 << UDP_GEN_BUSY_OFST)
|
||||
#define NETWORK_BUSY_OFST (4)
|
||||
#define NETWORK_BUSY_MSK (0x00000001 << NETWORK_BUSY_OFST)
|
||||
#define PATTERN_RUNNING_OFST (0)
|
||||
#define PATTERN_RUNNING_MSK (0x00000001 << PATTERN_RUNNING_OFST)
|
||||
#define RX_BUSY_OFST (1)
|
||||
#define RX_BUSY_MSK (0x00000001 << RX_BUSY_OFST)
|
||||
#define PROCESSING_BUSY_OFST (2)
|
||||
#define PROCESSING_BUSY_MSK (0x00000001 << PROCESSING_BUSY_OFST)
|
||||
#define UDP_GEN_BUSY_OFST (3)
|
||||
#define UDP_GEN_BUSY_MSK (0x00000001 << UDP_GEN_BUSY_OFST)
|
||||
#define NETWORK_BUSY_OFST (4)
|
||||
#define NETWORK_BUSY_MSK (0x00000001 << NETWORK_BUSY_OFST)
|
||||
#define WAIT_FOR_TRIGGER_OFST (5)
|
||||
#define WAIT_FOR_TRIGGER_MSK (0x00000001 << WAIT_FOR_TRIGGER_OFST)
|
||||
#define RX_NOT_GOOD_OFST (6)
|
||||
#define RX_NOT_GOOD_MSK (0x00000001 << RX_NOT_GOOD_OFST)
|
||||
#define RX_NOT_GOOD_OFST (6)
|
||||
#define RX_NOT_GOOD_MSK (0x00000001 << RX_NOT_GOOD_OFST)
|
||||
|
||||
#define STATUS_REG2 (0x8008)
|
||||
|
||||
@@ -44,8 +38,8 @@
|
||||
|
||||
#define FPGACOMPDATE_OFST (0)
|
||||
#define FPGACOMPDATE_MSK (0x00ffffff << FPGACOMPDATE_OFST)
|
||||
#define FPGADETTYPE_OFST (24)
|
||||
#define FPGADETTYPE_MSK (0x000000ff << FPGADETTYPE_OFST)
|
||||
#define FPGADETTYPE_OFST (24)
|
||||
#define FPGADETTYPE_MSK (0x000000ff << FPGADETTYPE_OFST)
|
||||
|
||||
#define FPGA_GIT_HEAD (0x8010)
|
||||
|
||||
@@ -56,8 +50,8 @@
|
||||
|
||||
#define APICOMPDATE_OFST (0)
|
||||
#define APICOMPDATE_MSK (0x00ffffff << APICOMPDATE_OFST)
|
||||
#define APIDETTYPE_OFST (24)
|
||||
#define APIDETTYPE_MSK (0x000000ff << APIDETTYPE_OFST)
|
||||
#define APIDETTYPE_OFST (24)
|
||||
#define APIDETTYPE_MSK (0x000000ff << APIDETTYPE_OFST)
|
||||
|
||||
#define A_FIFO_OVERFLOW_STATUS_REG (0x9000)
|
||||
|
||||
@@ -109,22 +103,23 @@
|
||||
|
||||
#define FIFO_TO_GB_CONTROL_REG (0xA000)
|
||||
|
||||
#define ENABLED_CHANNELS_ADC_OFST (0)
|
||||
#define ENABLED_CHANNELS_ADC_MSK (0x000000ff << ENABLED_CHANNELS_ADC_OFST)
|
||||
#define ENABLED_CHANNELS_D_OFST (8)
|
||||
#define ENABLED_CHANNELS_D_MSK (0x00000001 << ENABLED_CHANNELS_D_OFST)
|
||||
#define ENABLED_CHANNELS_X_OFST (9)
|
||||
#define ENABLED_CHANNELS_X_MSK (0x0000000f << ENABLED_CHANNELS_X_OFST)
|
||||
#define RO_MODE_ADC_OFST (13)
|
||||
#define RO_MODE_ADC_MSK (0x00000001 << RO_MODE_ADC_OFST)
|
||||
#define RO_MODE_D_OFST (14)
|
||||
#define RO_MODE_D_MSK (0x00000001 << RO_MODE_D_OFST)
|
||||
#define RO_MODE_X_OFST (15)
|
||||
#define RO_MODE_X_MSK (0x00000001 << RO_MODE_X_OFST)
|
||||
#define ENABLED_CHANNELS_ADC_OFST (0)
|
||||
#define ENABLED_CHANNELS_ADC_MSK (0x000000ff << ENABLED_CHANNELS_ADC_OFST)
|
||||
#define ENABLED_CHANNELS_D_OFST (8)
|
||||
#define ENABLED_CHANNELS_D_MSK (0x00000001 << ENABLED_CHANNELS_D_OFST)
|
||||
#define ENABLED_CHANNELS_X_OFST (9)
|
||||
#define ENABLED_CHANNELS_X_MSK (0x0000000f << ENABLED_CHANNELS_X_OFST)
|
||||
#define RO_MODE_ADC_OFST (13)
|
||||
#define RO_MODE_ADC_MSK (0x00000001 << RO_MODE_ADC_OFST)
|
||||
#define RO_MODE_D_OFST (14)
|
||||
#define RO_MODE_D_MSK (0x00000001 << RO_MODE_D_OFST)
|
||||
#define RO_MODE_X_OFST (15)
|
||||
#define RO_MODE_X_MSK (0x00000001 << RO_MODE_X_OFST)
|
||||
#define COUNT_FRAMES_FROM_UPDATE_OFST (16)
|
||||
#define COUNT_FRAMES_FROM_UPDATE_MSK (0x00000001 << COUNT_FRAMES_FROM_UPDATE_OFST)
|
||||
#define START_STREAMING_P_OFST (17)
|
||||
#define START_STREAMING_P_MSK (0x00000001 << START_STREAMING_P_OFST)
|
||||
#define COUNT_FRAMES_FROM_UPDATE_MSK \
|
||||
(0x00000001 << COUNT_FRAMES_FROM_UPDATE_OFST)
|
||||
#define START_STREAMING_P_OFST (17)
|
||||
#define START_STREAMING_P_MSK (0x00000001 << START_STREAMING_P_OFST)
|
||||
#define STREAM_BUFFER_CLEAR_OFST (18)
|
||||
#define STREAM_BUFFER_CLEAR_MSK (0x00000001 << STREAM_BUFFER_CLEAR_OFST)
|
||||
|
||||
@@ -153,26 +148,26 @@
|
||||
|
||||
#define PKTPACKETLENGTHREG (0xA020)
|
||||
|
||||
#define PACKETLENGTH1G_OFST (0)
|
||||
#define PACKETLENGTH1G_MSK (0x0000ffff << PACKETLENGTH1G_OFST)
|
||||
#define PACKETLENGTH1G_OFST (0)
|
||||
#define PACKETLENGTH1G_MSK (0x0000ffff << PACKETLENGTH1G_OFST)
|
||||
#define PACKETLENGTH10G_OFST (16)
|
||||
#define PACKETLENGTH10G_MSK (0x0000ffff << PACKETLENGTH10G_OFST)
|
||||
|
||||
#define PKTNOPACKETSREG (0xA024)
|
||||
|
||||
#define NOPACKETS1G_OFST (0)
|
||||
#define NOPACKETS1G_MSK (0x0000003f << NOPACKETS1G_OFST)
|
||||
#define NOPACKETS1G_OFST (0)
|
||||
#define NOPACKETS1G_MSK (0x0000003f << NOPACKETS1G_OFST)
|
||||
#define NOPACKETS10G_OFST (16)
|
||||
#define NOPACKETS10G_MSK (0x0000003f << NOPACKETS10G_OFST)
|
||||
|
||||
#define PKTCTRLREG (0xA028)
|
||||
|
||||
#define NOSERVERS_OFST (0)
|
||||
#define NOSERVERS_MSK (0x0000003f << NOSERVERS_OFST)
|
||||
#define NOSERVERS_OFST (0)
|
||||
#define NOSERVERS_MSK (0x0000003f << NOSERVERS_OFST)
|
||||
#define SERVERSTART_OFST (8)
|
||||
#define SERVERSTART_MSK (0x0000001f << SERVERSTART_OFST)
|
||||
#define ETHINTERF_OFST (16)
|
||||
#define ETHINTERF_MSK (0x00000001 << ETHINTERF_OFST)
|
||||
#define ETHINTERF_OFST (16)
|
||||
#define ETHINTERF_MSK (0x00000001 << ETHINTERF_OFST)
|
||||
|
||||
#define PKTCOORDREG1 (0xA02C)
|
||||
|
||||
@@ -186,282 +181,363 @@
|
||||
#define COORDZ_OFST (0)
|
||||
#define COORDZ_MSK (0x0000ffff << COORDZ_OFST)
|
||||
|
||||
#define PATTERN_OUT_LSB_REG (0xB000)
|
||||
#define FLOW_STATUS_REG (0xB000)
|
||||
|
||||
#define PATTERN_OUT_MSB_REG (0xB004)
|
||||
#define RSM_BUSY_OFST (0)
|
||||
#define RSM_BUSY_MSK (0x00000001 << RSM_BUSY_OFST)
|
||||
#define RSM_TRG_WAIT_OFST (3)
|
||||
#define RSM_TRG_WAIT_MSK (0x00000001 << RSM_TRG_WAIT_OFST)
|
||||
#define CSM_BUSY_OFST (17)
|
||||
#define CSM_BUSY_MSK (0x00000001 << CSM_BUSY_OFST)
|
||||
|
||||
#define PATTERN_IN_LSB_REG (0xB008)
|
||||
#define FLOW_CONTROL_REG (0xB004)
|
||||
|
||||
#define PATTERN_IN_MSB_REG (0xB00C)
|
||||
#define START_F_OFST (0)
|
||||
#define START_F_MSK (0x00000001 << START_F_OFST)
|
||||
#define STOP_F_OFST (1)
|
||||
#define STOP_F_MSK (0x00000001 << STOP_F_OFST)
|
||||
#define RST_F_OFST (2)
|
||||
#define RST_F_MSK (0x00000001 << RST_F_OFST)
|
||||
#define SW_TRIGGER_F_OFST (3)
|
||||
#define SW_TRIGGER_F_MSK (0x00000001 << SW_TRIGGER_F_OFST)
|
||||
#define TRIGGER_ENABLE_OFST (4)
|
||||
#define TRIGGER_ENABLE_MSK (0x00000001 << TRIGGER_ENABLE_OFST)
|
||||
|
||||
#define PATTERN_MASK_LSB_REG (0xB010)
|
||||
#define TIME_FROM_START_OUT_REG_1 (0xB008)
|
||||
|
||||
#define PATTERN_MASK_MSB_REG (0xB014)
|
||||
#define TIME_FROM_START_OUT_REG_2 (0xB00C)
|
||||
|
||||
#define PATTERN_SET_LSB_REG (0xB018)
|
||||
#define FRAMES_FROM_START_OUT_REG_1 (0xB010)
|
||||
|
||||
#define PATTERN_SET_MSB_REG (0xB01C)
|
||||
#define FRAMES_FROM_START_OUT_REG_2 (0xB014)
|
||||
|
||||
#define PATTERN_CNTRL_REG (0xB020)
|
||||
#define FRAME_TIME_OUT_REG_1 (0xB018)
|
||||
|
||||
#define PATTERN_CNTRL_WR_OFST (0)
|
||||
#define PATTERN_CNTRL_WR_MSK (0x00000001 << PATTERN_CNTRL_WR_OFST)
|
||||
#define PATTERN_CNTRL_RD_OFST (1)
|
||||
#define PATTERN_CNTRL_RD_MSK (0x00000001 << PATTERN_CNTRL_RD_OFST)
|
||||
#define FRAME_TIME_OUT_REG_2 (0xB01C)
|
||||
|
||||
#define DELAY_OUT_REG_1 (0xB020)
|
||||
|
||||
#define DELAY_OUT_REG_2 (0xB024)
|
||||
|
||||
#define CYCLES_OUT_REG_1 (0xB028)
|
||||
|
||||
#define CYCLES_OUT_REG_2 (0xB02C)
|
||||
|
||||
#define FRAMES_OUT_REG_1 (0xB030)
|
||||
|
||||
#define FRAMES_OUT_REG_2 (0xB034)
|
||||
|
||||
#define PERIOD_OUT_REG_1 (0xB038)
|
||||
|
||||
#define PERIOD_OUT_REG_2 (0xB03C)
|
||||
|
||||
#define DELAY_IN_REG_1 (0xB040)
|
||||
|
||||
#define DELAY_IN_REG_2 (0xB044)
|
||||
|
||||
#define CYCLES_IN_REG_1 (0xB048)
|
||||
|
||||
#define CYCLES_IN_REG_2 (0xB04C)
|
||||
|
||||
#define FRAMES_IN_REG_1 (0xB050)
|
||||
|
||||
#define FRAMES_IN_REG_2 (0xB054)
|
||||
|
||||
#define PERIOD_IN_REG_1 (0xB058)
|
||||
|
||||
#define PERIOD_IN_REG_2 (0xB05C)
|
||||
|
||||
#define PATTERN_OUT_LSB_REG (0xB100)
|
||||
|
||||
#define PATTERN_OUT_MSB_REG (0xB104)
|
||||
|
||||
#define PATTERN_IN_LSB_REG (0xB108)
|
||||
|
||||
#define PATTERN_IN_MSB_REG (0xB10C)
|
||||
|
||||
#define PATTERN_MASK_LSB_REG (0xB110)
|
||||
|
||||
#define PATTERN_MASK_MSB_REG (0xB114)
|
||||
|
||||
#define PATTERN_SET_LSB_REG (0xB118)
|
||||
|
||||
#define PATTERN_SET_MSB_REG (0xB11C)
|
||||
|
||||
#define PATTERN_CNTRL_REG (0xB120)
|
||||
|
||||
#define PATTERN_CNTRL_WR_OFST (0)
|
||||
#define PATTERN_CNTRL_WR_MSK (0x00000001 << PATTERN_CNTRL_WR_OFST)
|
||||
#define PATTERN_CNTRL_RD_OFST (1)
|
||||
#define PATTERN_CNTRL_RD_MSK (0x00000001 << PATTERN_CNTRL_RD_OFST)
|
||||
#define PATTERN_CNTRL_ADDR_OFST (16)
|
||||
#define PATTERN_CNTRL_ADDR_MSK (0x00001fff << PATTERN_CNTRL_ADDR_OFST)
|
||||
|
||||
#define PATTERN_LIMIT_REG (0xB024)
|
||||
#define PATTERN_LIMIT_REG (0xB124)
|
||||
|
||||
#define PATTERN_LIMIT_STRT_OFST (0)
|
||||
#define PATTERN_LIMIT_STRT_MSK (0x00001fff << PATTERN_LIMIT_STRT_OFST)
|
||||
#define PATTERN_LIMIT_STP_OFST (16)
|
||||
#define PATTERN_LIMIT_STP_MSK (0x00001fff << PATTERN_LIMIT_STP_OFST)
|
||||
#define PATTERN_LIMIT_STP_OFST (16)
|
||||
#define PATTERN_LIMIT_STP_MSK (0x00001fff << PATTERN_LIMIT_STP_OFST)
|
||||
|
||||
#define PATTERN_IO_CNTRL_LSB_REG (0xB028)
|
||||
#define PATTERN_LOOP_0_ADDR_REG (0xB128)
|
||||
|
||||
#define PATTERN_IO_CNTRL_MSB_REG (0xB02C)
|
||||
#define PATTERN_LOOP_0_ADDR_STRT_OFST (0)
|
||||
#define PATTERN_LOOP_0_ADDR_STRT_MSK \
|
||||
(0x00001fff << PATTERN_LOOP_0_ADDR_STRT_OFST)
|
||||
#define PATTERN_LOOP_0_ADDR_STP_OFST (16)
|
||||
#define PATTERN_LOOP_0_ADDR_STP_MSK (0x00001fff << PATTERN_LOOP_0_ADDR_STP_OFST)
|
||||
|
||||
#define FLOW_CONTROL_REG (0xB030)
|
||||
#define PATTERN_LOOP_0_ITERATION_REG (0xB12C)
|
||||
|
||||
#define START_F_OFST (0)
|
||||
#define START_F_MSK (0x00000001 << START_F_OFST)
|
||||
#define STOP_F_OFST (1)
|
||||
#define STOP_F_MSK (0x00000001 << STOP_F_OFST)
|
||||
#define RST_F_OFST (2)
|
||||
#define RST_F_MSK (0x00000001 << RST_F_OFST)
|
||||
#define SW_TRIGGER_F_OFST (3)
|
||||
#define SW_TRIGGER_F_MSK (0x00000001 << SW_TRIGGER_F_OFST)
|
||||
#define TRIGGER_ENABLE_OFST (4)
|
||||
#define TRIGGER_ENABLE_MSK (0x00000001 << TRIGGER_ENABLE_OFST)
|
||||
#define RSM_BUSY_OFST (5)
|
||||
#define RSM_BUSY_MSK (0x00000001 << RSM_BUSY_OFST)
|
||||
#define RSM_TRG_WAIT_OFST (6)
|
||||
#define RSM_TRG_WAIT_MSK (0x00000001 << RSM_TRG_WAIT_OFST)
|
||||
#define CSM_BUSY_OFST (7)
|
||||
#define CSM_BUSY_MSK (0x00000001 << CSM_BUSY_OFST)
|
||||
#define PATTERN_WAIT_0_ADDR_REG (0xB130)
|
||||
|
||||
#define DELAY_IN_REG_1 (0xB034)
|
||||
#define PATTERN_WAIT_0_ADDR_OFST (0)
|
||||
#define PATTERN_WAIT_0_ADDR_MSK (0x00001fff << PATTERN_WAIT_0_ADDR_OFST)
|
||||
|
||||
#define DELAY_IN_REG_2 (0xB038)
|
||||
#define PATTERN_WAIT_TIMER_0_LSB_REG (0xB134)
|
||||
|
||||
#define CYCLES_IN_REG_1 (0xB03C)
|
||||
#define PATTERN_WAIT_TIMER_0_MSB_REG (0xB138)
|
||||
|
||||
#define CYCLES_IN_REG_2 (0xB040)
|
||||
#define PATTERN_LOOP_1_ADDR_REG (0xB13C)
|
||||
|
||||
#define FRAMES_IN_REG_1 (0xB044)
|
||||
#define PATTERN_LOOP_1_ADDR_STRT_OFST (0)
|
||||
#define PATTERN_LOOP_1_ADDR_STRT_MSK \
|
||||
(0x00001fff << PATTERN_LOOP_1_ADDR_STRT_OFST)
|
||||
#define PATTERN_LOOP_1_ADDR_STP_OFST (16)
|
||||
#define PATTERN_LOOP_1_ADDR_STP_MSK (0x00001fff << PATTERN_LOOP_1_ADDR_STP_OFST)
|
||||
|
||||
#define FRAMES_IN_REG_2 (0xB048)
|
||||
#define PATTERN_LOOP_1_ITERATION_REG (0xB140)
|
||||
|
||||
#define PERIOD_IN_REG_1 (0xB04C)
|
||||
#define PATTERN_WAIT_1_ADDR_REG (0xB144)
|
||||
|
||||
#define PERIOD_IN_REG_2 (0xB050)
|
||||
#define PATTERN_WAIT_1_ADDR_OFST (0)
|
||||
#define PATTERN_WAIT_1_ADDR_MSK (0x00001fff << PATTERN_WAIT_1_ADDR_OFST)
|
||||
|
||||
#define PATTERN_TEST_REG (0xB054)
|
||||
#define PATTERN_WAIT_TIMER_1_LSB_REG (0xB148)
|
||||
|
||||
#define PATTERN_FIRMWARE_REG (0xB058)
|
||||
#define PATTERN_WAIT_TIMER_1_MSB_REG (0xB14C)
|
||||
|
||||
#define PATTERN_WIDTH_OFST (0)
|
||||
#define PATTERN_WIDTH_MSK (0x000000ff << PATTERN_WIDTH_OFST)
|
||||
#define PATTERN_ADDR_WIDTH_OFST (8)
|
||||
#define PATTERN_ADDR_WIDTH_MSK (0x000000ff << PATTERN_ADDR_WIDTH_OFST)
|
||||
#define PATTERN_NLOOPS_NWAITS_OFST (16)
|
||||
#define PATTERN_NLOOPS_NWAITS_MSK (0x000000ff << PATTERN_NLOOPS_NWAITS_OFST)
|
||||
#define DIRECT_PATTERN_RAM_OFST (24)
|
||||
#define DIRECT_PATTERN_RAM_MSK (0x00000001 << DIRECT_PATTERN_RAM_OFST)
|
||||
#define PATTERN_LOOP_2_ADDR_REG (0xB150)
|
||||
|
||||
#define TIME_FROM_START_OUT_REG_1 (0xB05C)
|
||||
#define PATTERN_LOOP_2_ADDR_STRT_OFST (0)
|
||||
#define PATTERN_LOOP_2_ADDR_STRT_MSK \
|
||||
(0x00001fff << PATTERN_LOOP_2_ADDR_STRT_OFST)
|
||||
#define PATTERN_LOOP_2_ADDR_STP_OFST (16)
|
||||
#define PATTERN_LOOP_2_ADDR_STP_MSK (0x00001fff << PATTERN_LOOP_2_ADDR_STP_OFST)
|
||||
|
||||
#define TIME_FROM_START_OUT_REG_2 (0xB060)
|
||||
#define PATTERN_LOOP_2_ITERATION_REG (0xB154)
|
||||
|
||||
#define FRAMES_FROM_START_OUT_REG_1 (0xB064)
|
||||
#define PATTERN_WAIT_2_ADDR_REG (0xB158)
|
||||
|
||||
#define FRAMES_FROM_START_OUT_REG_2 (0xB068)
|
||||
#define PATTERN_WAIT_2_ADDR_OFST (0)
|
||||
#define PATTERN_WAIT_2_ADDR_MSK (0x00001fff << PATTERN_WAIT_2_ADDR_OFST)
|
||||
|
||||
#define FRAME_TIME_OUT_REG_1 (0xB06C)
|
||||
#define PATTERN_WAIT_TIMER_2_LSB_REG (0xB15C)
|
||||
|
||||
#define FRAME_TIME_OUT_REG_2 (0xB070)
|
||||
#define PATTERN_WAIT_TIMER_2_MSB_REG (0xB160)
|
||||
|
||||
#define PATTERN_LOOPDEF_BASE (0xB080)
|
||||
#define PATTERN_LOOP_3_ADDR_REG (0xB164)
|
||||
|
||||
#define PATTERN_LOOP_ADDR_WORD_OFST (0)
|
||||
#define PATTERN_LOOP_ADDR_WORD_MSK (0x00000001 << PATTERN_LOOP_ADDR_WORD_OFST)
|
||||
#define PATTERN_LOOP_ITERATION_WORD_OFST (1)
|
||||
#define PATTERN_LOOP_ITERATION_WORD_MSK (0x00000001 << PATTERN_LOOP_ITERATION_WORD_OFST)
|
||||
#define PATTERN_WAIT_ADDR_WORD_OFST (2)
|
||||
#define PATTERN_WAIT_ADDR_WORD_MSK (0x00000001 << PATTERN_WAIT_ADDR_WORD_OFST)
|
||||
#define PATTERN_WAIT_TIMER_LSB_WORD_OFST (3)
|
||||
#define PATTERN_WAIT_TIMER_LSB_WORD_MSK (0x00000001 << PATTERN_WAIT_TIMER_LSB_WORD_OFST)
|
||||
#define PATTERN_WAIT_TIMER_MSB_WORD_OFST (4)
|
||||
#define PATTERN_WAIT_TIMER_MSB_WORD_MSK (0x00000001 << PATTERN_WAIT_TIMER_MSB_WORD_OFST)
|
||||
#define PATTERN_LOOPDEF_NWORDS_OFST (5)
|
||||
#define PATTERN_LOOPDEF_NWORDS_MSK (0x00000001 << PATTERN_LOOPDEF_NWORDS_OFST)
|
||||
#define PATTERN_WAIT_ADDR_OFST (0)
|
||||
#define PATTERN_WAIT_ADDR_MSK (0x00001fff << PATTERN_WAIT_ADDR_OFST)
|
||||
#define PATTERN_LOOP_ADDR_STRT_OFST (0)
|
||||
#define PATTERN_LOOP_ADDR_STRT_MSK (0x00001fff << PATTERN_LOOP_ADDR_STRT_OFST)
|
||||
#define PATTERN_LOOP_ADDR_STP_OFST (16)
|
||||
#define PATTERN_LOOP_ADDR_STP_MSK (0x00001fff << PATTERN_LOOP_ADDR_STP_OFST)
|
||||
#define PATTERN_LOOP_3_ADDR_STRT_OFST (0)
|
||||
#define PATTERN_LOOP_3_ADDR_STRT_MSK \
|
||||
(0x00001fff << PATTERN_LOOP_3_ADDR_STRT_OFST)
|
||||
#define PATTERN_LOOP_3_ADDR_STP_OFST (16)
|
||||
#define PATTERN_LOOP_3_ADDR_STP_MSK (0x00001fff << PATTERN_LOOP_3_ADDR_STP_OFST)
|
||||
|
||||
#define DBITFIFOCTRLREG (0xC000)
|
||||
#define PATTERN_LOOP_3_ITERATION_REG (0xB168)
|
||||
|
||||
#define DBITRD_OFST (0)
|
||||
#define DBITRD_MSK (0x00000001 << DBITRD_OFST)
|
||||
#define DBITRST_OFST (1)
|
||||
#define DBITRST_MSK (0x00000001 << DBITRST_OFST)
|
||||
#define DBITFULL_OFST (2)
|
||||
#define DBITFULL_MSK (0x00000001 << DBITFULL_OFST)
|
||||
#define DBITEMPTY_OFST (3)
|
||||
#define DBITEMPTY_MSK (0x00000001 << DBITEMPTY_OFST)
|
||||
#define PATTERN_WAIT_3_ADDR_REG (0xB16C)
|
||||
|
||||
#define PATTERN_WAIT_3_ADDR_OFST (0)
|
||||
#define PATTERN_WAIT_3_ADDR_MSK (0x00001fff << PATTERN_WAIT_3_ADDR_OFST)
|
||||
|
||||
#define PATTERN_WAIT_TIMER_3_LSB_REG (0xB170)
|
||||
|
||||
#define PATTERN_WAIT_TIMER_3_MSB_REG (0xB174)
|
||||
|
||||
#define PATTERN_LOOP_4_ADDR_REG (0xB178)
|
||||
|
||||
#define PATTERN_LOOP_4_ADDR_STRT_OFST (0)
|
||||
#define PATTERN_LOOP_4_ADDR_STRT_MSK \
|
||||
(0x00001fff << PATTERN_LOOP_4_ADDR_STRT_OFST)
|
||||
#define PATTERN_LOOP_4_ADDR_STP_OFST (16)
|
||||
#define PATTERN_LOOP_4_ADDR_STP_MSK (0x00001fff << PATTERN_LOOP_4_ADDR_STP_OFST)
|
||||
|
||||
#define PATTERN_LOOP_4_ITERATION_REG (0xB17C)
|
||||
|
||||
#define PATTERN_WAIT_4_ADDR_REG (0xB180)
|
||||
|
||||
#define PATTERN_WAIT_4_ADDR_OFST (0)
|
||||
#define PATTERN_WAIT_4_ADDR_MSK (0x00001fff << PATTERN_WAIT_4_ADDR_OFST)
|
||||
|
||||
#define PATTERN_WAIT_TIMER_4_LSB_REG (0xB184)
|
||||
|
||||
#define PATTERN_WAIT_TIMER_4_MSB_REG (0xB188)
|
||||
|
||||
#define PATTERN_LOOP_5_ADDR_REG (0xB18C)
|
||||
|
||||
#define PATTERN_LOOP_5_ADDR_STRT_OFST (0)
|
||||
#define PATTERN_LOOP_5_ADDR_STRT_MSK \
|
||||
(0x00001fff << PATTERN_LOOP_5_ADDR_STRT_OFST)
|
||||
#define PATTERN_LOOP_5_ADDR_STP_OFST (16)
|
||||
#define PATTERN_LOOP_5_ADDR_STP_MSK (0x00001fff << PATTERN_LOOP_5_ADDR_STP_OFST)
|
||||
|
||||
#define PATTERN_LOOP_5_ITERATION_REG (0xB190)
|
||||
|
||||
#define PATTERN_WAIT_5_ADDR_REG (0xB194)
|
||||
|
||||
#define PATTERN_WAIT_5_ADDR_OFST (0)
|
||||
#define PATTERN_WAIT_5_ADDR_MSK (0x00001fff << PATTERN_WAIT_5_ADDR_OFST)
|
||||
|
||||
#define PATTERN_WAIT_TIMER_5_LSB_REG (0xB198)
|
||||
|
||||
#define PATTERN_WAIT_TIMER_5_MSB_REG (0xB19C)
|
||||
|
||||
#define PINIOCTRLREG (0xB1A0)
|
||||
|
||||
#define DBITFIFOCTRLREG (0xB1A4)
|
||||
|
||||
#define DBITRD_OFST (0)
|
||||
#define DBITRD_MSK (0x00000001 << DBITRD_OFST)
|
||||
#define DBITRST_OFST (1)
|
||||
#define DBITRST_MSK (0x00000001 << DBITRST_OFST)
|
||||
#define DBITFULL_OFST (2)
|
||||
#define DBITFULL_MSK (0x00000001 << DBITFULL_OFST)
|
||||
#define DBITEMPTY_OFST (3)
|
||||
#define DBITEMPTY_MSK (0x00000001 << DBITEMPTY_OFST)
|
||||
#define DBITUNDERFLOW_OFST (4)
|
||||
#define DBITUNDERFLOW_MSK (0x00000001 << DBITUNDERFLOW_OFST)
|
||||
#define DBITOVERFLOW_OFST (5)
|
||||
#define DBITOVERFLOW_MSK (0x00000001 << DBITOVERFLOW_OFST)
|
||||
#define DBITOVERFLOW_OFST (5)
|
||||
#define DBITOVERFLOW_MSK (0x00000001 << DBITOVERFLOW_OFST)
|
||||
|
||||
#define DBITFIFODATAREG1 (0xC004)
|
||||
#define DBITFIFODATAREG1 (0xB1A8)
|
||||
|
||||
#define DBITFIFODATAREG2 (0xC008)
|
||||
#define DBITFIFODATAREG2 (0xB1AC)
|
||||
|
||||
#define MATTERHORNSPIREG1 (0xC00C)
|
||||
#define MATTERHORNSPIREG1 (0xB1B0)
|
||||
|
||||
#define MATTERHORNSPIREG2 (0xC010)
|
||||
#define MATTERHORNSPIREG2 (0xB1B4)
|
||||
|
||||
#define MATTERHORNSPICTRL (0xC014)
|
||||
#define MATTERHORNSPICTRL (0xB1B8)
|
||||
|
||||
#define CONFIGSTART_P_OFST (0)
|
||||
#define CONFIGSTART_P_MSK (0x00000001 << CONFIGSTART_P_OFST)
|
||||
#define PERIPHERYRST_P_OFST (1)
|
||||
#define PERIPHERYRST_P_MSK (0x00000001 << PERIPHERYRST_P_OFST)
|
||||
#define STARTREAD_P_OFST (2)
|
||||
#define STARTREAD_P_MSK (0x00000001 << STARTREAD_P_OFST)
|
||||
#define BUSY_OFST (3)
|
||||
#define BUSY_MSK (0x00000001 << BUSY_OFST)
|
||||
#define CONFIGSTART_P_OFST (0)
|
||||
#define CONFIGSTART_P_MSK (0x00000001 << CONFIGSTART_P_OFST)
|
||||
#define PERIPHERYRST_P_OFST (1)
|
||||
#define PERIPHERYRST_P_MSK (0x00000001 << PERIPHERYRST_P_OFST)
|
||||
#define STARTREAD_P_OFST (2)
|
||||
#define STARTREAD_P_MSK (0x00000001 << STARTREAD_P_OFST)
|
||||
#define BUSY_OFST (3)
|
||||
#define BUSY_MSK (0x00000001 << BUSY_OFST)
|
||||
#define READOUTFROMASIC_OFST (4)
|
||||
#define READOUTFROMASIC_MSK (0x00000001 << READOUTFROMASIC_OFST)
|
||||
|
||||
#define TRANSCEIVERRXCTRL0REG1 (0xC100)
|
||||
#define TRANSCEIVERRXCTRL0REG1 (0xB800)
|
||||
|
||||
#define TRANSCEIVERRXCTRL0REG2 (0xC104)
|
||||
#define TRANSCEIVERRXCTRL0REG2 (0xB804)
|
||||
|
||||
#define TRANSCEIVERRXCTRL1REG1 (0xC108)
|
||||
#define TRANSCEIVERRXCTRL1REG1 (0xB808)
|
||||
|
||||
#define TRANSCEIVERRXCTRL1REG2 (0xC10C)
|
||||
#define TRANSCEIVERRXCTRL1REG2 (0xB80C)
|
||||
|
||||
#define TRANSCEIVERRXCTRL2REG (0xC110)
|
||||
#define TRANSCEIVERRXCTRL2REG (0xB810)
|
||||
|
||||
#define TRANSCEIVERRXCTRL3REG (0xC114)
|
||||
#define TRANSCEIVERRXCTRL3REG (0xB814)
|
||||
|
||||
#define TRANSCEIVERSTATUS (0xC118)
|
||||
#define TRANSCEIVERSTATUS (0xB818)
|
||||
|
||||
#define LINKDOWNLATCHEDOUT_OFST (0)
|
||||
#define LINKDOWNLATCHEDOUT_MSK (0x00000001 << LINKDOWNLATCHEDOUT_OFST)
|
||||
#define TXUSERCLKACTIVE_OFST (1)
|
||||
#define TXUSERCLKACTIVE_MSK (0x00000001 << TXUSERCLKACTIVE_OFST)
|
||||
#define RXUSERCLKACTIVE_OFST (2)
|
||||
#define RXUSERCLKACTIVE_MSK (0x00000001 << RXUSERCLKACTIVE_OFST)
|
||||
#define RXCOMMADET_OFST (3)
|
||||
#define RXCOMMADET_MSK (0x0000000f << RXCOMMADET_OFST)
|
||||
#define RXBYTEREALIGN_OFST (7)
|
||||
#define RXBYTEREALIGN_MSK (0x0000000f << RXBYTEREALIGN_OFST)
|
||||
#define RXBYTEISALIGNED_OFST (11)
|
||||
#define RXBYTEISALIGNED_MSK (0x0000000f << RXBYTEISALIGNED_OFST)
|
||||
#define GTWIZRXCDRSTABLE_OFST (15)
|
||||
#define GTWIZRXCDRSTABLE_MSK (0x00000001 << GTWIZRXCDRSTABLE_OFST)
|
||||
#define RESETTXDONE_OFST (16)
|
||||
#define RESETTXDONE_MSK (0x00000001 << RESETTXDONE_OFST)
|
||||
#define RESETRXDONE_OFST (17)
|
||||
#define RESETRXDONE_MSK (0x00000001 << RESETRXDONE_OFST)
|
||||
#define RXPMARESETDONE_OFST (18)
|
||||
#define RXPMARESETDONE_MSK (0x0000000f << RXPMARESETDONE_OFST)
|
||||
#define TXPMARESETDONE_OFST (22)
|
||||
#define TXPMARESETDONE_MSK (0x0000000f << TXPMARESETDONE_OFST)
|
||||
#define GTTPOWERGOOD_OFST (26)
|
||||
#define GTTPOWERGOOD_MSK (0x0000000f << GTTPOWERGOOD_OFST)
|
||||
#define TXUSERCLKACTIVE_OFST (1)
|
||||
#define TXUSERCLKACTIVE_MSK (0x00000001 << TXUSERCLKACTIVE_OFST)
|
||||
#define RXUSERCLKACTIVE_OFST (2)
|
||||
#define RXUSERCLKACTIVE_MSK (0x00000001 << RXUSERCLKACTIVE_OFST)
|
||||
#define RXCOMMADET_OFST (3)
|
||||
#define RXCOMMADET_MSK (0x0000000f << RXCOMMADET_OFST)
|
||||
#define RXBYTEREALIGN_OFST (7)
|
||||
#define RXBYTEREALIGN_MSK (0x0000000f << RXBYTEREALIGN_OFST)
|
||||
#define RXBYTEISALIGNED_OFST (11)
|
||||
#define RXBYTEISALIGNED_MSK (0x0000000f << RXBYTEISALIGNED_OFST)
|
||||
#define GTWIZRXCDRSTABLE_OFST (15)
|
||||
#define GTWIZRXCDRSTABLE_MSK (0x00000001 << GTWIZRXCDRSTABLE_OFST)
|
||||
#define RESETTXDONE_OFST (16)
|
||||
#define RESETTXDONE_MSK (0x00000001 << RESETTXDONE_OFST)
|
||||
#define RESETRXDONE_OFST (17)
|
||||
#define RESETRXDONE_MSK (0x00000001 << RESETRXDONE_OFST)
|
||||
#define RXPMARESETDONE_OFST (18)
|
||||
#define RXPMARESETDONE_MSK (0x0000000f << RXPMARESETDONE_OFST)
|
||||
#define TXPMARESETDONE_OFST (22)
|
||||
#define TXPMARESETDONE_MSK (0x0000000f << TXPMARESETDONE_OFST)
|
||||
#define GTTPOWERGOOD_OFST (26)
|
||||
#define GTTPOWERGOOD_MSK (0x0000000f << GTTPOWERGOOD_OFST)
|
||||
|
||||
#define TRANSCEIVERSTATUS2 (0xC11C)
|
||||
#define TRANSCEIVERSTATUS2 (0xB81C)
|
||||
|
||||
#define RXLOCKED_OFST (0)
|
||||
#define RXLOCKED_MSK (0x0000000f << RXLOCKED_OFST)
|
||||
|
||||
#define TRANSCEIVERCONTROL (0xC120)
|
||||
#define TRANSCEIVERCONTROL (0xB820)
|
||||
|
||||
#define GTWIZRESETALL_OFST (0)
|
||||
#define GTWIZRESETALL_MSK (0x00000001 << GTWIZRESETALL_OFST)
|
||||
#define GTWIZRESETALL_OFST (0)
|
||||
#define GTWIZRESETALL_MSK (0x00000001 << GTWIZRESETALL_OFST)
|
||||
#define RESETTXPLLANDDATAPATH_OFST (1)
|
||||
#define RESETTXPLLANDDATAPATH_MSK (0x00000001 << RESETTXPLLANDDATAPATH_OFST)
|
||||
#define RESETTXDATAPATHIN_OFST (2)
|
||||
#define RESETTXDATAPATHIN_MSK (0x00000001 << RESETTXDATAPATHIN_OFST)
|
||||
#define RESETTXDATAPATHIN_OFST (2)
|
||||
#define RESETTXDATAPATHIN_MSK (0x00000001 << RESETTXDATAPATHIN_OFST)
|
||||
#define RESETRXPLLANDDATAPATH_OFST (3)
|
||||
#define RESETRXPLLANDDATAPATH_MSK (0x00000001 << RESETRXPLLANDDATAPATH_OFST)
|
||||
#define RESETRXDATAPATHIN_OFST (4)
|
||||
#define RESETRXDATAPATHIN_MSK (0x00000001 << RESETRXDATAPATHIN_OFST)
|
||||
#define RXPOLARITY_OFST (5)
|
||||
#define RXPOLARITY_MSK (0x0000000f << RXPOLARITY_OFST)
|
||||
#define RXERRORCNTRESET_OFST (9)
|
||||
#define RXERRORCNTRESET_MSK (0x0000000f << RXERRORCNTRESET_OFST)
|
||||
#define RXMSBLSBINVERT_OFST (13)
|
||||
#define RXMSBLSBINVERT_MSK (0x0000000f << RXMSBLSBINVERT_OFST)
|
||||
#define RESETRXDATAPATHIN_OFST (4)
|
||||
#define RESETRXDATAPATHIN_MSK (0x00000001 << RESETRXDATAPATHIN_OFST)
|
||||
#define RXPOLARITY_OFST (5)
|
||||
#define RXPOLARITY_MSK (0x0000000f << RXPOLARITY_OFST)
|
||||
#define RXERRORCNTRESET_OFST (9)
|
||||
#define RXERRORCNTRESET_MSK (0x0000000f << RXERRORCNTRESET_OFST)
|
||||
#define RXMSBLSBINVERT_OFST (13)
|
||||
#define RXMSBLSBINVERT_MSK (0x0000000f << RXMSBLSBINVERT_OFST)
|
||||
|
||||
#define TRANSCEIVERERRCNT_REG0 (0xC124)
|
||||
#define TRANSCEIVERERRCNT_REG0 (0xB824)
|
||||
|
||||
#define TRANSCEIVERERRCNT_REG1 (0xC128)
|
||||
#define TRANSCEIVERERRCNT_REG1 (0xB828)
|
||||
|
||||
#define TRANSCEIVERERRCNT_REG2 (0xC12C)
|
||||
#define TRANSCEIVERERRCNT_REG2 (0xB82C)
|
||||
|
||||
#define TRANSCEIVERERRCNT_REG3 (0xC130)
|
||||
#define TRANSCEIVERERRCNT_REG3 (0xB830)
|
||||
|
||||
#define TRANSCEIVERALIGNCNT_REG0 (0xC134)
|
||||
#define TRANSCEIVERALIGNCNT_REG0 (0xB834)
|
||||
|
||||
#define RXALIGNCNTCH0_OFST (0)
|
||||
#define RXALIGNCNTCH0_MSK (0x0000ffff << RXALIGNCNTCH0_OFST)
|
||||
|
||||
#define TRANSCEIVERALIGNCNT_REG1 (0xC138)
|
||||
#define TRANSCEIVERALIGNCNT_REG1 (0xB838)
|
||||
|
||||
#define RXALIGNCNTCH1_OFST (0)
|
||||
#define RXALIGNCNTCH1_MSK (0x0000ffff << RXALIGNCNTCH1_OFST)
|
||||
|
||||
#define TRANSCEIVERALIGNCNT_REG2 (0xC13C)
|
||||
#define TRANSCEIVERALIGNCNT_REG2 (0xB83C)
|
||||
|
||||
#define RXALIGNCNTCH2_OFST (0)
|
||||
#define RXALIGNCNTCH2_MSK (0x0000ffff << RXALIGNCNTCH2_OFST)
|
||||
|
||||
#define TRANSCEIVERALIGNCNT_REG3 (0xC140)
|
||||
#define TRANSCEIVERALIGNCNT_REG3 (0xB840)
|
||||
|
||||
#define RXALIGNCNTCH3_OFST (0)
|
||||
#define RXALIGNCNTCH3_MSK (0x0000ffff << RXALIGNCNTCH3_OFST)
|
||||
|
||||
#define TRANSCEIVERLASTWORD_REG0 (0xC144)
|
||||
#define TRANSCEIVERLASTWORD_REG0 (0xB844)
|
||||
|
||||
#define RXDATACH0_OFST (0)
|
||||
#define RXDATACH0_MSK (0x0000ffff << RXDATACH0_OFST)
|
||||
|
||||
#define TRANSCEIVERLASTWORD_REG1 (0xC148)
|
||||
#define TRANSCEIVERLASTWORD_REG1 (0xB848)
|
||||
|
||||
#define RXDATACH1_OFST (0)
|
||||
#define RXDATACH1_MSK (0x0000ffff << RXDATACH1_OFST)
|
||||
|
||||
#define TRANSCEIVERLASTWORD_REG2 (0xC14C)
|
||||
#define TRANSCEIVERLASTWORD_REG2 (0xB84C)
|
||||
|
||||
#define RXDATACH2_OFST (0)
|
||||
#define RXDATACH2_MSK (0x0000ffff << RXDATACH2_OFST)
|
||||
|
||||
#define TRANSCEIVERLASTWORD_REG3 (0xC150)
|
||||
#define TRANSCEIVERLASTWORD_REG3 (0xB850)
|
||||
|
||||
#define RXDATACH3_OFST (0)
|
||||
#define RXDATACH3_MSK (0x0000ffff << RXDATACH3_OFST)
|
||||
|
||||
|
||||
// ----------------------------------------------------
|
||||
// TODO: fix these in the firmware reg generator:
|
||||
// ----------------------------------------------------:
|
||||
|
||||
#define DELAY_OUT_REG_1 (0xB054)
|
||||
#define DELAY_OUT_REG_2 (0xB058)
|
||||
#define CYCLES_OUT_REG_1 (0xB05C)
|
||||
#define CYCLES_OUT_REG_2 (0xB060)
|
||||
#define FRAMES_OUT_REG_1 (0xB064)
|
||||
#define FRAMES_OUT_REG_2 (0xB068)
|
||||
#define PERIOD_OUT_REG_1 (0xB06C)
|
||||
#define PERIOD_OUT_REG_2 (0xB070)
|
||||
|
||||
// clang-format on
|
||||
|
||||
Binary file not shown.
@@ -1,24 +1,24 @@
|
||||
# Prepare MH02 configuration
|
||||
reg 0xC00C 0x00040041
|
||||
reg 0xC010 0x01200004
|
||||
reg 0xB1B0 0x00000041
|
||||
reg 0xB1B4 0x01200004
|
||||
|
||||
# configure Matterhorn SPI
|
||||
setbit 0xC014 0
|
||||
setbit 0xB1B8 0
|
||||
|
||||
# wait till config is done
|
||||
pollbit 0xC014 3 0
|
||||
pollbit 0xB1B8 3 0
|
||||
|
||||
# reset transceiver
|
||||
reg 0xC120 0x0
|
||||
reg 0xC120 0x1
|
||||
reg 0xC120 0x0
|
||||
reg 0xB820 0x0
|
||||
reg 0xB820 0x1
|
||||
reg 0xB820 0x0
|
||||
|
||||
# set MSB LSB inversions and polarity for transceiver
|
||||
reg 0xC120 0x1e0
|
||||
reg 0xB820 0x61e0
|
||||
|
||||
# Enable MH02 PLL clock
|
||||
pattern enable_clock_pattern.pyat
|
||||
# start the flow
|
||||
setbit 0xB030 0
|
||||
clearbit 0xB030 0
|
||||
setbit 0xB004 0
|
||||
clearbit 0xB004 0
|
||||
sleep 1
|
||||
|
||||
@@ -1,29 +1,30 @@
|
||||
|
||||
# turn off clock
|
||||
clearbit 0xB018 15
|
||||
setbit 0xB010 15
|
||||
setbit 0xB1B0 16
|
||||
setbit 0xB1B8 0
|
||||
sleep 1
|
||||
|
||||
# reset Matterhorn periphery
|
||||
setbit 0xC014 1
|
||||
setbit 0xB1B8 1
|
||||
sleep 1
|
||||
|
||||
# turn on clock
|
||||
clearbit 0xB010 15
|
||||
clearbit 0xB1B0 16
|
||||
setbit 0xB1B8 0
|
||||
sleep 1
|
||||
|
||||
# reset rx transceiver datapath
|
||||
setbit 0xC120 4
|
||||
setbit 0xB820 4
|
||||
sleep 1
|
||||
|
||||
# reset 8b10b counters
|
||||
setbit 0xC120 9
|
||||
setbit 0xC120 10
|
||||
setbit 0xC120 11
|
||||
setbit 0xC120 12
|
||||
setbit 0xB820 9
|
||||
setbit 0xB820 10
|
||||
setbit 0xB820 11
|
||||
setbit 0xB820 12
|
||||
sleep 1
|
||||
clearbit 0xC120 9
|
||||
clearbit 0xC120 10
|
||||
clearbit 0xB820 9
|
||||
clearbit 0xB820 10
|
||||
|
||||
# reset buffer fifos
|
||||
reg 0x9024 0xFFFFFFFF
|
||||
|
||||
@@ -9,7 +9,6 @@
|
||||
#include "sls/versionAPI.h"
|
||||
|
||||
#include "LTC2620_Driver.h"
|
||||
#include "XILINX_PLL.h"
|
||||
|
||||
#include "loadPattern.h"
|
||||
#ifdef VIRTUAL
|
||||
@@ -40,7 +39,6 @@ char initErrorMessage[MAX_STR_LENGTH];
|
||||
|
||||
int detPos[2] = {0, 0};
|
||||
|
||||
uint32_t clkFrequency[NUM_CLOCKS] = {};
|
||||
int chipConfigured = 0;
|
||||
int analogEnable = 0;
|
||||
int digitalEnable = 0;
|
||||
@@ -375,10 +373,6 @@ void setupDetector() {
|
||||
LOG(logINFO, ("Setting up Server for 1 Xilinx Chip Test Board\n"));
|
||||
|
||||
// default variables
|
||||
clkFrequency[RUN_CLK] = DEFAULT_RUN_CLK;
|
||||
clkFrequency[ADC_CLK] = DEFAULT_ADC_CLK;
|
||||
clkFrequency[SYNC_CLK] = DEFAULT_SYNC_CLK;
|
||||
clkFrequency[DBIT_CLK] = DEFAULT_DBIT_CLK;
|
||||
chipConfigured = 0;
|
||||
analogEnable = 0;
|
||||
digitalEnable = 0;
|
||||
@@ -440,18 +434,14 @@ void cleanFifos() {
|
||||
#ifdef VIRTUAL
|
||||
return;
|
||||
#endif
|
||||
uint32_t t_enable_mask = getTransceiverEnableMask();
|
||||
uint32_t tclean_msk =
|
||||
((t_enable_mask << X_FIFO_CLEAN_OFST) & X_FIFO_CLEAN_MSK);
|
||||
uint32_t t_before_reg = bus_r(X_FIFO_CLEAN_REG);
|
||||
LOG(logINFO, ("Clearing Acquisition Fifos\n"));
|
||||
bus_w(A_FIFO_CLEAN_REG, bus_r(A_FIFO_CLEAN_REG) | BIT32_MSK);
|
||||
bus_w(D_FIFO_CLEAN_REG, bus_r(D_FIFO_CLEAN_REG) | D_FIFO_CLEAN_MSK);
|
||||
bus_w(X_FIFO_CLEAN_REG, t_before_reg | tclean_msk);
|
||||
bus_w(X_FIFO_CLEAN_REG, bus_r(X_FIFO_CLEAN_REG) | X_FIFO_CLEAN_MSK);
|
||||
|
||||
bus_w(A_FIFO_CLEAN_REG, 0);
|
||||
bus_w(D_FIFO_CLEAN_REG, bus_r(D_FIFO_CLEAN_REG) & ~D_FIFO_CLEAN_MSK);
|
||||
bus_w(X_FIFO_CLEAN_REG, t_before_reg);
|
||||
bus_w(X_FIFO_CLEAN_REG, bus_r(X_FIFO_CLEAN_REG) & ~X_FIFO_CLEAN_MSK);
|
||||
}
|
||||
|
||||
void resetFlow() {
|
||||
@@ -1068,12 +1058,12 @@ int setPeriod(int64_t val) {
|
||||
return FAIL;
|
||||
}
|
||||
LOG(logINFO, ("Setting period %lld ns\n", (long long int)val));
|
||||
val *= (NS_TO_CLK_CYCLE * clkFrequency[RUN_CLK]);
|
||||
val *= (1E-3 * RUN_CLK);
|
||||
setU64BitReg(val, PERIOD_IN_REG_1, PERIOD_IN_REG_2);
|
||||
|
||||
// validate for tolerance
|
||||
int64_t retval = getPeriod();
|
||||
val /= (NS_TO_CLK_CYCLE * clkFrequency[RUN_CLK]);
|
||||
val /= (1E-3 * RUN_CLK);
|
||||
if (val != retval) {
|
||||
return FAIL;
|
||||
}
|
||||
@@ -1081,8 +1071,7 @@ int setPeriod(int64_t val) {
|
||||
}
|
||||
|
||||
int64_t getPeriod() {
|
||||
return getU64BitReg(PERIOD_IN_REG_1, PERIOD_IN_REG_2) /
|
||||
(NS_TO_CLK_CYCLE * clkFrequency[RUN_CLK]);
|
||||
return getU64BitReg(PERIOD_IN_REG_1, PERIOD_IN_REG_2) / (1E-3 * RUN_CLK);
|
||||
}
|
||||
|
||||
int setDelayAfterTrigger(int64_t val) {
|
||||
@@ -1091,12 +1080,12 @@ int setDelayAfterTrigger(int64_t val) {
|
||||
return FAIL;
|
||||
}
|
||||
LOG(logINFO, ("Setting delay after trigger %ld ns\n", val));
|
||||
val *= (NS_TO_CLK_CYCLE * clkFrequency[RUN_CLK]);
|
||||
val *= (1E-3 * RUN_CLK);
|
||||
setU64BitReg(val, DELAY_IN_REG_1, DELAY_IN_REG_2);
|
||||
|
||||
// validate for tolerance
|
||||
int64_t retval = getDelayAfterTrigger();
|
||||
val /= (NS_TO_CLK_CYCLE * clkFrequency[RUN_CLK]);
|
||||
val /= (1E-3 * RUN_CLK);
|
||||
if (val != retval) {
|
||||
return FAIL;
|
||||
}
|
||||
@@ -1104,8 +1093,7 @@ int setDelayAfterTrigger(int64_t val) {
|
||||
}
|
||||
|
||||
int64_t getDelayAfterTrigger() {
|
||||
return getU64BitReg(DELAY_IN_REG_1, DELAY_IN_REG_2) /
|
||||
(NS_TO_CLK_CYCLE * clkFrequency[RUN_CLK]);
|
||||
return getU64BitReg(DELAY_IN_REG_1, DELAY_IN_REG_2) / (1E-3 * RUN_CLK);
|
||||
}
|
||||
|
||||
int64_t getNumFramesLeft() {
|
||||
@@ -1117,13 +1105,11 @@ int64_t getNumTriggersLeft() {
|
||||
}
|
||||
|
||||
int64_t getDelayAfterTriggerLeft() {
|
||||
return getU64BitReg(DELAY_OUT_REG_1, DELAY_OUT_REG_2) /
|
||||
(NS_TO_CLK_CYCLE * clkFrequency[RUN_CLK]);
|
||||
return getU64BitReg(DELAY_OUT_REG_1, DELAY_OUT_REG_2) / (1E-3 * RUN_CLK);
|
||||
}
|
||||
|
||||
int64_t getPeriodLeft() {
|
||||
return getU64BitReg(PERIOD_OUT_REG_1, PERIOD_OUT_REG_2) /
|
||||
(NS_TO_CLK_CYCLE * clkFrequency[RUN_CLK]);
|
||||
return getU64BitReg(PERIOD_OUT_REG_1, PERIOD_OUT_REG_2) / (1E-3 * RUN_CLK);
|
||||
}
|
||||
|
||||
int64_t getFramesFromStart() {
|
||||
@@ -1133,12 +1119,12 @@ int64_t getFramesFromStart() {
|
||||
|
||||
int64_t getActualTime() {
|
||||
return getU64BitReg(TIME_FROM_START_OUT_REG_1, TIME_FROM_START_OUT_REG_2) /
|
||||
(NS_TO_CLK_CYCLE * clkFrequency[SYNC_CLK]);
|
||||
(1E-3 * TICK_CLK);
|
||||
}
|
||||
|
||||
int64_t getMeasurementTime() {
|
||||
return getU64BitReg(FRAME_TIME_OUT_REG_1, FRAME_TIME_OUT_REG_2) /
|
||||
(NS_TO_CLK_CYCLE * clkFrequency[SYNC_CLK]);
|
||||
(1E-3 * TICK_CLK);
|
||||
}
|
||||
|
||||
/* parameters - dac, adc, hv */
|
||||
@@ -1205,26 +1191,6 @@ void setVLimit(int l) {
|
||||
vLimit = l;
|
||||
}
|
||||
|
||||
int getBitOffsetFromDACIndex(enum DACINDEX ind) {
|
||||
switch (ind) {
|
||||
case D_PWR_IO:
|
||||
return POWER_VIO_OFST;
|
||||
case D_PWR_A:
|
||||
return POWER_VCC_A_OFST;
|
||||
case D_PWR_B:
|
||||
return POWER_VCC_B_OFST;
|
||||
case D_PWR_C:
|
||||
return POWER_VCC_C_OFST;
|
||||
case D_PWR_D:
|
||||
return POWER_VCC_D_OFST;
|
||||
default:
|
||||
LOG(logERROR,
|
||||
("DAC index %d is not defined to get offset in ctrl register\n",
|
||||
ind));
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
int isPowerValid(enum DACINDEX ind, int val) {
|
||||
char *powerNames[] = {PWR_NAMES};
|
||||
int pwrIndex = (int)(ind - D_PWR_D);
|
||||
@@ -1247,23 +1213,10 @@ int isPowerValid(enum DACINDEX ind, int val) {
|
||||
}
|
||||
|
||||
int getPower(enum DACINDEX ind) {
|
||||
// get bit offset in ctrl register
|
||||
int bitOffset = getBitOffsetFromDACIndex(ind);
|
||||
if (bitOffset == -1) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
// powered enable off
|
||||
{
|
||||
uint32_t addr = CTRL_REG;
|
||||
uint32_t mask = (1 << bitOffset);
|
||||
if (!(bus_r(addr) & mask))
|
||||
return 0;
|
||||
}
|
||||
|
||||
char *powerNames[] = {PWR_NAMES};
|
||||
int pwrIndex = (int)(ind - D_PWR_D);
|
||||
|
||||
// check dac value
|
||||
// not set yet
|
||||
if (dacValues[ind] == -1) {
|
||||
LOG(logERROR,
|
||||
@@ -1273,8 +1226,7 @@ int getPower(enum DACINDEX ind) {
|
||||
|
||||
// dac powered off
|
||||
if (dacValues[ind] == LTC2620_D_GetPowerDownValue()) {
|
||||
LOG(logWARNING, ("Power V%s enabled, but voltage is at minimum or 0.\n",
|
||||
powerNames[pwrIndex]));
|
||||
LOG(logWARNING, ("Power V%s is powered down\n", powerNames[pwrIndex]));
|
||||
return LTC2620_D_GetPowerDownValue();
|
||||
}
|
||||
|
||||
@@ -1288,43 +1240,26 @@ int getPower(enum DACINDEX ind) {
|
||||
}
|
||||
|
||||
void setPower(enum DACINDEX ind, int val) {
|
||||
// validate index and get bit offset in ctrl register
|
||||
int bitOffset = getBitOffsetFromDACIndex(ind);
|
||||
if (bitOffset == -1) {
|
||||
return;
|
||||
}
|
||||
uint32_t addr = CTRL_REG;
|
||||
uint32_t mask = (1 << bitOffset);
|
||||
|
||||
if (val == -1)
|
||||
return;
|
||||
|
||||
char *powerNames[] = {PWR_NAMES};
|
||||
int pwrIndex = (int)(ind - D_PWR_D);
|
||||
LOG(logINFO, ("Setting Power V%s to %d mV\n", powerNames[pwrIndex], val));
|
||||
|
||||
// validate value (already checked at tcp (funcs.c))
|
||||
if (!isPowerValid(ind, val)) {
|
||||
LOG(logERROR, ("Invalid power value for V%s: %d mV\n",
|
||||
powerNames[pwrIndex], val));
|
||||
return;
|
||||
}
|
||||
|
||||
// Switch off power enable
|
||||
LOG(logDEBUG1, ("Switching off power enable\n"));
|
||||
bus_w(addr, bus_r(addr) & ~(mask));
|
||||
|
||||
// power down dac
|
||||
LOG(logINFO, ("\tPowering down V%d\n", powerNames[pwrIndex]));
|
||||
setDAC(ind, LTC2620_D_GetPowerDownValue(), 0);
|
||||
if (val == LTC2620_D_GetPowerDownValue()) {
|
||||
LOG(logINFO, ("\tPowering down V%d\n", powerNames[pwrIndex]));
|
||||
setDAC(ind, LTC2620_D_GetPowerDownValue(), 0);
|
||||
}
|
||||
|
||||
//(power off is anyway done with power enable)
|
||||
if (val == 0)
|
||||
val = LTC2620_D_GetPowerDownValue();
|
||||
// set dac
|
||||
else if (val >= 0) {
|
||||
LOG(logINFO,
|
||||
("Setting Power V%s to %d mV\n", powerNames[pwrIndex], val));
|
||||
|
||||
// convert voltage to dac (power off is anyway done with power enable)
|
||||
if (val != LTC2620_D_GetPowerDownValue()) {
|
||||
// validate value (already checked at tcp (funcs.c))
|
||||
if (!isPowerValid(ind, val)) {
|
||||
return;
|
||||
}
|
||||
|
||||
// convert voltage to dac
|
||||
int dacval = -1;
|
||||
if (ConvertToDifferentRange(
|
||||
POWER_RGLTR_MIN, POWER_RGLTR_MAX, LTC2620_D_GetMaxInput(),
|
||||
@@ -1341,12 +1276,6 @@ void setPower(enum DACINDEX ind, int val) {
|
||||
LOG(logINFO, ("Setting Power V%s: %d mV (%d dac)\n",
|
||||
powerNames[pwrIndex], val, dacval));
|
||||
setDAC(ind, dacval, 0);
|
||||
|
||||
// if valid, enable power
|
||||
if (dacval >= 0) {
|
||||
LOG(logDEBUG1, ("Switching on power enable\n"));
|
||||
bus_w(addr, bus_r(addr) | mask);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1700,7 +1629,7 @@ int stopStateMachine() {
|
||||
#endif
|
||||
// stop state machine
|
||||
bus_w(FLOW_CONTROL_REG, bus_r(FLOW_CONTROL_REG) | STOP_F_MSK);
|
||||
cleanFifos();
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
@@ -1849,37 +1778,3 @@ void getNumberOfChannels(int *nchanx, int *nchany) {
|
||||
int getNumberOfChips() { return NCHIP; }
|
||||
int getNumberOfDACs() { return NDAC; }
|
||||
int getNumberOfChannelsPerChip() { return NCHAN; }
|
||||
|
||||
int setFrequency(enum CLKINDEX ind, int val) {
|
||||
if (ind < 0 || ind >= NUM_CLOCKS) {
|
||||
LOG(logERROR, ("Unknown clock index %d to set frequency\n", ind));
|
||||
return FAIL;
|
||||
}
|
||||
if (val <= 0) {
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
char *clock_names[] = {CLK_NAMES};
|
||||
LOG(logINFO, ("\tSetting %s clock (%d) frequency to %d kHz\n",
|
||||
clock_names[ind], ind, val));
|
||||
|
||||
if (XILINX_PLL_setFrequency(ind, val) == FAIL) {
|
||||
LOG(logERROR, ("\tCould not set %s clock (%d) frequency to %d kHz\n",
|
||||
clock_names[ind], ind, val));
|
||||
return FAIL;
|
||||
}
|
||||
clkFrequency[ind] = val;
|
||||
// TODO later: connect setPhase as phase gets reset on freq change
|
||||
return OK;
|
||||
}
|
||||
|
||||
int getFrequency(enum CLKINDEX ind) {
|
||||
if (ind < 0 || ind >= NUM_CLOCKS) {
|
||||
LOG(logERROR, ("Unknown clock index %d to get frequency\n", ind));
|
||||
return -1;
|
||||
}
|
||||
#ifndef VIRTUAL
|
||||
clkFrequency[ind] = XILINX_PLL_getFrequency(ind);
|
||||
#endif
|
||||
return clkFrequency[ind];
|
||||
}
|
||||
@@ -71,6 +71,12 @@
|
||||
#define POWER_RGLTR_MAX (2661)
|
||||
#define VIO_MIN_MV (1200) // for fpga to function
|
||||
|
||||
#define TICK_CLK (20) // MHz (trig_timeFromStart, frametime, timeFromStart)
|
||||
#define RUN_CLK \
|
||||
(100) // MHz (framesFromStart, c_swTrigger, run, waitForTrigger, starting,
|
||||
// acquiring, waitForPeriod, internalStop, c_framesFromSTart_reset,
|
||||
// s_start, c_stop, triggerEnable, period, frames, cycles, delay)
|
||||
|
||||
/* Defines in the Firmware */
|
||||
#define WAIT_TIME_PATTERN_READ (10)
|
||||
#define WAIT_TIME_OUT_0US_TIMES (35000) // 2s
|
||||
@@ -152,12 +158,3 @@ typedef struct udp_header_struct {
|
||||
|
||||
#define IP_HEADER_SIZE (20)
|
||||
#define UDP_IP_HEADER_LENGTH_BYTES (28)
|
||||
|
||||
enum CLKINDEX { RUN_CLK, ADC_CLK, SYNC_CLK, DBIT_CLK, NUM_CLOCKS };
|
||||
#define CLK_NAMES "run", "adc", "sync", "dbit"
|
||||
|
||||
#define DEFAULT_RUN_CLK (20000) // 20 MHz
|
||||
#define DEFAULT_ADC_CLK (100000) // 100 MHz
|
||||
#define DEFAULT_SYNC_CLK (20000) // 20 MHz
|
||||
#define DEFAULT_DBIT_CLK (100000) // 100 MHz
|
||||
#define NS_TO_CLK_CYCLE (1E-6) // ns to kHz
|
||||
|
||||
@@ -28,11 +28,12 @@ target_link_libraries(slsDetectorObject
|
||||
PUBLIC
|
||||
slsProjectOptions
|
||||
slsSupportStatic
|
||||
pthread
|
||||
rt
|
||||
PRIVATE
|
||||
slsProjectWarnings
|
||||
)
|
||||
|
||||
|
||||
set(DETECTOR_LIBRARY_TARGETS slsDetectorObject)
|
||||
|
||||
|
||||
@@ -97,7 +98,8 @@ if(SLS_USE_TEXTCLIENT)
|
||||
add_executable(${val1} src/CmdApp.cpp)
|
||||
|
||||
target_link_libraries(${val1}
|
||||
slsDetectorStatic
|
||||
slsDetectorStatic
|
||||
pthread
|
||||
)
|
||||
SET_SOURCE_FILES_PROPERTIES( src/Caller.cpp PROPERTIES COMPILE_FLAGS "-Wno-unused-variable -Wno-unused-but-set-variable")
|
||||
|
||||
|
||||
@@ -1272,7 +1272,7 @@ asamples:
|
||||
function: setNumberOfAnalogSamples
|
||||
|
||||
adcclk:
|
||||
help: "[n_clk in MHz]\n\t[Ctb] ADC clock frequency in MHz.\n\t[xilinx Ctb] ADC clock frequency in kHz."
|
||||
help: "[n_clk in MHz]\n\t[Ctb] ADC clock frequency in MHz."
|
||||
inherit_actions: INTEGER_COMMAND_VEC_ID
|
||||
actions:
|
||||
GET:
|
||||
@@ -1281,7 +1281,7 @@ adcclk:
|
||||
function: setADCClock
|
||||
|
||||
runclk:
|
||||
help: "[n_clk in MHz]\n\t[Ctb] Run clock in MHz.\n\t[xilinx Ctb] Run clock in kHz."
|
||||
help: "[n_clk in MHz]\n\t[Ctb] Run clock in MHz."
|
||||
inherit_actions: INTEGER_COMMAND_VEC_ID
|
||||
actions:
|
||||
GET:
|
||||
@@ -1318,7 +1318,7 @@ romode:
|
||||
input_types: [ defs::readoutMode ]
|
||||
|
||||
dbitclk:
|
||||
help: "[n_clk in MHz]\n\t[Ctb] Clock for latching the digital bits in MHz.\n\t[xilinx Ctb] Clock for latching the digital bits in kHz."
|
||||
help: "[n_clk in MHz]\n\t[Ctb] Clock for latching the digital bits in MHz."
|
||||
inherit_actions: INTEGER_COMMAND_VEC_ID
|
||||
actions:
|
||||
GET:
|
||||
@@ -1791,7 +1791,7 @@ defaultpattern:
|
||||
|
||||
patternstart:
|
||||
inherit_actions: EXECUTE_SET_COMMAND
|
||||
help: "\n\t[Mythen3][Ctb][Xilinx Ctb] Starts Pattern"
|
||||
help: "\n\t[Mythen3] Starts Pattern"
|
||||
actions:
|
||||
PUT:
|
||||
function: startPattern
|
||||
|
||||
@@ -106,8 +106,7 @@ adcclk:
|
||||
store_result_in_t: false
|
||||
command_name: adcclk
|
||||
function_alias: adcclk
|
||||
help: "[n_clk in MHz]\n\t[Ctb] ADC clock frequency in MHz.\n\t[xilinx Ctb] ADC clock\
|
||||
\ frequency in kHz."
|
||||
help: "[n_clk in MHz]\n\t[Ctb] ADC clock frequency in MHz."
|
||||
infer_action: true
|
||||
template: true
|
||||
adcenable:
|
||||
@@ -2220,8 +2219,7 @@ dbitclk:
|
||||
store_result_in_t: false
|
||||
command_name: dbitclk
|
||||
function_alias: dbitclk
|
||||
help: "[n_clk in MHz]\n\t[Ctb] Clock for latching the digital bits in MHz.\n\t[xilinx\
|
||||
\ Ctb] Clock for latching the digital bits in kHz."
|
||||
help: "[n_clk in MHz]\n\t[Ctb] Clock for latching the digital bits in MHz."
|
||||
infer_action: true
|
||||
template: true
|
||||
dbitphase:
|
||||
@@ -6517,7 +6515,7 @@ patternstart:
|
||||
store_result_in_t: false
|
||||
command_name: patternstart
|
||||
function_alias: patternstart
|
||||
help: "\n\t[Mythen3][Ctb][Xilinx Ctb] Starts Pattern"
|
||||
help: "\n\t[Mythen3] Starts Pattern"
|
||||
infer_action: true
|
||||
template: true
|
||||
patwait:
|
||||
@@ -8135,7 +8133,7 @@ runclk:
|
||||
store_result_in_t: false
|
||||
command_name: runclk
|
||||
function_alias: runclk
|
||||
help: "[n_clk in MHz]\n\t[Ctb] Run clock in MHz.\n\t[xilinx Ctb] Run clock in kHz."
|
||||
help: "[n_clk in MHz]\n\t[Ctb] Run clock in MHz."
|
||||
infer_action: true
|
||||
template: true
|
||||
runtime:
|
||||
|
||||
@@ -1612,16 +1612,16 @@ class Detector {
|
||||
/** [CTB] */
|
||||
void setNumberOfAnalogSamples(int value, Positions pos = {});
|
||||
|
||||
/** [CTB] in MHz, [XCTB] in kHz */
|
||||
/** [CTB] */
|
||||
Result<int> getADCClock(Positions pos = {}) const;
|
||||
|
||||
/** [CTB] in MHz, [XCTB] in kHz */
|
||||
/** [CTB] */
|
||||
void setADCClock(int value_in_MHz, Positions pos = {});
|
||||
|
||||
/** [CTB] in MHz, [XCTB] in kHz */
|
||||
/** [CTB] */
|
||||
Result<int> getRUNClock(Positions pos = {}) const;
|
||||
|
||||
/** [CTB] in MHz, [XCTB] in kHz */
|
||||
/** [CTB] */
|
||||
void setRUNClock(int value_in_MHz, Positions pos = {});
|
||||
|
||||
/** [CTB] in MHZ */
|
||||
@@ -1691,10 +1691,10 @@ class Detector {
|
||||
*/
|
||||
void setReadoutMode(defs::readoutMode value, Positions pos = {});
|
||||
|
||||
/** [CTB] in MHz, [XCTB] in kHz */
|
||||
/** [CTB] */
|
||||
Result<int> getDBITClock(Positions pos = {}) const;
|
||||
|
||||
/** [CTB] in MHz, [XCTB] in kHz */
|
||||
/** [CTB] */
|
||||
void setDBITClock(int value_in_MHz, Positions pos = {});
|
||||
|
||||
/**
|
||||
@@ -1943,7 +1943,7 @@ class Detector {
|
||||
* selected bits */
|
||||
void setPatternBitMask(uint64_t mask, Positions pos = {});
|
||||
|
||||
/** [CTB][Mythen3][Xilinx CTB] */
|
||||
/** [Mythen3] */
|
||||
void startPattern(Positions pos = {});
|
||||
///@}
|
||||
|
||||
|
||||
@@ -25,21 +25,21 @@ class detectorData {
|
||||
~detectorData(){};
|
||||
|
||||
int64_t getChannel(int i) {
|
||||
const int off = dynamicRange / 8;
|
||||
int off = dynamicRange / 8;
|
||||
if (off == 1) {
|
||||
const char val = *(data + i);
|
||||
char val = *(data + i);
|
||||
return val;
|
||||
}
|
||||
if (off == 2) {
|
||||
const int16_t val = *((int16_t *)(data + i * off));
|
||||
int16_t val = *((int16_t *)(data + i * off));
|
||||
return val;
|
||||
}
|
||||
if (off == 4) {
|
||||
const int32_t val = *((int32_t *)(data + i * off));
|
||||
int32_t val = *((int32_t *)(data + i * off));
|
||||
return val;
|
||||
}
|
||||
if (off == 8) {
|
||||
const int64_t val = *((int64_t *)(data + i * off));
|
||||
int64_t val = *((int64_t *)(data + i * off));
|
||||
return val;
|
||||
}
|
||||
return -1;
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -102,7 +102,7 @@ std::string Caller::list(int action) {
|
||||
/* Network Configuration (Detector<->Receiver) */
|
||||
|
||||
IpAddr Caller::getDstIpFromAuto() {
|
||||
std::string const rxHostname =
|
||||
std::string rxHostname =
|
||||
det->getRxHostname(std::vector<int>{det_id}).squash("none");
|
||||
// Hostname could be ip try to decode otherwise look up the hostname
|
||||
auto val = IpAddr{rxHostname};
|
||||
@@ -113,7 +113,7 @@ IpAddr Caller::getDstIpFromAuto() {
|
||||
}
|
||||
|
||||
IpAddr Caller::getSrcIpFromAuto() {
|
||||
std::string const hostname =
|
||||
std::string hostname =
|
||||
det->getHostname(std::vector<int>{det_id}).squash("none");
|
||||
// Hostname could be ip try to decode otherwise look up the hostname
|
||||
auto val = IpAddr{hostname};
|
||||
@@ -128,9 +128,9 @@ UdpDestination Caller::getUdpEntry() {
|
||||
udpDestination.entry = rx_id;
|
||||
|
||||
for (auto it : args) {
|
||||
size_t const pos = it.find('=');
|
||||
std::string const key = it.substr(0, pos);
|
||||
std::string const value = it.substr(pos + 1);
|
||||
size_t pos = it.find('=');
|
||||
std::string key = it.substr(0, pos);
|
||||
std::string value = it.substr(pos + 1);
|
||||
if (key == "ip") {
|
||||
if (value == "auto") {
|
||||
auto val = getDstIpFromAuto();
|
||||
@@ -177,7 +177,7 @@ int Caller::GetLevelAndInsertIntoArgs(std::string levelSeparatedCommand) {
|
||||
LOG(logWARNING) << "This command is deprecated and will be removed. "
|
||||
"Please migrate to "
|
||||
<< levelSeparatedCommand;
|
||||
int const level = cmd[cmd.find_first_of("012")] - '0';
|
||||
int level = cmd[cmd.find_first_of("012")] - '0';
|
||||
args.insert(args.begin(), std::to_string(level));
|
||||
return true;
|
||||
}
|
||||
@@ -295,8 +295,8 @@ std::string Caller::versions(int action) {
|
||||
bool receiver = false;
|
||||
std::string vReceiver = "Unknown";
|
||||
|
||||
std::string const vRelease = det->getPackageVersion();
|
||||
std::string const vClient = det->getClientVersion();
|
||||
std::string vRelease = det->getPackageVersion();
|
||||
std::string vClient = det->getClientVersion();
|
||||
|
||||
if (det->size() != 0) {
|
||||
// shared memory has detectors
|
||||
@@ -382,7 +382,7 @@ std::string Caller::threshold(int action) {
|
||||
if (!args.empty()) {
|
||||
WrongNumberOfParameters(0);
|
||||
}
|
||||
defs::detectorType const type = det->getDetectorType().squash();
|
||||
defs::detectorType type = det->getDetectorType().squash();
|
||||
if (type == defs::EIGER) {
|
||||
auto t = det->getThresholdEnergy(std::vector<int>{det_id});
|
||||
os << OutString(t) << '\n';
|
||||
@@ -393,7 +393,7 @@ std::string Caller::threshold(int action) {
|
||||
throw RuntimeError("Not implemented for this detector\n");
|
||||
}
|
||||
} else if (action == defs::PUT_ACTION) {
|
||||
defs::detectorType const type = det->getDetectorType().squash();
|
||||
defs::detectorType type = det->getDetectorType().squash();
|
||||
if (type == defs::EIGER && args.size() != 1 && args.size() != 2) {
|
||||
WrongNumberOfParameters(1);
|
||||
}
|
||||
@@ -401,7 +401,7 @@ std::string Caller::threshold(int action) {
|
||||
WrongNumberOfParameters(1);
|
||||
}
|
||||
|
||||
bool const trimbits = (cmd == "thresholdnotb") ? false : true;
|
||||
bool trimbits = (cmd == "thresholdnotb") ? false : true;
|
||||
std::array<int, 3> energy = {StringTo<int>(args[0]), 0, 0};
|
||||
energy[1] = energy[0];
|
||||
energy[2] = energy[0];
|
||||
@@ -708,7 +708,7 @@ std::string Caller::rx_hostname(int action) {
|
||||
return os.str();
|
||||
}
|
||||
std::string Caller::rx_zmqip(int action) {
|
||||
std::string const helpMessage =
|
||||
std::string helpMessage =
|
||||
"\n\t[deprecated] The receiver zmq socket (publisher) will "
|
||||
"listen to all interfaces ('tcp://0.0.0.0:[port]'to all interfaces "
|
||||
"(from v9.0.0). This command does nothing and will be removed "
|
||||
@@ -729,7 +729,7 @@ std::string Caller::rx_zmqip(int action) {
|
||||
|
||||
std::string Caller::rx_roi(int action) {
|
||||
std::ostringstream os;
|
||||
std::string const helpMessage =
|
||||
std::string helpMessage =
|
||||
std::string("[xmin] [xmax] [ymin] [ymax]\n") +
|
||||
"\tDefines a single region of interest (ROI) in the receiver.\n"
|
||||
"\tFor example, to set a single ROI: 0 100 20 30\n\n"
|
||||
@@ -771,7 +771,7 @@ std::string Caller::rx_roi(int action) {
|
||||
}
|
||||
// Support multiple args with bracketed ROIs, or single arg with
|
||||
// semicolon-separated vector in quotes
|
||||
bool const isVectorInput =
|
||||
bool isVectorInput =
|
||||
std::all_of(args.begin(), args.end(), [](const std::string &a) {
|
||||
return a.find('[') != std::string::npos &&
|
||||
a.find(']') != std::string::npos;
|
||||
@@ -870,7 +870,7 @@ std::string Caller::ratecorr(int action) {
|
||||
if (args.size() != 1) {
|
||||
WrongNumberOfParameters(1);
|
||||
}
|
||||
int const tau = StringTo<int>(args[0]);
|
||||
int tau = StringTo<int>(args[0]);
|
||||
if (tau == -1) {
|
||||
det->setDefaultRateCorrection(std::vector<int>{det_id});
|
||||
auto t = det->getRateCorrection(std::vector<int>{det_id});
|
||||
@@ -905,7 +905,7 @@ std::string Caller::burstmode(int action) {
|
||||
}
|
||||
defs::burstMode t;
|
||||
try {
|
||||
int const ival = StringTo<int>(args[0]);
|
||||
int ival = StringTo<int>(args[0]);
|
||||
switch (ival) {
|
||||
case 0:
|
||||
t = defs::BURST_INTERNAL;
|
||||
@@ -1001,7 +1001,7 @@ std::string Caller::counters(int action) {
|
||||
// convert vector to counter enable mask
|
||||
uint32_t mask = 0;
|
||||
for (size_t i = 0; i < args.size(); ++i) {
|
||||
int const val = StringTo<int>(args[i]);
|
||||
int val = StringTo<int>(args[i]);
|
||||
// already enabled earlier
|
||||
if (mask & (1 << val)) {
|
||||
std::ostringstream oss;
|
||||
@@ -1036,9 +1036,9 @@ std::string Caller::samples(int action) {
|
||||
auto d = det->getNumberOfDigitalSamples(std::vector<int>{det_id});
|
||||
auto t =
|
||||
det->getNumberOfTransceiverSamples(std::vector<int>{det_id});
|
||||
int const as = a.squash(-1);
|
||||
int const ds = d.squash(-1);
|
||||
int const ts = t.squash(-1);
|
||||
int as = a.squash(-1);
|
||||
int ds = d.squash(-1);
|
||||
int ts = t.squash(-1);
|
||||
if (as == -1 || ds == -1 || ts == -1 || as != ds ||
|
||||
as != ts) { // check if a == d?
|
||||
throw RuntimeError(
|
||||
@@ -1077,7 +1077,7 @@ std::string Caller::slowadc(int action) {
|
||||
if (args.size() != 1) {
|
||||
WrongNumberOfParameters(0);
|
||||
}
|
||||
int const nchan = StringTo<int>(args[0]);
|
||||
int nchan = StringTo<int>(args[0]);
|
||||
if (nchan < 0 || nchan > 7) {
|
||||
throw RuntimeError("Unknown adc argument " + args[0]);
|
||||
}
|
||||
@@ -1109,7 +1109,7 @@ std::string Caller::patwaittime(int action) {
|
||||
}
|
||||
|
||||
// parse level
|
||||
bool const deprecated_cmd = GetLevelAndInsertIntoArgs("patwaittime");
|
||||
bool deprecated_cmd = GetLevelAndInsertIntoArgs("patwaittime");
|
||||
int level = 0;
|
||||
try {
|
||||
if (args.size() > 0)
|
||||
@@ -1141,7 +1141,7 @@ std::string Caller::patwaittime(int action) {
|
||||
// clocks (all digits)
|
||||
if (args.size() == 2 &&
|
||||
std::all_of(args[1].begin(), args[1].end(), ::isdigit)) {
|
||||
uint64_t const waittime = StringTo<uint64_t>(args[1]);
|
||||
uint64_t waittime = StringTo<uint64_t>(args[1]);
|
||||
det->setPatternWaitClocks(level, waittime,
|
||||
std::vector<int>{det_id});
|
||||
os << waittime << '\n';
|
||||
@@ -1152,7 +1152,7 @@ std::string Caller::patwaittime(int action) {
|
||||
try {
|
||||
if (args.size() == 2) {
|
||||
std::string tmp_time(args[1]);
|
||||
std::string const unit = RemoveUnit(tmp_time);
|
||||
std::string unit = RemoveUnit(tmp_time);
|
||||
converted_time = StringTo<time::ns>(tmp_time, unit);
|
||||
} else {
|
||||
converted_time = StringTo<time::ns>(args[1], args[2]);
|
||||
@@ -1205,7 +1205,7 @@ std::string Caller::rx_dbitlist(int action) {
|
||||
}
|
||||
// 'none' option already covered as t is empty by default
|
||||
else if (args[0] != "none") {
|
||||
unsigned int const ntrim = args.size();
|
||||
unsigned int ntrim = args.size();
|
||||
t.resize(ntrim);
|
||||
for (unsigned int i = 0; i < ntrim; ++i) {
|
||||
t[i] = StringTo<int>(args[i]);
|
||||
@@ -1421,7 +1421,7 @@ std::string Caller::sleep(int action) {
|
||||
try {
|
||||
if (args.size() == 1) {
|
||||
std::string tmp_time(args[0]);
|
||||
std::string const unit = RemoveUnit(tmp_time);
|
||||
std::string unit = RemoveUnit(tmp_time);
|
||||
converted_time = StringTo<time::ns>(tmp_time, unit);
|
||||
} else {
|
||||
converted_time = StringTo<time::ns>(args[0], args[1]);
|
||||
|
||||
@@ -83,7 +83,7 @@ int main(int argc, char *argv[]) {
|
||||
try {
|
||||
if (action == -1) {
|
||||
action = inferAction.infer(parser);
|
||||
std::string const actionString =
|
||||
std::string actionString =
|
||||
(action == slsDetectorDefs::GET_ACTION) ? "GET" : "PUT";
|
||||
std::cout << "inferred action: " << actionString << std::endl;
|
||||
}
|
||||
|
||||
@@ -27,10 +27,6 @@ void CmdParser::Parse(std::string s) {
|
||||
// taking s by value we can modify it.
|
||||
Reset();
|
||||
|
||||
// If the string is empty there is nothing to parse
|
||||
if (s.empty())
|
||||
return;
|
||||
|
||||
// Are we looking at -h --help? avoid removing h from command starting
|
||||
// with h when combined with detector id (ex, 1-hostname)
|
||||
bool h = replace_first(&s, "--help", " ");
|
||||
|
||||
@@ -128,7 +128,7 @@ Detector &Detector::operator=(Detector &&other) noexcept = default;
|
||||
// Configuration
|
||||
|
||||
void Detector::loadConfig(const std::string &fname) {
|
||||
const int shm_id = getShmId();
|
||||
int shm_id = getShmId();
|
||||
freeSharedMemory(shm_id);
|
||||
pimpl = make_unique<DetectorImpl>(shm_id);
|
||||
LOG(logINFO) << "Loading configuration file: " << fname;
|
||||
@@ -205,7 +205,7 @@ int Detector::getShmId() const { return pimpl->getDetectorIndex(); }
|
||||
std::string Detector::getPackageVersion() const { return SLS_DET_VERSION; }
|
||||
|
||||
std::string Detector::getClientVersion() const {
|
||||
const Version v(APILIB);
|
||||
Version v(APILIB);
|
||||
return v.concise();
|
||||
}
|
||||
|
||||
@@ -266,7 +266,7 @@ defs::xy Detector::getPortPerModuleGeometry() const {
|
||||
|
||||
Result<defs::xy> Detector::getPortSize(Positions pos) const {
|
||||
Result<defs::xy> res = pimpl->Parallel(&Module::getNumberOfChannels, pos);
|
||||
const defs::xy portGeometry = getPortPerModuleGeometry();
|
||||
defs::xy portGeometry = getPortPerModuleGeometry();
|
||||
if ((portGeometry.x != 1 && portGeometry.x != 2) ||
|
||||
(portGeometry.y != 1 && portGeometry.y != 2)) {
|
||||
throw RuntimeError(
|
||||
@@ -346,9 +346,9 @@ Detector::getAllThresholdEnergy(Positions pos) const {
|
||||
void Detector::setThresholdEnergy(int threshold_ev,
|
||||
defs::detectorSettings settings,
|
||||
bool trimbits, Positions pos) {
|
||||
const defs::detectorType type = getDetectorType().squash();
|
||||
defs::detectorType type = getDetectorType().squash();
|
||||
if (type == defs::MYTHEN3) {
|
||||
const std::array<int, 3> energy = {threshold_ev, threshold_ev, threshold_ev};
|
||||
std::array<int, 3> energy = {threshold_ev, threshold_ev, threshold_ev};
|
||||
setThresholdEnergy(energy, settings, trimbits, pos);
|
||||
return;
|
||||
}
|
||||
@@ -753,6 +753,7 @@ void Detector::setImageTestMode(int value, Positions pos) {
|
||||
}
|
||||
|
||||
std::vector<defs::dacIndex> Detector::getTemperatureList() const {
|
||||
std::vector<defs::dacIndex> retval;
|
||||
switch (getDetectorType().squash()) {
|
||||
case defs::CHIPTESTBOARD:
|
||||
return std::vector<defs::dacIndex>{defs::SLOW_ADC_TEMP};
|
||||
@@ -1095,9 +1096,9 @@ void Detector::setNumberofUDPInterfaces_(int n, Positions pos) {
|
||||
if (!size()) {
|
||||
throw RuntimeError("No modules added.");
|
||||
}
|
||||
const bool previouslyClientStreaming = pimpl->getDataStreamingToClient();
|
||||
const uint16_t clientStartingPort = getClientZmqPort({0}).squash(0);
|
||||
const bool useReceiver = getUseReceiverFlag().squash(false);
|
||||
bool previouslyClientStreaming = pimpl->getDataStreamingToClient();
|
||||
uint16_t clientStartingPort = getClientZmqPort({0}).squash(0);
|
||||
bool useReceiver = getUseReceiverFlag().squash(false);
|
||||
bool previouslyReceiverStreaming = false;
|
||||
uint16_t rxStartingPort = 0;
|
||||
if (useReceiver) {
|
||||
@@ -1563,7 +1564,7 @@ Result<uint16_t> Detector::getRxZmqPort(Positions pos) const {
|
||||
}
|
||||
|
||||
void Detector::setRxZmqPort(uint16_t port, int module_id) {
|
||||
const bool previouslyReceiverStreaming =
|
||||
bool previouslyReceiverStreaming =
|
||||
getRxZmqDataStream(std::vector<int>{module_id}).squash(false);
|
||||
if (module_id == -1) {
|
||||
std::vector<uint16_t> port_list = getValidPortNumbers(port);
|
||||
@@ -1586,7 +1587,7 @@ Result<uint16_t> Detector::getClientZmqPort(Positions pos) const {
|
||||
}
|
||||
|
||||
void Detector::setClientZmqPort(uint16_t port, int module_id) {
|
||||
const bool previouslyClientStreaming = pimpl->getDataStreamingToClient();
|
||||
bool previouslyClientStreaming = pimpl->getDataStreamingToClient();
|
||||
if (module_id == -1) {
|
||||
std::vector<uint16_t> port_list = getValidPortNumbers(port);
|
||||
for (int idet = 0; idet < size(); ++idet) {
|
||||
@@ -1608,7 +1609,7 @@ Result<IpAddr> Detector::getClientZmqIp(Positions pos) const {
|
||||
}
|
||||
|
||||
void Detector::setClientZmqIp(const IpAddr ip, Positions pos) {
|
||||
const bool previouslyClientStreaming = pimpl->getDataStreamingToClient();
|
||||
bool previouslyClientStreaming = pimpl->getDataStreamingToClient();
|
||||
pimpl->Parallel(&Module::setClientStreamingIP, pos, ip);
|
||||
if (previouslyClientStreaming) {
|
||||
pimpl->setDataStreamingToClient(false);
|
||||
@@ -1627,7 +1628,7 @@ Result<int> Detector::getRxZmqHwm(Positions pos) const {
|
||||
}
|
||||
|
||||
void Detector::setRxZmqHwm(const int limit) {
|
||||
const bool previouslyReceiverStreaming = getRxZmqDataStream().squash(false);
|
||||
bool previouslyReceiverStreaming = getRxZmqDataStream().squash(false);
|
||||
pimpl->Parallel(&Module::setReceiverStreamingHwm, {}, limit);
|
||||
if (previouslyReceiverStreaming) {
|
||||
setRxZmqDataStream(false, {});
|
||||
@@ -1993,15 +1994,15 @@ Result<defs::streamingInterface> Detector::getVetoStream(Positions pos) const {
|
||||
void Detector::setVetoStream(defs::streamingInterface interface,
|
||||
Positions pos) {
|
||||
// 3gbe
|
||||
const bool LOW_LATENCY_LINK =
|
||||
bool LOW_LATENCY_LINK =
|
||||
((interface & defs::streamingInterface::LOW_LATENCY_LINK) ==
|
||||
defs::streamingInterface::LOW_LATENCY_LINK);
|
||||
pimpl->Parallel(&Module::setVetoStream, pos, LOW_LATENCY_LINK);
|
||||
|
||||
// 10gbe (debugging interface) opens 2nd udp interface in receiver
|
||||
const int old_numinterfaces = getNumberofUDPInterfaces(pos).tsquash(
|
||||
int old_numinterfaces = getNumberofUDPInterfaces(pos).tsquash(
|
||||
"retrieved inconsistent number of udp interfaces");
|
||||
const int numinterfaces =
|
||||
int numinterfaces =
|
||||
(((interface & defs::streamingInterface::ETHERNET_10GB) ==
|
||||
defs::streamingInterface::ETHERNET_10GB)
|
||||
? 2
|
||||
@@ -2729,7 +2730,7 @@ void Detector::programFPGA(const std::string &fname,
|
||||
const bool forceDeleteNormalFile, Positions pos) {
|
||||
LOG(logINFO) << "Updating Firmware...";
|
||||
LOG(logINFO) << "Hardware Version: " << getHardwareVersion();
|
||||
const std::vector<char> buffer = pimpl->readProgrammingFile(fname);
|
||||
std::vector<char> buffer = pimpl->readProgrammingFile(fname);
|
||||
pimpl->Parallel(&Module::programFPGA, pos, buffer, forceDeleteNormalFile);
|
||||
rebootController(pos);
|
||||
}
|
||||
@@ -2740,8 +2741,8 @@ void Detector::resetFPGA(Positions pos) {
|
||||
|
||||
void Detector::updateDetectorServer(const std::string &fname, Positions pos) {
|
||||
LOG(logINFO) << "Updating Detector Server (no tftp)...";
|
||||
const std::vector<char> buffer = readBinaryFile(fname, "Update Detector Server");
|
||||
const std::string filename = getFileNameFromFilePath(fname);
|
||||
std::vector<char> buffer = readBinaryFile(fname, "Update Detector Server");
|
||||
std::string filename = getFileNameFromFilePath(fname);
|
||||
pimpl->Parallel(&Module::updateDetectorServer, pos, buffer, filename);
|
||||
if (getDetectorType().squash() != defs::EIGER) {
|
||||
rebootController(pos);
|
||||
@@ -2750,7 +2751,7 @@ void Detector::updateDetectorServer(const std::string &fname, Positions pos) {
|
||||
|
||||
void Detector::updateKernel(const std::string &fname, Positions pos) {
|
||||
LOG(logINFO) << "Updating Kernel...";
|
||||
const std::vector<char> buffer = readBinaryFile(fname, "Update Kernel");
|
||||
std::vector<char> buffer = readBinaryFile(fname, "Update Kernel");
|
||||
pimpl->Parallel(&Module::updateKernel, pos, buffer);
|
||||
rebootController(pos);
|
||||
}
|
||||
@@ -2764,8 +2765,8 @@ void Detector::updateFirmwareAndServer(const std::string &sname,
|
||||
Positions pos) {
|
||||
LOG(logINFO) << "Updating Firmware and Detector Server (no tftp)...";
|
||||
LOG(logINFO) << "Updating Detector Server (no tftp)...";
|
||||
const std::vector<char> buffer = readBinaryFile(sname, "Update Detector Server");
|
||||
const std::string filename = getFileNameFromFilePath(sname);
|
||||
std::vector<char> buffer = readBinaryFile(sname, "Update Detector Server");
|
||||
std::string filename = getFileNameFromFilePath(sname);
|
||||
pimpl->Parallel(&Module::updateDetectorServer, pos, buffer, filename);
|
||||
programFPGA(fname, false, pos);
|
||||
}
|
||||
@@ -2881,7 +2882,7 @@ Result<ns> Detector::getMeasurementTime(Positions pos) const {
|
||||
}
|
||||
|
||||
std::vector<uint16_t> Detector::getValidPortNumbers(uint16_t start_port) {
|
||||
const int num_sockets_per_detector = getNumberofUDPInterfaces({}).tsquash(
|
||||
int num_sockets_per_detector = getNumberofUDPInterfaces({}).tsquash(
|
||||
"Number of UDP Interfaces is not consistent among modules");
|
||||
|
||||
validatePortRange(start_port, size() * num_sockets_per_detector);
|
||||
@@ -2889,7 +2890,7 @@ std::vector<uint16_t> Detector::getValidPortNumbers(uint16_t start_port) {
|
||||
std::vector<uint16_t> res;
|
||||
res.reserve(size());
|
||||
for (int idet = 0; idet < size(); ++idet) {
|
||||
const uint16_t port = start_port + (idet * num_sockets_per_detector);
|
||||
uint16_t port = start_port + (idet * num_sockets_per_detector);
|
||||
res.push_back(port);
|
||||
}
|
||||
return res;
|
||||
|
||||
@@ -198,11 +198,11 @@ void DetectorImpl::setHostname(const std::vector<std::string> &name) {
|
||||
void DetectorImpl::addModule(const std::string &name) {
|
||||
LOG(logINFO) << "Adding module " << name;
|
||||
auto host = verifyUniqueDetHost(name);
|
||||
std::string const hostname = host.first;
|
||||
uint16_t const port = host.second;
|
||||
std::string hostname = host.first;
|
||||
uint16_t port = host.second;
|
||||
|
||||
// get type by connecting
|
||||
detectorType const type = Module::getTypeFromDetector(hostname, port);
|
||||
detectorType type = Module::getTypeFromDetector(hostname, port);
|
||||
|
||||
// gotthard2 cannot have more than 2 modules (50um=1, 25um=2
|
||||
if (type == GOTTHARD2 && modules.size() > 2) {
|
||||
@@ -227,7 +227,7 @@ void DetectorImpl::addModule(const std::string &name) {
|
||||
modules[pos]->updateNumberofUDPInterfaces();
|
||||
|
||||
// update zmq port in case numudpinterfaces changed
|
||||
int const numInterfaces = modules[pos]->getNumberofUDPInterfacesFromShm();
|
||||
int numInterfaces = modules[pos]->getNumberofUDPInterfacesFromShm();
|
||||
modules[pos]->setClientStreamingPort(DEFAULT_ZMQ_CL_PORTNO +
|
||||
pos * numInterfaces);
|
||||
}
|
||||
@@ -245,7 +245,7 @@ void DetectorImpl::updateDetectorSize() {
|
||||
int nModx = 0, nMody = 0;
|
||||
// 1d, add modules along x axis
|
||||
if (modSize.y == 1) {
|
||||
int const detSizeX = shm()->numberOfChannels.x;
|
||||
int detSizeX = shm()->numberOfChannels.x;
|
||||
int maxChanX = modSize.x * size();
|
||||
// user given detsizex used only within max value
|
||||
if (detSizeX > 1 && detSizeX <= maxChanX) {
|
||||
@@ -271,7 +271,7 @@ void DetectorImpl::updateDetectorSize() {
|
||||
}
|
||||
// 2d, add modules along y axis (due to eiger top/bottom)
|
||||
else {
|
||||
int const detSizeY = shm()->numberOfChannels.y;
|
||||
int detSizeY = shm()->numberOfChannels.y;
|
||||
int maxChanY = modSize.y * size();
|
||||
// user given detsizey used only within max value
|
||||
if (detSizeY > 1 && detSizeY <= maxChanY) {
|
||||
@@ -467,7 +467,7 @@ void DetectorImpl::createReceivingDataSockets() {
|
||||
if (shm()->detType == GOTTHARD2) {
|
||||
numUDPInterfaces = 1;
|
||||
}
|
||||
size_t const numSockets = modules.size() * numUDPInterfaces;
|
||||
size_t numSockets = modules.size() * numUDPInterfaces;
|
||||
|
||||
for (size_t iSocket = 0; iSocket < numSockets; ++iSocket) {
|
||||
uint32_t portnum =
|
||||
@@ -481,7 +481,7 @@ void DetectorImpl::createReceivingDataSockets() {
|
||||
.c_str(),
|
||||
portnum));
|
||||
// set high water mark
|
||||
int const hwm = shm()->zmqHwm;
|
||||
int hwm = shm()->zmqHwm;
|
||||
if (hwm >= 0) {
|
||||
zmqSocket[iSocket]->SetReceiveHighWaterMark(hwm);
|
||||
// need not reconnect. cannot be connected (detector idle)
|
||||
@@ -504,7 +504,7 @@ void DetectorImpl::createReceivingDataSockets() {
|
||||
|
||||
void DetectorImpl::readFrameFromReceiver() {
|
||||
|
||||
bool const gapPixels = shm()->gapPixels;
|
||||
bool gapPixels = shm()->gapPixels;
|
||||
LOG(logDEBUG) << "Gap pixels: " << gapPixels;
|
||||
int nX = 0;
|
||||
int nY = 0;
|
||||
@@ -644,10 +644,10 @@ void DetectorImpl::readFrameFromReceiver() {
|
||||
|
||||
// creating multi image
|
||||
{
|
||||
uint32_t const xoffset = coordX * nPixelsX * bytesPerPixel;
|
||||
uint32_t const yoffset = coordY * nPixelsY;
|
||||
uint32_t xoffset = coordX * nPixelsX * bytesPerPixel;
|
||||
uint32_t yoffset = coordY * nPixelsY;
|
||||
uint32_t singledetrowoffset = nPixelsX * bytesPerPixel;
|
||||
uint32_t const rowoffset = nX * singledetrowoffset;
|
||||
uint32_t rowoffset = nX * singledetrowoffset;
|
||||
if (shm()->detType == CHIPTESTBOARD ||
|
||||
shm()->detType == defs::XILINX_CHIPTESTBOARD) {
|
||||
singledetrowoffset = size;
|
||||
@@ -694,7 +694,7 @@ void DetectorImpl::readFrameFromReceiver() {
|
||||
int nDetActualPixelsY = nDetPixelsY;
|
||||
|
||||
if (gapPixels) {
|
||||
int const n = insertGapPixels(multiframe.get(), multigappixels,
|
||||
int n = insertGapPixels(multiframe.get(), multigappixels,
|
||||
quadEnable, dynamicRange,
|
||||
nDetActualPixelsX, nDetActualPixelsY);
|
||||
callbackImage = multigappixels;
|
||||
@@ -742,38 +742,38 @@ int DetectorImpl::insertGapPixels(char *image, char *&gpImage, bool quadEnable,
|
||||
<< "\n\t quadEnable: " << quadEnable << "\n\t dr: " << dr;
|
||||
|
||||
// inter module gap pixels
|
||||
int const modGapPixelsx = 8;
|
||||
int const modGapPixelsy = 36;
|
||||
int modGapPixelsx = 8;
|
||||
int modGapPixelsy = 36;
|
||||
// inter chip gap pixels
|
||||
int const chipGapPixelsx = 2;
|
||||
int const chipGapPixelsy = 2;
|
||||
int chipGapPixelsx = 2;
|
||||
int chipGapPixelsy = 2;
|
||||
// number of pixels in a chip
|
||||
int const nChipPixelsx = 256;
|
||||
int const nChipPixelsy = 256;
|
||||
int nChipPixelsx = 256;
|
||||
int nChipPixelsy = 256;
|
||||
// 1 module
|
||||
// number of chips in a module
|
||||
int nMod1Chipx = 4;
|
||||
int const nMod1Chipy = 2;
|
||||
int nMod1Chipy = 2;
|
||||
if (quadEnable) {
|
||||
nMod1Chipx = 2;
|
||||
}
|
||||
// number of pixels in a module
|
||||
int const nMod1Pixelsx = nChipPixelsx * nMod1Chipx;
|
||||
int const nMod1Pixelsy = nChipPixelsy * nMod1Chipy;
|
||||
int nMod1Pixelsx = nChipPixelsx * nMod1Chipx;
|
||||
int nMod1Pixelsy = nChipPixelsy * nMod1Chipy;
|
||||
// number of gap pixels in a module
|
||||
int const nMod1GapPixelsx = (nMod1Chipx - 1) * chipGapPixelsx;
|
||||
int const nMod1GapPixelsy = (nMod1Chipy - 1) * chipGapPixelsy;
|
||||
int nMod1GapPixelsx = (nMod1Chipx - 1) * chipGapPixelsx;
|
||||
int nMod1GapPixelsy = (nMod1Chipy - 1) * chipGapPixelsy;
|
||||
// total number of modules
|
||||
int const nModx = nPixelsx / nMod1Pixelsx;
|
||||
int const nMody = nPixelsy / nMod1Pixelsy;
|
||||
int nModx = nPixelsx / nMod1Pixelsx;
|
||||
int nMody = nPixelsy / nMod1Pixelsy;
|
||||
|
||||
// check if not full modules
|
||||
// (setting gap pixels and then adding half module or disabling quad)
|
||||
if (nPixelsy / nMod1Pixelsy == 0) {
|
||||
LOG(logERROR) << "Gap pixels can only be enabled with full modules. "
|
||||
"Sending dummy data without gap pixels.\n";
|
||||
double const bytesPerPixel = (double)dr / 8.00;
|
||||
int const imagesize = nPixelsy * nPixelsx * bytesPerPixel;
|
||||
double bytesPerPixel = (double)dr / 8.00;
|
||||
int imagesize = nPixelsy * nPixelsx * bytesPerPixel;
|
||||
if (gpImage == nullptr) {
|
||||
gpImage = new char[imagesize];
|
||||
}
|
||||
@@ -782,28 +782,28 @@ int DetectorImpl::insertGapPixels(char *image, char *&gpImage, bool quadEnable,
|
||||
}
|
||||
|
||||
// total number of pixels
|
||||
int const nTotx =
|
||||
int nTotx =
|
||||
nPixelsx + (nMod1GapPixelsx * nModx) + (modGapPixelsx * (nModx - 1));
|
||||
int const nToty =
|
||||
int nToty =
|
||||
nPixelsy + (nMod1GapPixelsy * nMody) + (modGapPixelsy * (nMody - 1));
|
||||
// total number of chips
|
||||
int const nChipx = nPixelsx / nChipPixelsx;
|
||||
int const nChipy = nPixelsy / nChipPixelsy;
|
||||
int nChipx = nPixelsx / nChipPixelsx;
|
||||
int nChipy = nPixelsy / nChipPixelsy;
|
||||
|
||||
double const bytesPerPixel = (double)dr / 8.00;
|
||||
int const imagesize = nTotx * nToty * bytesPerPixel;
|
||||
double bytesPerPixel = (double)dr / 8.00;
|
||||
int imagesize = nTotx * nToty * bytesPerPixel;
|
||||
|
||||
int const nChipBytesx = nChipPixelsx * bytesPerPixel; // 1 chip bytes in x
|
||||
int const nChipGapBytesx = chipGapPixelsx * bytesPerPixel; // 2 pixel bytes
|
||||
int const nModGapBytesx = modGapPixelsx * bytesPerPixel; // 8 pixel bytes
|
||||
int const nChipBytesy = nChipPixelsy * nTotx * bytesPerPixel; // 1 chip bytes in y
|
||||
int const nChipGapBytesy = chipGapPixelsy * nTotx * bytesPerPixel; // 2 lines
|
||||
int const nModGapBytesy = modGapPixelsy * nTotx *
|
||||
int nChipBytesx = nChipPixelsx * bytesPerPixel; // 1 chip bytes in x
|
||||
int nChipGapBytesx = chipGapPixelsx * bytesPerPixel; // 2 pixel bytes
|
||||
int nModGapBytesx = modGapPixelsx * bytesPerPixel; // 8 pixel bytes
|
||||
int nChipBytesy = nChipPixelsy * nTotx * bytesPerPixel; // 1 chip bytes in y
|
||||
int nChipGapBytesy = chipGapPixelsy * nTotx * bytesPerPixel; // 2 lines
|
||||
int nModGapBytesy = modGapPixelsy * nTotx *
|
||||
bytesPerPixel; // 36 lines
|
||||
// 4 bit mode, its 1 byte (because for 4
|
||||
// bit mode, we handle 1 byte at a time)
|
||||
int const pixel1 = (int)(ceil(bytesPerPixel));
|
||||
int const row1Bytes = nTotx * bytesPerPixel;
|
||||
int pixel1 = (int)(ceil(bytesPerPixel));
|
||||
int row1Bytes = nTotx * bytesPerPixel;
|
||||
int nMod1TotPixelsx = nMod1Pixelsx + nMod1GapPixelsx;
|
||||
if (dr == 4) {
|
||||
nMod1TotPixelsx /= 2;
|
||||
@@ -811,7 +811,7 @@ int DetectorImpl::insertGapPixels(char *image, char *&gpImage, bool quadEnable,
|
||||
// eiger requires inter chip gap pixels are halved
|
||||
// jungfrau/moench prefers same inter chip gap pixels as the boundary pixels
|
||||
int divisionValue = 2;
|
||||
slsDetectorDefs::detectorType const detType = shm()->detType;
|
||||
slsDetectorDefs::detectorType detType = shm()->detType;
|
||||
if (detType == JUNGFRAU || detType == MOENCH) {
|
||||
divisionValue = 1;
|
||||
}
|
||||
@@ -1053,7 +1053,7 @@ int DetectorImpl::getClientStreamingHwm() const {
|
||||
for (auto &it : zmqSocket) {
|
||||
result.push_back(it->GetReceiveHighWaterMark());
|
||||
}
|
||||
int const res = result.tsquash("Inconsistent zmq receive hwm values");
|
||||
int res = result.tsquash("Inconsistent zmq receive hwm values");
|
||||
return res;
|
||||
}
|
||||
|
||||
@@ -1110,7 +1110,7 @@ int DetectorImpl::acquire() {
|
||||
struct timespec begin, end;
|
||||
clock_gettime(CLOCK_REALTIME, &begin);
|
||||
|
||||
bool const receiver = Parallel(&Module::getUseReceiverFlag, {}).squash(false);
|
||||
bool receiver = Parallel(&Module::getUseReceiverFlag, {}).squash(false);
|
||||
|
||||
if (dataReady == nullptr) {
|
||||
setJoinThreadFlag(false);
|
||||
@@ -1172,7 +1172,7 @@ int DetectorImpl::acquire() {
|
||||
|
||||
// progress
|
||||
auto a = Parallel(&Module::getReceiverProgress, {});
|
||||
double const progress = (*std::max_element(a.begin(), a.end()));
|
||||
double progress = (*std::max_element(a.begin(), a.end()));
|
||||
|
||||
// callback
|
||||
acquisition_finished(progress, static_cast<int>(status),
|
||||
@@ -1340,7 +1340,7 @@ void DetectorImpl::processData(bool receiver) {
|
||||
}
|
||||
}
|
||||
// get and print progress
|
||||
double const temp =
|
||||
double temp =
|
||||
(double)Parallel(&Module::getReceiverProgress, {0})
|
||||
.squash();
|
||||
if (temp != progress) {
|
||||
@@ -1365,12 +1365,12 @@ void DetectorImpl::processData(bool receiver) {
|
||||
}
|
||||
|
||||
bool DetectorImpl::getJoinThreadFlag() const {
|
||||
std::lock_guard<std::mutex> const lock(mp);
|
||||
std::lock_guard<std::mutex> lock(mp);
|
||||
return jointhread;
|
||||
}
|
||||
|
||||
void DetectorImpl::setJoinThreadFlag(bool value) {
|
||||
std::lock_guard<std::mutex> const lock(mp);
|
||||
std::lock_guard<std::mutex> lock(mp);
|
||||
jointhread = value;
|
||||
}
|
||||
|
||||
@@ -1430,11 +1430,11 @@ std::vector<char> DetectorImpl::readProgrammingFile(const std::string &fname) {
|
||||
}
|
||||
|
||||
// get srcSize to print progress
|
||||
ssize_t const srcSize = getFileSize(src, "Program FPGA");
|
||||
ssize_t srcSize = getFileSize(src, "Program FPGA");
|
||||
|
||||
// create temp destination file
|
||||
char destfname[] = "/tmp/SLS_DET_MCB.XXXXXX";
|
||||
int const dst = mkstemp(destfname); // create temporary file and open it in r/w
|
||||
int dst = mkstemp(destfname); // create temporary file and open it in r/w
|
||||
if (dst == -1) {
|
||||
fclose(src);
|
||||
throw RuntimeError(std::string("Could not create destination file "
|
||||
@@ -1466,7 +1466,7 @@ std::vector<char> DetectorImpl::readProgrammingFile(const std::string &fname) {
|
||||
int oldProgress = 0;
|
||||
while (!feof(src)) {
|
||||
// print progress
|
||||
int const progress = (int)(((double)(dstFilePos) / srcSize) * 100);
|
||||
int progress = (int)(((double)(dstFilePos) / srcSize) * 100);
|
||||
if (oldProgress != progress) {
|
||||
printf("%d%%\r", progress);
|
||||
fflush(stdout);
|
||||
@@ -1477,7 +1477,7 @@ std::vector<char> DetectorImpl::readProgrammingFile(const std::string &fname) {
|
||||
break;
|
||||
}
|
||||
// read source
|
||||
int const s = fgetc(src);
|
||||
int s = fgetc(src);
|
||||
if (s < 0) {
|
||||
break;
|
||||
}
|
||||
@@ -1547,13 +1547,13 @@ DetectorImpl::verifyUniqueDetHost(const std::string &name) {
|
||||
// extract port
|
||||
// C++17 could be auto [hostname, port] = ParseHostPort(name);
|
||||
auto res = ParseHostPort(name);
|
||||
std::string const hostname = res.first;
|
||||
std::string hostname = res.first;
|
||||
uint16_t port = res.second;
|
||||
if (port == 0) {
|
||||
port = DEFAULT_TCP_CNTRL_PORTNO;
|
||||
}
|
||||
|
||||
int const detSize = size();
|
||||
int detSize = size();
|
||||
// mod not yet added
|
||||
std::vector<std::pair<std::string, uint16_t>> hosts(detSize + 1);
|
||||
hosts[detSize].first = hostname;
|
||||
@@ -1573,8 +1573,8 @@ DetectorImpl::verifyUniqueRxHost(const std::string &name,
|
||||
// extract port
|
||||
// C++17 could be auto [hostname, port] = ParseHostPort(name);
|
||||
auto res = ParseHostPort(name);
|
||||
std::string const hostname = res.first;
|
||||
uint16_t const port = res.second;
|
||||
std::string hostname = res.first;
|
||||
uint16_t port = res.second;
|
||||
|
||||
// hostname and port for given positions
|
||||
if (positions.empty() || (positions.size() == 1 && positions[0] == -1)) {
|
||||
@@ -1669,7 +1669,7 @@ void DetectorImpl::validateROIs(const std::vector<defs::ROI> &rois) {
|
||||
if (roi.noRoi()) {
|
||||
throw RuntimeError("Invalid Roi of size 0. Roi: " + ToString(roi));
|
||||
}
|
||||
bool const is2D = (modules[0]->getNumberOfChannels().y > 1 ? true : false);
|
||||
bool is2D = (modules[0]->getNumberOfChannels().y > 1 ? true : false);
|
||||
if (roi.completeRoi()) {
|
||||
std::ostringstream oss;
|
||||
oss << "Did you mean the clear roi command (API: clearRxROI, cmd: "
|
||||
@@ -1730,9 +1730,9 @@ defs::xy DetectorImpl::getPortGeometry() const {
|
||||
}
|
||||
|
||||
defs::xy DetectorImpl::calculatePosition(int moduleIndex) const {
|
||||
int const maxYMods = shm()->numberOfModules.y;
|
||||
int const y = (moduleIndex % maxYMods);
|
||||
int const x = (moduleIndex / maxYMods);
|
||||
int maxYMods = shm()->numberOfModules.y;
|
||||
int y = (moduleIndex % maxYMods);
|
||||
int x = (moduleIndex / maxYMods);
|
||||
return defs::xy{x, y};
|
||||
}
|
||||
|
||||
@@ -1771,13 +1771,13 @@ void DetectorImpl::convertGlobalRoiToPortLevel(
|
||||
defs::ROI portRoi = moduleRoi;
|
||||
// Recalculate port ROI boundaries (split vertically or horizontally)
|
||||
if (portGeometry.x == 2) {
|
||||
int const midX = (moduleRoi.xmin + moduleRoi.xmax) / 2;
|
||||
int midX = (moduleRoi.xmin + moduleRoi.xmax) / 2;
|
||||
if (port == 0)
|
||||
portRoi.xmax = midX;
|
||||
else
|
||||
portRoi.xmin = midX + 1;
|
||||
} else if (portGeometry.y == 2) {
|
||||
int const midY = (moduleRoi.ymin + moduleRoi.ymax) / 2;
|
||||
int midY = (moduleRoi.ymin + moduleRoi.ymax) / 2;
|
||||
if (port == 0)
|
||||
portRoi.ymax = midY;
|
||||
else
|
||||
@@ -1823,7 +1823,7 @@ void DetectorImpl::setRxROI(const std::vector<defs::ROI> &args) {
|
||||
}
|
||||
|
||||
validateROIs(args);
|
||||
int const nPortsPerModule =
|
||||
int nPortsPerModule =
|
||||
Parallel(&Module::getNumberofUDPInterfacesFromShm, {})
|
||||
.tsquash("Inconsistent number of udp ports set up per module");
|
||||
|
||||
@@ -1845,7 +1845,7 @@ void DetectorImpl::setRxROI(const std::vector<defs::ROI> &args) {
|
||||
}
|
||||
|
||||
void DetectorImpl::clearRxROI() {
|
||||
int const nPortsPerModule =
|
||||
int nPortsPerModule =
|
||||
Parallel(&Module::getNumberofUDPInterfacesFromShm, {})
|
||||
.tsquash("Inconsistent number of udp ports set up per module");
|
||||
for (size_t iModule = 0; iModule < modules.size(); ++iModule) {
|
||||
@@ -1890,7 +1890,7 @@ void DetectorImpl::getBadChannels(const std::string &fname,
|
||||
}
|
||||
|
||||
void DetectorImpl::setBadChannels(const std::string &fname, Positions pos) {
|
||||
std::vector<int> const list = sls::getChannelsFromFile(fname);
|
||||
std::vector<int> list = sls::getChannelsFromFile(fname);
|
||||
if (list.empty()) {
|
||||
throw RuntimeError("Bad channel file is empty.");
|
||||
}
|
||||
@@ -1913,8 +1913,8 @@ void DetectorImpl::setBadChannels(const std::vector<int> list, Positions pos) {
|
||||
std::to_string(badchannel) +
|
||||
" out of bounds.");
|
||||
}
|
||||
int const ch = badchannel % nchan;
|
||||
size_t const imod = badchannel / nchan;
|
||||
int ch = badchannel % nchan;
|
||||
size_t imod = badchannel / nchan;
|
||||
if (imod >= modules.size()) {
|
||||
throw RuntimeError("Invalid bad channel list. " +
|
||||
std::to_string(badchannel) +
|
||||
|
||||
@@ -90,7 +90,7 @@ class DetectorImpl : public virtual slsDetectorDefs {
|
||||
}
|
||||
std::vector<std::future<RT>> futures;
|
||||
futures.reserve(positions.size());
|
||||
for (const size_t i : positions) {
|
||||
for (size_t i : positions) {
|
||||
if (i >= modules.size())
|
||||
throw RuntimeError("Module out of range");
|
||||
futures.push_back(std::async(std::launch::async, somefunc,
|
||||
@@ -118,7 +118,7 @@ class DetectorImpl : public virtual slsDetectorDefs {
|
||||
}
|
||||
std::vector<std::future<RT>> futures;
|
||||
futures.reserve(positions.size());
|
||||
for (const size_t i : positions) {
|
||||
for (size_t i : positions) {
|
||||
if (i >= modules.size())
|
||||
throw RuntimeError("Module out of range");
|
||||
futures.push_back(std::async(std::launch::async, somefunc,
|
||||
@@ -145,7 +145,7 @@ class DetectorImpl : public virtual slsDetectorDefs {
|
||||
}
|
||||
std::vector<std::future<void>> futures;
|
||||
futures.reserve(positions.size());
|
||||
for (const size_t i : positions) {
|
||||
for (size_t i : positions) {
|
||||
if (i >= modules.size())
|
||||
throw RuntimeError("Module out of range");
|
||||
futures.push_back(std::async(std::launch::async, somefunc,
|
||||
@@ -170,7 +170,7 @@ class DetectorImpl : public virtual slsDetectorDefs {
|
||||
}
|
||||
std::vector<std::future<void>> futures;
|
||||
futures.reserve(positions.size());
|
||||
for (const size_t i : positions) {
|
||||
for (size_t i : positions) {
|
||||
if (i >= modules.size())
|
||||
throw RuntimeError("Module out of range");
|
||||
futures.push_back(std::async(std::launch::async, somefunc,
|
||||
|
||||
@@ -86,7 +86,7 @@ std::string Module::getControlServerLongVersion() const {
|
||||
}
|
||||
// throw with old server version (sends 8 bytes)
|
||||
catch (RuntimeError &e) {
|
||||
std::string const emsg = std::string(e.what());
|
||||
std::string emsg = std::string(e.what());
|
||||
if (emsg.find(F_GET_SERVER_VERSION) && emsg.find("8 bytes")) {
|
||||
throwDeprecatedServerVersion();
|
||||
}
|
||||
@@ -95,7 +95,7 @@ std::string Module::getControlServerLongVersion() const {
|
||||
}
|
||||
|
||||
void Module::throwDeprecatedServerVersion() const {
|
||||
uint64_t const res = sendToDetectorStop<int64_t>(F_GET_SERVER_VERSION);
|
||||
uint64_t res = sendToDetectorStop<int64_t>(F_GET_SERVER_VERSION);
|
||||
std::cout << std::endl;
|
||||
std::ostringstream os;
|
||||
os << "Detector Server (Control) version (0x" << std::hex << res
|
||||
@@ -110,7 +110,7 @@ std::string Module::getStopServerLongVersion() const {
|
||||
}
|
||||
|
||||
std::string Module::getDetectorServerVersion() const {
|
||||
Version const v(getControlServerLongVersion());
|
||||
Version v(getControlServerLongVersion());
|
||||
return v.concise();
|
||||
}
|
||||
|
||||
@@ -139,7 +139,7 @@ std::string Module::getReceiverLongVersion() const {
|
||||
}
|
||||
|
||||
std::string Module::getReceiverSoftwareVersion() const {
|
||||
Version const v(getReceiverLongVersion());
|
||||
Version v(getReceiverLongVersion());
|
||||
return v.concise();
|
||||
}
|
||||
|
||||
@@ -183,7 +183,7 @@ slsDetectorDefs::xy Module::getNumberOfChannels() const {
|
||||
|
||||
void Module::updateNumberOfModule(slsDetectorDefs::xy det) {
|
||||
shm()->numberOfModule = det;
|
||||
int const args[2] = {shm()->numberOfModule.y, moduleIndex};
|
||||
int args[2] = {shm()->numberOfModule.y, moduleIndex};
|
||||
sendToDetector(F_SET_POSITION, args, nullptr);
|
||||
}
|
||||
|
||||
@@ -218,14 +218,14 @@ void Module::setThresholdEnergy(int e_eV, detectorSettings isettings,
|
||||
throw RuntimeError("This energy " + std::to_string(e_eV) +
|
||||
" not defined for this module!");
|
||||
}
|
||||
bool const interpolate =
|
||||
bool interpolate =
|
||||
std::all_of(shm()->trimEnergies.begin(), shm()->trimEnergies.end(),
|
||||
[e_eV](const int &e) { return e != e_eV; });
|
||||
|
||||
sls_detector_module myMod{shm()->detType};
|
||||
|
||||
if (!interpolate) {
|
||||
std::string const settingsfname = getTrimbitFilename(isettings, e_eV);
|
||||
std::string settingsfname = getTrimbitFilename(isettings, e_eV);
|
||||
LOG(logDEBUG1) << "Settings File is " << settingsfname;
|
||||
myMod = readSettingsFile(settingsfname, trimbits);
|
||||
} else {
|
||||
@@ -238,8 +238,8 @@ void Module::setThresholdEnergy(int e_eV, detectorSettings isettings,
|
||||
break;
|
||||
}
|
||||
}
|
||||
std::string const settingsfname1 = getTrimbitFilename(isettings, trim1);
|
||||
std::string const settingsfname2 = getTrimbitFilename(isettings, trim2);
|
||||
std::string settingsfname1 = getTrimbitFilename(isettings, trim1);
|
||||
std::string settingsfname2 = getTrimbitFilename(isettings, trim2);
|
||||
LOG(logDEBUG1) << "Settings Files are " << settingsfname1 << " and "
|
||||
<< settingsfname2;
|
||||
auto myMod1 = readSettingsFile(settingsfname1, trimbits);
|
||||
@@ -291,17 +291,17 @@ void Module::setAllThresholdEnergy(std::array<int, 3> e_eV,
|
||||
std::vector<sls_detector_module> myMods;
|
||||
for (size_t i = 0; i < energy.size(); ++i) {
|
||||
if (energy[i] == -1) {
|
||||
sls_detector_module const mod = getModule();
|
||||
sls_detector_module mod = getModule();
|
||||
myMods.push_back(mod);
|
||||
continue;
|
||||
}
|
||||
|
||||
sls_detector_module const mod{shm()->detType};
|
||||
sls_detector_module mod{shm()->detType};
|
||||
myMods.push_back(mod);
|
||||
|
||||
// don't interpolate
|
||||
if (shm()->trimEnergies.anyEqualTo(energy[i])) {
|
||||
std::string const settingsfname =
|
||||
std::string settingsfname =
|
||||
getTrimbitFilename(isettings, energy[i]);
|
||||
LOG(logDEBUG1) << "Settings File is " << settingsfname;
|
||||
myMods[i] = readSettingsFile(settingsfname, trimbits);
|
||||
@@ -335,8 +335,8 @@ void Module::setAllThresholdEnergy(std::array<int, 3> e_eV,
|
||||
LOG(logINFO) << "e_eV:" << energy[i] << " [" << trim1 << ", "
|
||||
<< trim2 << "]";
|
||||
|
||||
std::string const settingsfname1 = getTrimbitFilename(isettings, trim1);
|
||||
std::string const settingsfname2 = getTrimbitFilename(isettings, trim2);
|
||||
std::string settingsfname1 = getTrimbitFilename(isettings, trim1);
|
||||
std::string settingsfname2 = getTrimbitFilename(isettings, trim2);
|
||||
LOG(logDEBUG1) << "Settings Files are " << settingsfname1 << " and "
|
||||
<< settingsfname2;
|
||||
auto myMod1 = readSettingsFile(settingsfname1, trimbits);
|
||||
@@ -755,17 +755,17 @@ int Module::getClockDivider(int clkIndex) const {
|
||||
}
|
||||
|
||||
void Module::setClockDivider(int clkIndex, int value) {
|
||||
int const args[]{clkIndex, value};
|
||||
int args[]{clkIndex, value};
|
||||
sendToDetector(F_SET_CLOCK_DIVIDER, args, nullptr);
|
||||
}
|
||||
|
||||
int Module::getClockPhase(int clkIndex, bool inDegrees) const {
|
||||
int const args[]{clkIndex, static_cast<int>(inDegrees)};
|
||||
int args[]{clkIndex, static_cast<int>(inDegrees)};
|
||||
return sendToDetector<int>(F_GET_CLOCK_PHASE, args);
|
||||
}
|
||||
|
||||
void Module::setClockPhase(int clkIndex, int value, bool inDegrees) {
|
||||
int const args[]{clkIndex, value, static_cast<int>(inDegrees)};
|
||||
int args[]{clkIndex, value, static_cast<int>(inDegrees)};
|
||||
sendToDetector(F_SET_CLOCK_PHASE, args, nullptr);
|
||||
}
|
||||
|
||||
@@ -778,22 +778,22 @@ int Module::getClockFrequency(int clkIndex) const {
|
||||
}
|
||||
|
||||
void Module::setClockFrequency(int clkIndex, int value) {
|
||||
int const args[]{clkIndex, value};
|
||||
int args[]{clkIndex, value};
|
||||
sendToDetector(F_SET_CLOCK_FREQUENCY, args, nullptr);
|
||||
}
|
||||
|
||||
int Module::getDAC(dacIndex index, bool mV) const {
|
||||
int const args[]{static_cast<int>(index), static_cast<int>(mV), GET_FLAG};
|
||||
int args[]{static_cast<int>(index), static_cast<int>(mV), GET_FLAG};
|
||||
return sendToDetector<int>(F_SET_DAC, args);
|
||||
}
|
||||
int Module::getDefaultDac(slsDetectorDefs::dacIndex index,
|
||||
slsDetectorDefs::detectorSettings sett) {
|
||||
int const args[]{static_cast<int>(index), static_cast<int>(sett)};
|
||||
int args[]{static_cast<int>(index), static_cast<int>(sett)};
|
||||
return sendToDetector<int>(F_GET_DEFAULT_DAC, args);
|
||||
}
|
||||
void Module::setDefaultDac(slsDetectorDefs::dacIndex index, int defaultValue,
|
||||
defs::detectorSettings sett) {
|
||||
int const args[]{static_cast<int>(index), static_cast<int>(sett), defaultValue};
|
||||
int args[]{static_cast<int>(index), static_cast<int>(sett), defaultValue};
|
||||
return sendToDetector(F_SET_DEFAULT_DAC, args, nullptr);
|
||||
}
|
||||
|
||||
@@ -803,7 +803,7 @@ void Module::resetToDefaultDacs(const bool hardReset) {
|
||||
}
|
||||
|
||||
void Module::setDAC(int val, dacIndex index, bool mV) {
|
||||
int const args[]{static_cast<int>(index), static_cast<int>(mV), val};
|
||||
int args[]{static_cast<int>(index), static_cast<int>(mV), val};
|
||||
sendToDetector<int>(F_SET_DAC, args);
|
||||
}
|
||||
|
||||
@@ -844,13 +844,13 @@ int Module::getADC(dacIndex index) const {
|
||||
}
|
||||
|
||||
int Module::getOnChipDAC(slsDetectorDefs::dacIndex index, int chipIndex) const {
|
||||
int const args[]{static_cast<int>(index), chipIndex};
|
||||
int args[]{static_cast<int>(index), chipIndex};
|
||||
return sendToDetector<int>(F_GET_ON_CHIP_DAC, args);
|
||||
}
|
||||
|
||||
void Module::setOnChipDAC(slsDetectorDefs::dacIndex index, int chipIndex,
|
||||
int value) {
|
||||
int const args[]{static_cast<int>(index), chipIndex, value};
|
||||
int args[]{static_cast<int>(index), chipIndex, value};
|
||||
sendToDetector(F_SET_ON_CHIP_DAC, args, nullptr);
|
||||
}
|
||||
|
||||
@@ -861,7 +861,7 @@ Module::getExternalSignalFlags(int signalIndex) const {
|
||||
}
|
||||
|
||||
void Module::setExternalSignalFlags(int signalIndex, externalSignalFlag type) {
|
||||
int const args[]{signalIndex, static_cast<int>(type)};
|
||||
int args[]{signalIndex, static_cast<int>(type)};
|
||||
sendToDetector(F_SET_EXTERNAL_SIGNAL_FLAG, args, nullptr);
|
||||
}
|
||||
|
||||
@@ -1202,7 +1202,7 @@ void Module::setDestinationUDPIP(const IpAddr ip) {
|
||||
}
|
||||
sendToDetector(F_SET_DEST_UDP_IP, ip, nullptr);
|
||||
if (shm()->useReceiverFlag) {
|
||||
MacAddr retval;
|
||||
MacAddr retval(0LU);
|
||||
sendToReceiver(F_SET_RECEIVER_UDP_IP, ip, retval);
|
||||
LOG(logINFO) << "Setting destination udp mac of Module " << moduleIndex
|
||||
<< " to " << retval;
|
||||
@@ -1225,7 +1225,7 @@ void Module::setDestinationUDPIP2(const IpAddr ip) {
|
||||
}
|
||||
sendToDetector(F_SET_DEST_UDP_IP2, ip, nullptr);
|
||||
if (shm()->useReceiverFlag) {
|
||||
MacAddr retval;
|
||||
MacAddr retval(0LU);
|
||||
sendToReceiver(F_SET_RECEIVER_UDP_IP2, ip, retval);
|
||||
LOG(logINFO) << "Setting destination udp mac2 of Module " << moduleIndex
|
||||
<< " to " << retval;
|
||||
@@ -1483,7 +1483,7 @@ void Module::setPartialFramesPadding(bool padding) {
|
||||
}
|
||||
|
||||
int Module::getReceiverUDPSocketBufferSize() const {
|
||||
int const arg = GET_FLAG;
|
||||
int arg = GET_FLAG;
|
||||
return sendToReceiver<int>(F_RECEIVER_UDP_SOCK_BUF_SIZE, arg);
|
||||
}
|
||||
|
||||
@@ -1809,7 +1809,7 @@ int64_t Module::getRateCorrection() const {
|
||||
}
|
||||
|
||||
void Module::setDefaultRateCorrection() {
|
||||
int64_t const arg = -1;
|
||||
int64_t arg = -1;
|
||||
sendToDetector(F_SET_RATE_CORRECT, arg, nullptr);
|
||||
}
|
||||
|
||||
@@ -1860,7 +1860,7 @@ bool Module::getActivate() const {
|
||||
}
|
||||
|
||||
void Module::setActivate(const bool enable) {
|
||||
int const arg = static_cast<int>(enable);
|
||||
int arg = static_cast<int>(enable);
|
||||
auto retval = sendToDetector<int>(F_ACTIVATE, arg);
|
||||
sendToDetectorStop<int>(F_ACTIVATE, arg);
|
||||
if (shm()->useReceiverFlag) {
|
||||
@@ -1894,7 +1894,7 @@ void Module::pulseChip(int n_pulses) {
|
||||
bool Module::getQuad() const { return sendToDetector<int>(F_GET_QUAD) != 0; }
|
||||
|
||||
void Module::setQuad(const bool enable) {
|
||||
int const value = enable ? 1 : 0;
|
||||
int value = enable ? 1 : 0;
|
||||
sendToDetector(F_SET_QUAD, value, nullptr);
|
||||
if (shm()->useReceiverFlag) {
|
||||
sendToReceiver(F_SET_RECEIVER_QUAD, value, nullptr);
|
||||
@@ -1906,7 +1906,7 @@ bool Module::getDataStream(const portPosition port) const {
|
||||
}
|
||||
|
||||
void Module::setDataStream(const portPosition port, const bool enable) {
|
||||
int const args[]{static_cast<int>(port), static_cast<int>(enable)};
|
||||
int args[]{static_cast<int>(port), static_cast<int>(enable)};
|
||||
sendToDetector(F_SET_DATASTREAM, args, nullptr);
|
||||
if (shm()->useReceiverFlag) {
|
||||
sendToReceiver(F_RECEIVER_SET_DATASTREAM, args, nullptr);
|
||||
@@ -2076,7 +2076,7 @@ std::array<int, 2> Module::getInjectChannel() const {
|
||||
|
||||
void Module::setInjectChannel(const int offsetChannel,
|
||||
const int incrementChannel) {
|
||||
int const args[]{offsetChannel, incrementChannel};
|
||||
int args[]{offsetChannel, incrementChannel};
|
||||
sendToDetector(F_SET_INJECT_CHANNEL, args, nullptr);
|
||||
}
|
||||
|
||||
@@ -2331,18 +2331,18 @@ slsDetectorDefs::vetoAlgorithm Module::getVetoAlgorithm(
|
||||
void Module::setVetoAlgorithm(
|
||||
const slsDetectorDefs::vetoAlgorithm alg,
|
||||
const slsDetectorDefs::streamingInterface interface) {
|
||||
int const args[]{static_cast<int>(alg), static_cast<int>(interface)};
|
||||
int args[]{static_cast<int>(alg), static_cast<int>(interface)};
|
||||
sendToDetector(F_SET_VETO_ALGORITHM, args, nullptr);
|
||||
}
|
||||
|
||||
int Module::getADCConfiguration(const int chipIndex, const int adcIndex) const {
|
||||
int const args[]{chipIndex, adcIndex};
|
||||
int args[]{chipIndex, adcIndex};
|
||||
return sendToDetector<int>(F_GET_ADC_CONFIGURATION, args);
|
||||
}
|
||||
|
||||
void Module::setADCConfiguration(const int chipIndex, const int adcIndex,
|
||||
int value) {
|
||||
int const args[]{chipIndex, adcIndex, value};
|
||||
int args[]{chipIndex, adcIndex, value};
|
||||
sendToDetector(F_SET_ADC_CONFIGURATION, args, nullptr);
|
||||
}
|
||||
|
||||
@@ -2417,7 +2417,7 @@ bool Module::getInterpolation() const {
|
||||
|
||||
void Module::setInterpolation(const bool enable) {
|
||||
sendToDetector(F_SET_INTERPOLATION, static_cast<int>(enable), nullptr);
|
||||
int const mask = getCounterMask();
|
||||
int mask = getCounterMask();
|
||||
if (shm()->useReceiverFlag) {
|
||||
sendToReceiver(F_RECEIVER_SET_COUNTER_MASK, mask, nullptr);
|
||||
}
|
||||
@@ -2568,17 +2568,19 @@ std::vector<int> Module::getReceiverDbitList() const {
|
||||
|
||||
void Module::setReceiverDbitList(std::vector<int> list) {
|
||||
LOG(logDEBUG1) << "Setting Receiver Dbit List";
|
||||
|
||||
if (list.size() > 64) {
|
||||
throw RuntimeError("Dbit list size cannot be greater than 64\n");
|
||||
}
|
||||
for (auto &it : list) {
|
||||
if (it < 0 || it > 63) {
|
||||
throw RuntimeError("Dbit list value must be between 0 and 63\n");
|
||||
}
|
||||
}
|
||||
auto r = stableRemoveDuplicates(list);
|
||||
if(r)
|
||||
LOG(logWARNING) << "Removed duplicated from receiver dbit list";
|
||||
std::sort(begin(list), end(list));
|
||||
auto last = std::unique(begin(list), end(list));
|
||||
list.erase(last, list.end());
|
||||
|
||||
StaticVector<int, MAX_RX_DBIT> const arg = list;
|
||||
StaticVector<int, MAX_RX_DBIT> arg = list;
|
||||
sendToReceiver(F_SET_RECEIVER_DBIT_LIST, arg, nullptr);
|
||||
}
|
||||
|
||||
@@ -2600,7 +2602,7 @@ void Module::setReceiverDbitReorder(bool reorder) {
|
||||
}
|
||||
|
||||
void Module::setDigitalIODelay(uint64_t pinMask, int delay) {
|
||||
uint64_t const args[]{pinMask, static_cast<uint64_t>(delay)};
|
||||
uint64_t args[]{pinMask, static_cast<uint64_t>(delay)};
|
||||
sendToDetector(F_DIGITAL_IO_DELAY, args, nullptr);
|
||||
}
|
||||
|
||||
@@ -2657,57 +2659,57 @@ void Module::setPatternIOControl(uint64_t word) {
|
||||
}
|
||||
|
||||
uint64_t Module::getPatternWord(int addr) const {
|
||||
uint64_t const args[]{static_cast<uint64_t>(addr),
|
||||
uint64_t args[]{static_cast<uint64_t>(addr),
|
||||
static_cast<uint64_t>(GET_FLAG)};
|
||||
return sendToDetector<uint64_t>(F_SET_PATTERN_WORD, args);
|
||||
}
|
||||
|
||||
void Module::setPatternWord(int addr, uint64_t word) {
|
||||
uint64_t const args[]{static_cast<uint64_t>(addr), word};
|
||||
uint64_t args[]{static_cast<uint64_t>(addr), word};
|
||||
sendToDetector<uint64_t>(F_SET_PATTERN_WORD, args);
|
||||
}
|
||||
|
||||
std::array<int, 2> Module::getPatternLoopAddresses(int level) const {
|
||||
int const args[]{level, GET_FLAG, GET_FLAG};
|
||||
int args[]{level, GET_FLAG, GET_FLAG};
|
||||
std::array<int, 2> retvals{};
|
||||
sendToDetector(F_SET_PATTERN_LOOP_ADDRESSES, args, retvals);
|
||||
return retvals;
|
||||
}
|
||||
|
||||
void Module::setPatternLoopAddresses(int level, int start, int stop) {
|
||||
int const args[]{level, start, stop};
|
||||
int args[]{level, start, stop};
|
||||
std::array<int, 2> retvals{};
|
||||
sendToDetector(F_SET_PATTERN_LOOP_ADDRESSES, args, retvals);
|
||||
}
|
||||
|
||||
int Module::getPatternLoopCycles(int level) const {
|
||||
int const args[]{level, GET_FLAG};
|
||||
int args[]{level, GET_FLAG};
|
||||
return sendToDetector<int>(F_SET_PATTERN_LOOP_CYCLES, args);
|
||||
}
|
||||
|
||||
void Module::setPatternLoopCycles(int level, int n) {
|
||||
int const args[]{level, n};
|
||||
int args[]{level, n};
|
||||
sendToDetector<int>(F_SET_PATTERN_LOOP_CYCLES, args);
|
||||
}
|
||||
|
||||
int Module::getPatternWaitAddr(int level) const {
|
||||
int const args[]{level, GET_FLAG};
|
||||
int args[]{level, GET_FLAG};
|
||||
return sendToDetector<int>(F_SET_PATTERN_WAIT_ADDR, args);
|
||||
}
|
||||
|
||||
void Module::setPatternWaitAddr(int level, int addr) {
|
||||
int const args[]{level, addr};
|
||||
int args[]{level, addr};
|
||||
sendToDetector<int>(F_SET_PATTERN_WAIT_ADDR, args);
|
||||
}
|
||||
|
||||
uint64_t Module::getPatternWaitClocks(int level) const {
|
||||
uint64_t const args[]{static_cast<uint64_t>(level),
|
||||
uint64_t args[]{static_cast<uint64_t>(level),
|
||||
static_cast<uint64_t>(GET_FLAG)};
|
||||
return sendToDetector<uint64_t>(F_SET_PATTERN_WAIT_CLOCKS, args);
|
||||
}
|
||||
|
||||
void Module::setPatternWaitClocks(int level, uint64_t t) {
|
||||
uint64_t const args[]{static_cast<uint64_t>(level), t};
|
||||
uint64_t args[]{static_cast<uint64_t>(level), t};
|
||||
sendToDetector<uint64_t>(F_SET_PATTERN_WAIT_CLOCKS, args);
|
||||
}
|
||||
|
||||
@@ -2715,7 +2717,7 @@ uint64_t Module::getPatternWaitInterval(int level) const {
|
||||
return sendToDetector<uint64_t>(F_GET_PATTERN_WAIT_INTERVAL, level);
|
||||
}
|
||||
void Module::setPatternWaitInterval(int level, uint64_t t) {
|
||||
uint64_t const args[]{static_cast<uint64_t>(level), t};
|
||||
uint64_t args[]{static_cast<uint64_t>(level), t};
|
||||
sendToDetector(F_SET_PATTERN_WAIT_INTERVAL, args, nullptr);
|
||||
}
|
||||
|
||||
@@ -2919,24 +2921,24 @@ uint32_t Module::readRegister(uint32_t addr) const {
|
||||
}
|
||||
|
||||
void Module::writeRegister(uint32_t addr, uint32_t val, bool validate) {
|
||||
uint32_t const args[]{addr, val, static_cast<uint32_t>(validate)};
|
||||
uint32_t args[]{addr, val, static_cast<uint32_t>(validate)};
|
||||
return sendToDetectorStop(F_WRITE_REGISTER, args, nullptr);
|
||||
}
|
||||
|
||||
void Module::setBit(uint32_t addr, int n, bool validate) {
|
||||
uint32_t const args[] = {addr, static_cast<uint32_t>(n),
|
||||
uint32_t args[] = {addr, static_cast<uint32_t>(n),
|
||||
static_cast<uint32_t>(validate)};
|
||||
sendToDetectorStop(F_SET_BIT, args, nullptr);
|
||||
}
|
||||
|
||||
void Module::clearBit(uint32_t addr, int n, bool validate) {
|
||||
uint32_t const args[] = {addr, static_cast<uint32_t>(n),
|
||||
uint32_t args[] = {addr, static_cast<uint32_t>(n),
|
||||
static_cast<uint32_t>(validate)};
|
||||
sendToDetectorStop(F_CLEAR_BIT, args, nullptr);
|
||||
}
|
||||
|
||||
int Module::getBit(uint32_t addr, int n) {
|
||||
uint32_t const args[2] = {addr, static_cast<uint32_t>(n)};
|
||||
uint32_t args[2] = {addr, static_cast<uint32_t>(n)};
|
||||
return sendToDetectorStop<int>(F_GET_BIT, args);
|
||||
}
|
||||
|
||||
@@ -2945,7 +2947,7 @@ void Module::executeFirmwareTest() { sendToDetector(F_SET_FIRMWARE_TEST); }
|
||||
void Module::executeBusTest() { sendToDetector(F_SET_BUS_TEST); }
|
||||
|
||||
void Module::writeAdcRegister(uint32_t addr, uint32_t val) {
|
||||
uint32_t const args[]{addr, val};
|
||||
uint32_t args[]{addr, val};
|
||||
sendToDetector(F_WRITE_ADC_REG, args, nullptr);
|
||||
}
|
||||
|
||||
@@ -3449,7 +3451,7 @@ void Module::initializeModuleStructure(detectorType type) {
|
||||
shm()->stoppedFlag = false;
|
||||
|
||||
// get the Module parameters based on type
|
||||
detParameters const parameters{type};
|
||||
detParameters parameters{type};
|
||||
shm()->nChan.x = parameters.nChanX;
|
||||
shm()->nChan.y = parameters.nChanY;
|
||||
shm()->nChip.x = parameters.nChipX;
|
||||
@@ -3463,12 +3465,12 @@ void Module::initialDetectorServerChecks() {
|
||||
}
|
||||
|
||||
void Module::checkDetectorVersionCompatibility() {
|
||||
std::string const detServers[2] = {getControlServerLongVersion(),
|
||||
std::string detServers[2] = {getControlServerLongVersion(),
|
||||
getStopServerLongVersion()};
|
||||
for (int i = 0; i != 2; ++i) {
|
||||
// det and client (sem. versioning)
|
||||
Version const det(detServers[i]);
|
||||
Version const client(APILIB);
|
||||
Version det(detServers[i]);
|
||||
Version client(APILIB);
|
||||
if (det.hasSemanticVersioning() && client.hasSemanticVersioning()) {
|
||||
if (!det.isBackwardCompatible(client)) {
|
||||
std::ostringstream oss;
|
||||
@@ -3482,7 +3484,7 @@ void Module::checkDetectorVersionCompatibility() {
|
||||
}
|
||||
// comparing dates(exact match to expected)
|
||||
else {
|
||||
Version const expectedDetector(getDetectorAPI());
|
||||
Version expectedDetector(getDetectorAPI());
|
||||
if (det != expectedDetector) {
|
||||
std::ostringstream oss;
|
||||
oss << "Detector (" << (i == 0 ? "Control" : "Stop")
|
||||
@@ -3521,8 +3523,8 @@ const std::string Module::getDetectorAPI() const {
|
||||
|
||||
void Module::checkReceiverVersionCompatibility() {
|
||||
// rxr and client (sem. versioning)
|
||||
Version const rxr(getReceiverLongVersion());
|
||||
Version const client(APILIB);
|
||||
Version rxr(getReceiverLongVersion());
|
||||
Version client(APILIB);
|
||||
if (rxr.hasSemanticVersioning() && client.hasSemanticVersioning()) {
|
||||
if (!rxr.isBackwardCompatible(client)) {
|
||||
std::ostringstream oss;
|
||||
@@ -3535,7 +3537,7 @@ void Module::checkReceiverVersionCompatibility() {
|
||||
}
|
||||
// comparing dates(exact match to expected)
|
||||
else {
|
||||
Version const expectedReceiver(APIRECEIVER);
|
||||
Version expectedReceiver(APIRECEIVER);
|
||||
if (rxr != expectedReceiver) {
|
||||
std::ostringstream oss;
|
||||
oss << "Receiver version (" << rxr.getDate()
|
||||
@@ -3666,7 +3668,7 @@ void Module::sendModule(sls_detector_module *myMod, ClientSocket &client) {
|
||||
ts += n;
|
||||
LOG(level) << "channels sent. " << n << " bytes";
|
||||
|
||||
int const expectedBytesSent = sizeof(sls_detector_module) - sizeof(myMod->dacs) -
|
||||
int expectedBytesSent = sizeof(sls_detector_module) - sizeof(myMod->dacs) -
|
||||
sizeof(myMod->chanregs) +
|
||||
(myMod->ndac * sizeof(int)) +
|
||||
(myMod->nchan * sizeof(int));
|
||||
@@ -3732,7 +3734,7 @@ sls_detector_module Module::interpolateTrim(sls_detector_module *a,
|
||||
"Interpolation of Trim values not implemented for this detector!");
|
||||
}
|
||||
|
||||
sls_detector_module const myMod{shm()->detType};
|
||||
sls_detector_module myMod{shm()->detType};
|
||||
|
||||
// create copy and interpolate dac lists
|
||||
std::vector<int> dacs_to_copy, dacs_to_interpolate;
|
||||
@@ -3878,7 +3880,7 @@ sls_detector_module Module::readSettingsFile(const std::string &fname,
|
||||
|
||||
// mythen3 (dacs, trimbits)
|
||||
else if (shm()->detType == MYTHEN3) {
|
||||
int const expected_size = sizeof(int) * myMod.ndac +
|
||||
int expected_size = sizeof(int) * myMod.ndac +
|
||||
sizeof(int) * myMod.nchan + sizeof(myMod.reg);
|
||||
if (file_size != expected_size) {
|
||||
throw RuntimeError("The size of the settings file: " + fname +
|
||||
@@ -3957,7 +3959,7 @@ void Module::sendProgram(bool blackfin, std::vector<char> buffer,
|
||||
client.Send(filesize);
|
||||
|
||||
// send checksum
|
||||
std::string const checksum = md5_calculate_checksum(buffer.data(), filesize);
|
||||
std::string checksum = md5_calculate_checksum(buffer.data(), filesize);
|
||||
LOG(logDEBUG1) << "Checksum:" << checksum;
|
||||
char cChecksum[MAX_STR_LENGTH] = {0};
|
||||
strcpy(cChecksum, checksum.c_str());
|
||||
|
||||
@@ -114,14 +114,14 @@ size_t Pattern::load(const std::string &fname) {
|
||||
it, std::istream_iterator<std::string>());
|
||||
|
||||
std::string cmd = args[0];
|
||||
int const nargs = args.size() - 1;
|
||||
int nargs = args.size() - 1;
|
||||
|
||||
if (cmd == "patword") {
|
||||
if (nargs != 2) {
|
||||
throw RuntimeError("Invalid arguments for " +
|
||||
ToString(args));
|
||||
}
|
||||
uint32_t const addr = StringTo<uint32_t>(args[1]);
|
||||
uint32_t addr = StringTo<uint32_t>(args[1]);
|
||||
if (addr >= MAX_PATTERN_LENGTH) {
|
||||
throw RuntimeError("Invalid address for " + ToString(args));
|
||||
}
|
||||
@@ -162,8 +162,8 @@ size_t Pattern::load(const std::string &fname) {
|
||||
throw RuntimeError("Invalid Pattern level. Options 0-" +
|
||||
std::to_string(MAX_PATTERN_LEVELS - 1));
|
||||
}
|
||||
int const loop1 = StringTo<uint32_t>(args[iArg++]);
|
||||
int const loop2 = StringTo<uint32_t>(args[iArg++]);
|
||||
int loop1 = StringTo<uint32_t>(args[iArg++]);
|
||||
int loop2 = StringTo<uint32_t>(args[iArg++]);
|
||||
pat->startloop[level] = loop1;
|
||||
pat->stoploop[level] = loop2;
|
||||
} else if (cmd == "patnloop0" || cmd == "patnloop1" ||
|
||||
|
||||
@@ -25,27 +25,15 @@
|
||||
#include <sys/stat.h> // fstat
|
||||
#include <unistd.h>
|
||||
|
||||
// ********************** Defines for shared memory. **********************
|
||||
// WARNING! before chaning these search the codebase for their usage!
|
||||
|
||||
#define SHM_IS_VALID_CHECK_VERSION 0x250820
|
||||
|
||||
//Max shared memory name length in macOS is 31 characters
|
||||
#ifdef __APPLE__
|
||||
#define SHM_DETECTOR_PREFIX "/sls_"
|
||||
#define SHM_MODULE_PREFIX "_mod_"
|
||||
#else
|
||||
#define SHM_DETECTOR_PREFIX "/slsDetectorPackage_detector_"
|
||||
#define SHM_MODULE_PREFIX "_module_"
|
||||
#endif
|
||||
|
||||
#define SHM_ENV_NAME "SLSDETNAME"
|
||||
// ************************************************************************
|
||||
|
||||
namespace sls {
|
||||
|
||||
class CtbConfig;
|
||||
struct CtbConfig;
|
||||
// struct sharedDetector;
|
||||
|
||||
#define SHM_IS_VALID_CHECK_VERSION 0x250820
|
||||
#define SHM_DETECTOR_PREFIX "/slsDetectorPackage_detector_"
|
||||
#define SHM_MODULE_PREFIX "_module_"
|
||||
#define SHM_ENV_NAME "SLSDETNAME"
|
||||
|
||||
template <typename T, typename U> constexpr bool is_type() {
|
||||
return std::is_same_v<std::decay_t<U>, T>;
|
||||
@@ -154,7 +142,7 @@ template <typename T> class SharedMemory {
|
||||
std::string getName() const { return name; }
|
||||
|
||||
bool exists() {
|
||||
const int tempfd = shm_open(name.c_str(), O_RDWR, 0);
|
||||
int tempfd = shm_open(name.c_str(), O_RDWR, 0);
|
||||
if ((tempfd < 0) && (errno == ENOENT)) {
|
||||
return false;
|
||||
}
|
||||
@@ -163,7 +151,7 @@ template <typename T> class SharedMemory {
|
||||
}
|
||||
|
||||
void createSharedMemory() {
|
||||
const int fd = shm_open(name.c_str(), O_CREAT | O_TRUNC | O_EXCL | O_RDWR,
|
||||
int fd = shm_open(name.c_str(), O_CREAT | O_TRUNC | O_EXCL | O_RDWR,
|
||||
S_IRUSR | S_IWUSR);
|
||||
if (fd < 0) {
|
||||
std::string msg =
|
||||
@@ -184,9 +172,9 @@ template <typename T> class SharedMemory {
|
||||
}
|
||||
|
||||
void openSharedMemory(bool verifySize) {
|
||||
const int fd = shm_open(name.c_str(), O_RDWR, 0);
|
||||
int fd = shm_open(name.c_str(), O_RDWR, 0);
|
||||
if (fd < 0) {
|
||||
const std::string msg = "Open existing shared memory " + name +
|
||||
std::string msg = "Open existing shared memory " + name +
|
||||
" failed: " + strerror(errno);
|
||||
throw SharedMemoryError(msg);
|
||||
}
|
||||
@@ -198,7 +186,7 @@ template <typename T> class SharedMemory {
|
||||
void unmapSharedMemory() {
|
||||
if (shared_struct != nullptr) {
|
||||
if (munmap(shared_struct, sizeof(T)) < 0) {
|
||||
const std::string msg = "Unmapping shared memory " + name +
|
||||
std::string msg = "Unmapping shared memory " + name +
|
||||
" failed: " + strerror(errno);
|
||||
throw SharedMemoryError(msg);
|
||||
}
|
||||
@@ -213,7 +201,7 @@ template <typename T> class SharedMemory {
|
||||
// silent exit if shm did not exist anyway
|
||||
if (errno == ENOENT)
|
||||
return;
|
||||
const std::string msg =
|
||||
std::string msg =
|
||||
"Free Shared Memory " + name + " Failed: " + strerror(errno);
|
||||
throw SharedMemoryError(msg);
|
||||
}
|
||||
@@ -244,7 +232,7 @@ template <typename T> class SharedMemory {
|
||||
|
||||
std::string shm_name = ss.str();
|
||||
if (shm_name.length() > NAME_MAX_LENGTH) {
|
||||
const std::string msg =
|
||||
std::string msg =
|
||||
"Shared memory initialization failed. " + shm_name + " has " +
|
||||
std::to_string(shm_name.length()) + " characters. \n" +
|
||||
"Maximum is " + std::to_string(NAME_MAX_LENGTH) +
|
||||
@@ -262,7 +250,7 @@ template <typename T> class SharedMemory {
|
||||
mmap(nullptr, sizeof(T), PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);
|
||||
close(fd);
|
||||
if (addr == MAP_FAILED) {
|
||||
const std::string msg =
|
||||
std::string msg =
|
||||
"Mapping shared memory " + name + " failed: " + strerror(errno);
|
||||
throw SharedMemoryError(msg);
|
||||
}
|
||||
@@ -272,22 +260,17 @@ template <typename T> class SharedMemory {
|
||||
void checkSize(int fd) {
|
||||
struct stat sb;
|
||||
if (fstat(fd, &sb) < 0) {
|
||||
const std::string msg = "Could not verify existing shared memory " +
|
||||
std::string msg = "Could not verify existing shared memory " +
|
||||
name + " size match " +
|
||||
"(could not fstat): " + strerror(errno);
|
||||
close(fd);
|
||||
throw SharedMemoryError(msg);
|
||||
}
|
||||
|
||||
#ifdef __APPLE__
|
||||
// On macOS, fstat returns the allocated size and not the requested size.
|
||||
// This means we can't check for size since we always get for example 16384 bytes.
|
||||
return;
|
||||
#endif
|
||||
auto actual_size = static_cast<size_t>(sb.st_size);
|
||||
auto expected_size = sizeof(T);
|
||||
if (actual_size != expected_size) {
|
||||
const std::string msg =
|
||||
std::string msg =
|
||||
"Existing shared memory " + name + " size does not match. " +
|
||||
"Expected " + std::to_string(expected_size) + ", found " +
|
||||
std::to_string(actual_size) +
|
||||
|
||||
@@ -8,7 +8,6 @@ target_sources(tests PRIVATE
|
||||
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/Caller/test-Caller.cpp
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/Caller/test-Caller-rx.cpp
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/Caller/test-Caller-rx-running.cpp
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/Caller/test-Caller-pattern.cpp
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/Caller/test-Caller-eiger.cpp
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/Caller/test-Caller-jungfrau.cpp
|
||||
|
||||
@@ -29,18 +29,18 @@ TEST_CASE("jungfrau_or_moench_acquire_check_file_size",
|
||||
auto num_udp_interfaces = det.getNumberofUDPInterfaces().tsquash(
|
||||
"inconsistent number of udp interfaces");
|
||||
|
||||
int const num_frames_to_acquire = 2;
|
||||
int num_frames_to_acquire = 2;
|
||||
create_files_for_acquire(det, caller, num_frames_to_acquire);
|
||||
|
||||
// check file size (assuming local pc)
|
||||
{
|
||||
detParameters const par(det_type);
|
||||
int const bytes_per_pixel = det.getDynamicRange().squash() / 8;
|
||||
detParameters par(det_type);
|
||||
int bytes_per_pixel = det.getDynamicRange().squash() / 8;
|
||||
// if 2 udp interfaces, data split into half
|
||||
size_t const expected_image_size = (par.nChanX * par.nChanY * par.nChipX *
|
||||
size_t expected_image_size = (par.nChanX * par.nChanY * par.nChipX *
|
||||
par.nChipY * bytes_per_pixel) /
|
||||
num_udp_interfaces;
|
||||
testFileInfo const test_file_info;
|
||||
testFileInfo test_file_info;
|
||||
test_acquire_binary_file_size(test_file_info, num_frames_to_acquire,
|
||||
expected_image_size);
|
||||
}
|
||||
@@ -55,23 +55,23 @@ TEST_CASE("eiger_acquire_check_file_size", "[.cmdcall][.cmdacquire]") {
|
||||
|
||||
if (det_type == defs::EIGER) {
|
||||
|
||||
int const dynamic_range = det.getDynamicRange().squash();
|
||||
int dynamic_range = det.getDynamicRange().squash();
|
||||
if (dynamic_range != 16) {
|
||||
throw RuntimeError(
|
||||
"Eiger detector must have dynamic range 16 to test");
|
||||
}
|
||||
int const num_frames_to_acquire = 2;
|
||||
int num_frames_to_acquire = 2;
|
||||
create_files_for_acquire(det, caller, num_frames_to_acquire);
|
||||
|
||||
// check file size (assuming local pc)
|
||||
{
|
||||
detParameters const par(det_type);
|
||||
detParameters par(det_type);
|
||||
// data split into half due to 2 udp interfaces per half module
|
||||
int const num_chips = (par.nChipX / 2);
|
||||
int const bytes_per_pixel = (dynamic_range / 8);
|
||||
size_t const expected_image_size =
|
||||
int num_chips = (par.nChipX / 2);
|
||||
int bytes_per_pixel = (dynamic_range / 8);
|
||||
size_t expected_image_size =
|
||||
par.nChanX * par.nChanY * num_chips * bytes_per_pixel;
|
||||
testFileInfo const test_file_info;
|
||||
testFileInfo test_file_info;
|
||||
test_acquire_binary_file_size(test_file_info, num_frames_to_acquire,
|
||||
expected_image_size);
|
||||
}
|
||||
@@ -86,25 +86,25 @@ TEST_CASE("mythen3_acquire_check_file_size", "[.cmdcall][.cmdacquire]") {
|
||||
|
||||
if (det_type == defs::MYTHEN3) {
|
||||
|
||||
int const dynamic_range = det.getDynamicRange().squash();
|
||||
int const counter_mask = det.getCounterMask().squash();
|
||||
int dynamic_range = det.getDynamicRange().squash();
|
||||
int counter_mask = det.getCounterMask().squash();
|
||||
if (dynamic_range != 16 && counter_mask != 0x3) {
|
||||
throw RuntimeError("Mythen3 detector must have dynamic range 16 "
|
||||
"and counter mask 0x3 to test");
|
||||
}
|
||||
int const num_counters = __builtin_popcount(counter_mask);
|
||||
int const num_frames_to_acquire = 2;
|
||||
int num_counters = __builtin_popcount(counter_mask);
|
||||
int num_frames_to_acquire = 2;
|
||||
create_files_for_acquire(det, caller, num_frames_to_acquire);
|
||||
|
||||
// check file size (assuming local pc)
|
||||
{
|
||||
detParameters const par(det_type);
|
||||
int const bytes_per_pixel = dynamic_range / 8;
|
||||
int const num_channels_per_counter = par.nChanX / 3;
|
||||
size_t const expected_image_size = num_channels_per_counter *
|
||||
detParameters par(det_type);
|
||||
int bytes_per_pixel = dynamic_range / 8;
|
||||
int num_channels_per_counter = par.nChanX / 3;
|
||||
size_t expected_image_size = num_channels_per_counter *
|
||||
num_counters * par.nChipX *
|
||||
bytes_per_pixel;
|
||||
testFileInfo const test_file_info;
|
||||
testFileInfo test_file_info;
|
||||
test_acquire_binary_file_size(test_file_info, num_frames_to_acquire,
|
||||
expected_image_size);
|
||||
}
|
||||
@@ -119,16 +119,16 @@ TEST_CASE("gotthard2_acquire_check_file_size", "[.cmdcall][.cmdacquire]") {
|
||||
|
||||
if (det_type == defs::GOTTHARD2) {
|
||||
|
||||
int const num_frames_to_acquire = 2;
|
||||
int num_frames_to_acquire = 2;
|
||||
create_files_for_acquire(det, caller, num_frames_to_acquire);
|
||||
|
||||
// check file size (assuming local pc)
|
||||
{
|
||||
detParameters const par(det_type);
|
||||
int const bytes_per_pixel = det.getDynamicRange().squash() / 8;
|
||||
size_t const expected_image_size =
|
||||
detParameters par(det_type);
|
||||
int bytes_per_pixel = det.getDynamicRange().squash() / 8;
|
||||
size_t expected_image_size =
|
||||
par.nChanX * par.nChipX * bytes_per_pixel;
|
||||
testFileInfo const test_file_info;
|
||||
testFileInfo test_file_info;
|
||||
test_acquire_binary_file_size(test_file_info, num_frames_to_acquire,
|
||||
expected_image_size);
|
||||
}
|
||||
@@ -143,9 +143,9 @@ void test_ctb_file_size_with_acquire(Detector &det, Caller &caller,
|
||||
create_files_for_acquire(det, caller, num_frames, test_info);
|
||||
|
||||
// check file size (assuming local pc)
|
||||
uint64_t const expected_image_size =
|
||||
uint64_t expected_image_size =
|
||||
calculate_ctb_image_size(test_info, isXilinxCtb).first;
|
||||
testFileInfo const test_file_info;
|
||||
testFileInfo test_file_info;
|
||||
REQUIRE_NOTHROW(test_acquire_binary_file_size(test_file_info, num_frames,
|
||||
expected_image_size));
|
||||
}
|
||||
@@ -158,8 +158,8 @@ TEST_CASE("ctb_acquire_check_file_size", "[.cmdcall][.cmdacquire]") {
|
||||
|
||||
if (det_type == defs::CHIPTESTBOARD ||
|
||||
det_type == defs::XILINX_CHIPTESTBOARD) {
|
||||
bool const isXilinxCtb = (det_type == defs::XILINX_CHIPTESTBOARD);
|
||||
int const num_frames_to_acquire = 2;
|
||||
bool isXilinxCtb = (det_type == defs::XILINX_CHIPTESTBOARD);
|
||||
int num_frames_to_acquire = 2;
|
||||
// all the test cases
|
||||
{
|
||||
testCtbAcquireInfo test_ctb_config{};
|
||||
|
||||
@@ -26,8 +26,8 @@ TEST_CASE("dacname", "[.cmdcall]") {
|
||||
|
||||
if (det_type == defs::CHIPTESTBOARD ||
|
||||
det_type == defs::XILINX_CHIPTESTBOARD) {
|
||||
defs::dacIndex const ind = static_cast<defs::dacIndex>(2);
|
||||
std::string const str_dac_index = "2";
|
||||
defs::dacIndex ind = static_cast<defs::dacIndex>(2);
|
||||
std::string str_dac_index = "2";
|
||||
auto prev = det.getDacName(ind);
|
||||
|
||||
// 1 arg throw
|
||||
@@ -61,8 +61,8 @@ TEST_CASE("dacindex", "[.cmdcall]") {
|
||||
|
||||
if (det_type == defs::CHIPTESTBOARD ||
|
||||
det_type == defs::XILINX_CHIPTESTBOARD) {
|
||||
defs::dacIndex const ind = static_cast<defs::dacIndex>(2);
|
||||
std::string const str_dac_index = "2";
|
||||
defs::dacIndex ind = static_cast<defs::dacIndex>(2);
|
||||
std::string str_dac_index = "2";
|
||||
|
||||
// 1 arg throw
|
||||
REQUIRE_THROWS(caller.call("dacindex", {"2", "2"}, -1, PUT));
|
||||
@@ -120,8 +120,8 @@ TEST_CASE("adcname", "[.cmdcall]") {
|
||||
|
||||
if (det_type == defs::CHIPTESTBOARD ||
|
||||
det_type == defs::XILINX_CHIPTESTBOARD) {
|
||||
int const ind = 2;
|
||||
std::string const str_adc_index = "2";
|
||||
int ind = 2;
|
||||
std::string str_adc_index = "2";
|
||||
auto prev = det.getAdcName(ind);
|
||||
|
||||
// 1 arg throw
|
||||
@@ -155,8 +155,8 @@ TEST_CASE("adcindex", "[.cmdcall]") {
|
||||
|
||||
if (det_type == defs::CHIPTESTBOARD ||
|
||||
det_type == defs::XILINX_CHIPTESTBOARD) {
|
||||
int const ind = 2;
|
||||
std::string const str_adc_index = "2";
|
||||
int ind = 2;
|
||||
std::string str_adc_index = "2";
|
||||
|
||||
// 1 arg throw
|
||||
REQUIRE_THROWS(caller.call("adcindex", {"2", "2"}, -1, PUT));
|
||||
@@ -214,8 +214,8 @@ TEST_CASE("signalname", "[.cmdcall]") {
|
||||
|
||||
if (det_type == defs::CHIPTESTBOARD ||
|
||||
det_type == defs::XILINX_CHIPTESTBOARD) {
|
||||
int const ind = 2;
|
||||
std::string const str_signal_index = "2";
|
||||
int ind = 2;
|
||||
std::string str_signal_index = "2";
|
||||
auto prev = det.getSignalName(ind);
|
||||
|
||||
// 1 arg throw
|
||||
@@ -249,8 +249,8 @@ TEST_CASE("signalindex", "[.cmdcall]") {
|
||||
|
||||
if (det_type == defs::CHIPTESTBOARD ||
|
||||
det_type == defs::XILINX_CHIPTESTBOARD) {
|
||||
int const ind = 2;
|
||||
std::string const str_signal_index = "2";
|
||||
int ind = 2;
|
||||
std::string str_signal_index = "2";
|
||||
|
||||
// 1 arg throw
|
||||
REQUIRE_THROWS(caller.call("signalindex", {"2", "2"}, -1, PUT));
|
||||
@@ -309,8 +309,8 @@ TEST_CASE("powername", "[.cmdcall]") {
|
||||
|
||||
if (det_type == defs::CHIPTESTBOARD ||
|
||||
det_type == defs::XILINX_CHIPTESTBOARD) {
|
||||
defs::dacIndex const ind = static_cast<defs::dacIndex>(2 + defs::V_POWER_A);
|
||||
std::string const str_power_index = "2";
|
||||
defs::dacIndex ind = static_cast<defs::dacIndex>(2 + defs::V_POWER_A);
|
||||
std::string str_power_index = "2";
|
||||
auto prev = det.getPowerName(ind);
|
||||
|
||||
// 1 arg throw
|
||||
@@ -344,8 +344,8 @@ TEST_CASE("powerindex", "[.cmdcall]") {
|
||||
|
||||
if (det_type == defs::CHIPTESTBOARD ||
|
||||
det_type == defs::XILINX_CHIPTESTBOARD) {
|
||||
defs::dacIndex const ind = static_cast<defs::dacIndex>(2 + defs::V_POWER_A);
|
||||
std::string const str_power_index = "2";
|
||||
defs::dacIndex ind = static_cast<defs::dacIndex>(2 + defs::V_POWER_A);
|
||||
std::string str_power_index = "2";
|
||||
|
||||
// 1 arg throw
|
||||
REQUIRE_THROWS(caller.call("powerindex", {"2", "2"}, -1, PUT));
|
||||
@@ -430,8 +430,8 @@ TEST_CASE("slowadcname", "[.cmdcall]") {
|
||||
|
||||
if (det_type == defs::CHIPTESTBOARD ||
|
||||
det_type == defs::XILINX_CHIPTESTBOARD) {
|
||||
defs::dacIndex const ind = static_cast<defs::dacIndex>(2 + defs::SLOW_ADC0);
|
||||
std::string const str_slowadc_index = "2";
|
||||
defs::dacIndex ind = static_cast<defs::dacIndex>(2 + defs::SLOW_ADC0);
|
||||
std::string str_slowadc_index = "2";
|
||||
auto prev = det.getSlowADCName(ind);
|
||||
|
||||
// 1 arg throw
|
||||
@@ -466,8 +466,8 @@ TEST_CASE("slowadcindex", "[.cmdcall]") {
|
||||
|
||||
if (det_type == defs::CHIPTESTBOARD ||
|
||||
det_type == defs::XILINX_CHIPTESTBOARD) {
|
||||
defs::dacIndex const ind = static_cast<defs::dacIndex>(2 + defs::SLOW_ADC0);
|
||||
std::string const str_slowadc_index = "2";
|
||||
defs::dacIndex ind = static_cast<defs::dacIndex>(2 + defs::SLOW_ADC0);
|
||||
std::string str_slowadc_index = "2";
|
||||
|
||||
// 1 arg throw
|
||||
REQUIRE_THROWS(caller.call("slowadcindex", {"2", "2"}, -1, PUT));
|
||||
@@ -1025,43 +1025,91 @@ TEST_CASE("dbitclk", "[.cmdcall]") {
|
||||
}
|
||||
}
|
||||
|
||||
TEST_CASE("v_abcd", "[.cmdcall]") {
|
||||
TEST_CASE("v_a", "[.cmdcall]") {
|
||||
Detector det;
|
||||
Caller caller(&det);
|
||||
auto det_type = det.getDetectorType().squash();
|
||||
|
||||
std::vector<std::string> cmds{"v_a", "v_b", "v_c", "v_d"};
|
||||
std::vector<defs::dacIndex> indices{defs::V_POWER_A, defs::V_POWER_B,
|
||||
defs::V_POWER_C, defs::V_POWER_D};
|
||||
|
||||
if (det.isVirtualDetectorServer().tsquash("Inconsistent virtual servers")) {
|
||||
cmds.push_back("v_io");
|
||||
indices.push_back(defs::V_POWER_IO);
|
||||
}
|
||||
|
||||
for (size_t i = 0; i < cmds.size(); ++i) {
|
||||
if (det_type == defs::CHIPTESTBOARD ||
|
||||
det_type == defs::XILINX_CHIPTESTBOARD) {
|
||||
auto prev_val = det.getPower(indices[i]);
|
||||
{
|
||||
std::ostringstream oss;
|
||||
caller.call(cmds[i], {"0"}, -1, PUT, oss);
|
||||
REQUIRE(oss.str() == cmds[i] + " 0\n");
|
||||
}
|
||||
{
|
||||
std::ostringstream oss1, oss2;
|
||||
caller.call(cmds[i], {"1200"}, -1, PUT, oss1);
|
||||
REQUIRE(oss1.str() == cmds[i] + " 1200\n");
|
||||
caller.call(cmds[i], {}, -1, GET, oss2);
|
||||
REQUIRE(oss2.str() == cmds[i] + " 1200\n");
|
||||
}
|
||||
for (int i = 0; i != det.size(); ++i) {
|
||||
det.setPower(indices[i], prev_val[i], {i});
|
||||
}
|
||||
|
||||
} else {
|
||||
REQUIRE_THROWS(caller.call(cmds[i], {}, -1, GET));
|
||||
if (det_type == defs::CHIPTESTBOARD ||
|
||||
det_type == defs::XILINX_CHIPTESTBOARD) {
|
||||
auto prev_val = det.getPower(defs::V_POWER_A);
|
||||
{
|
||||
std::ostringstream oss1, oss2;
|
||||
caller.call("v_a", {"1200"}, -1, PUT, oss1);
|
||||
REQUIRE(oss1.str() == "v_a 1200\n");
|
||||
caller.call("v_a", {}, -1, GET, oss2);
|
||||
REQUIRE(oss2.str() == "v_a 1200\n");
|
||||
}
|
||||
for (int i = 0; i != det.size(); ++i) {
|
||||
det.setPower(defs::V_POWER_A, prev_val[i], {i});
|
||||
}
|
||||
} else {
|
||||
REQUIRE_THROWS(caller.call("v_a", {}, -1, GET));
|
||||
}
|
||||
}
|
||||
|
||||
TEST_CASE("v_b", "[.cmdcall]") {
|
||||
Detector det;
|
||||
Caller caller(&det);
|
||||
auto det_type = det.getDetectorType().squash();
|
||||
if (det_type == defs::CHIPTESTBOARD ||
|
||||
det_type == defs::XILINX_CHIPTESTBOARD) {
|
||||
auto prev_val = det.getPower(defs::V_POWER_B);
|
||||
{
|
||||
std::ostringstream oss1, oss2;
|
||||
caller.call("v_b", {"1200"}, -1, PUT, oss1);
|
||||
REQUIRE(oss1.str() == "v_b 1200\n");
|
||||
caller.call("v_b", {}, -1, GET, oss2);
|
||||
REQUIRE(oss2.str() == "v_b 1200\n");
|
||||
}
|
||||
for (int i = 0; i != det.size(); ++i) {
|
||||
det.setPower(defs::V_POWER_B, prev_val[i], {i});
|
||||
}
|
||||
} else {
|
||||
REQUIRE_THROWS(caller.call("v_b", {}, -1, GET));
|
||||
}
|
||||
}
|
||||
|
||||
TEST_CASE("v_c", "[.cmdcall]") {
|
||||
Detector det;
|
||||
Caller caller(&det);
|
||||
auto det_type = det.getDetectorType().squash();
|
||||
if (det_type == defs::CHIPTESTBOARD ||
|
||||
det_type == defs::XILINX_CHIPTESTBOARD) {
|
||||
auto prev_val = det.getPower(defs::V_POWER_C);
|
||||
{
|
||||
std::ostringstream oss1, oss2;
|
||||
caller.call("v_c", {"1200"}, -1, PUT, oss1);
|
||||
REQUIRE(oss1.str() == "v_c 1200\n");
|
||||
caller.call("v_c", {}, -1, GET, oss2);
|
||||
REQUIRE(oss2.str() == "v_c 1200\n");
|
||||
}
|
||||
for (int i = 0; i != det.size(); ++i) {
|
||||
det.setPower(defs::V_POWER_C, prev_val[i], {i});
|
||||
}
|
||||
} else {
|
||||
REQUIRE_THROWS(caller.call("v_c", {}, -1, GET));
|
||||
}
|
||||
}
|
||||
|
||||
TEST_CASE("v_d", "[.cmdcall]") {
|
||||
Detector det;
|
||||
Caller caller(&det);
|
||||
auto det_type = det.getDetectorType().squash();
|
||||
if (det_type == defs::CHIPTESTBOARD ||
|
||||
det_type == defs::XILINX_CHIPTESTBOARD) {
|
||||
auto prev_val = det.getPower(defs::V_POWER_D);
|
||||
{
|
||||
std::ostringstream oss1, oss2;
|
||||
caller.call("v_d", {"1200"}, -1, PUT, oss1);
|
||||
REQUIRE(oss1.str() == "v_d 1200\n");
|
||||
caller.call("v_d", {}, -1, GET, oss2);
|
||||
REQUIRE(oss2.str() == "v_d 1200\n");
|
||||
}
|
||||
for (int i = 0; i != det.size(); ++i) {
|
||||
det.setPower(defs::V_POWER_D, prev_val[i], {i});
|
||||
}
|
||||
} else {
|
||||
REQUIRE_THROWS(caller.call("v_d", {}, -1, GET));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -27,7 +27,7 @@ TEST_CASE("temp_fpgaext", "[.cmdcall]") {
|
||||
REQUIRE_NOTHROW(caller.call("temp_fpgaext", {}, -1, GET));
|
||||
std::ostringstream oss;
|
||||
REQUIRE_NOTHROW(caller.call("temp_fpgaext", {}, 0, GET, oss));
|
||||
std::string const s = (oss.str()).erase(0, strlen("temp_fpgaext "));
|
||||
std::string s = (oss.str()).erase(0, strlen("temp_fpgaext "));
|
||||
REQUIRE(std::stoi(s) != -1);
|
||||
} else {
|
||||
REQUIRE_THROWS(caller.call("temp_fpgaext", {}, -1, GET));
|
||||
@@ -42,7 +42,7 @@ TEST_CASE("temp_10ge", "[.cmdcall]") {
|
||||
REQUIRE_NOTHROW(caller.call("temp_10ge", {}, -1, GET));
|
||||
std::ostringstream oss;
|
||||
REQUIRE_NOTHROW(caller.call("temp_10ge", {}, 0, GET, oss));
|
||||
std::string const s = (oss.str()).erase(0, strlen("temp_10ge "));
|
||||
std::string s = (oss.str()).erase(0, strlen("temp_10ge "));
|
||||
REQUIRE(std::stoi(s) != -1);
|
||||
} else {
|
||||
REQUIRE_THROWS(caller.call("temp_10ge", {}, -1, GET));
|
||||
@@ -57,7 +57,7 @@ TEST_CASE("temp_dcdc", "[.cmdcall]") {
|
||||
REQUIRE_NOTHROW(caller.call("temp_dcdc", {}, -1, GET));
|
||||
std::ostringstream oss;
|
||||
REQUIRE_NOTHROW(caller.call("temp_dcdc", {}, 0, GET, oss));
|
||||
std::string const s = (oss.str()).erase(0, strlen("temp_dcdc "));
|
||||
std::string s = (oss.str()).erase(0, strlen("temp_dcdc "));
|
||||
REQUIRE(std::stoi(s) != -1);
|
||||
} else {
|
||||
REQUIRE_THROWS(caller.call("temp_dcdc", {}, -1, GET));
|
||||
@@ -72,7 +72,7 @@ TEST_CASE("temp_sodl", "[.cmdcall]") {
|
||||
REQUIRE_NOTHROW(caller.call("temp_sodl", {}, -1, GET));
|
||||
std::ostringstream oss;
|
||||
REQUIRE_NOTHROW(caller.call("temp_sodl", {}, 0, GET, oss));
|
||||
std::string const s = (oss.str()).erase(0, strlen("temp_sodl "));
|
||||
std::string s = (oss.str()).erase(0, strlen("temp_sodl "));
|
||||
REQUIRE(std::stoi(s) != -1);
|
||||
} else {
|
||||
REQUIRE_THROWS(caller.call("temp_sodl", {}, -1, GET));
|
||||
@@ -87,7 +87,7 @@ TEST_CASE("temp_sodr", "[.cmdcall]") {
|
||||
REQUIRE_NOTHROW(caller.call("temp_sodr", {}, -1, GET));
|
||||
std::ostringstream oss;
|
||||
REQUIRE_NOTHROW(caller.call("temp_sodr", {}, 0, GET, oss));
|
||||
std::string const s = (oss.str()).erase(0, strlen("temp_sodr "));
|
||||
std::string s = (oss.str()).erase(0, strlen("temp_sodr "));
|
||||
REQUIRE(std::stoi(s) != -1);
|
||||
} else {
|
||||
REQUIRE_THROWS(caller.call("temp_sodr", {}, -1, GET));
|
||||
@@ -102,7 +102,7 @@ TEST_CASE("temp_fpgafl", "[.cmdcall]") {
|
||||
REQUIRE_NOTHROW(caller.call("temp_fpgafl", {}, -1, GET));
|
||||
std::ostringstream oss;
|
||||
REQUIRE_NOTHROW(caller.call("temp_fpgafl", {}, 0, GET, oss));
|
||||
std::string const s = (oss.str()).erase(0, strlen("temp_fpgafl "));
|
||||
std::string s = (oss.str()).erase(0, strlen("temp_fpgafl "));
|
||||
REQUIRE(std::stoi(s) != -1);
|
||||
} else {
|
||||
REQUIRE_THROWS(caller.call("temp_fpgafl", {}, -1, GET));
|
||||
@@ -117,7 +117,7 @@ TEST_CASE("temp_fpgafr", "[.cmdcall]") {
|
||||
REQUIRE_NOTHROW(caller.call("temp_fpgafr", {}, -1, GET));
|
||||
std::ostringstream oss;
|
||||
REQUIRE_NOTHROW(caller.call("temp_fpgafr", {}, 0, GET, oss));
|
||||
std::string const s = (oss.str()).erase(0, strlen("temp_fpgafr "));
|
||||
std::string s = (oss.str()).erase(0, strlen("temp_fpgafr "));
|
||||
REQUIRE(std::stoi(s) != -1);
|
||||
} else {
|
||||
REQUIRE_THROWS(caller.call("temp_fpgafr", {}, -1, GET));
|
||||
@@ -421,7 +421,7 @@ TEST_CASE("measuredperiod", "[.cmdcall]") {
|
||||
} else {
|
||||
s = st.erase(0, strlen("measuredperiod "));
|
||||
}
|
||||
double const val = std::stod(s);
|
||||
double val = std::stod(s);
|
||||
// REQUIRE(val >= 1.0);
|
||||
REQUIRE(val < 2.0);
|
||||
for (int i = 0; i != det.size(); ++i) {
|
||||
@@ -460,7 +460,7 @@ TEST_CASE("measuredsubperiod", "[.cmdcall]") {
|
||||
} else {
|
||||
s = st.erase(0, strlen("measuredsubperiod "));
|
||||
}
|
||||
double const val = std::stod(s);
|
||||
double val = std::stod(s);
|
||||
REQUIRE(val >= 0);
|
||||
REQUIRE(val < 1000);
|
||||
for (int i = 0; i != det.size(); ++i) {
|
||||
|
||||
@@ -22,9 +22,9 @@ void test_valid_port_caller(const std::string &command,
|
||||
if (arg.empty())
|
||||
arg.push_back("0");
|
||||
|
||||
int const test_values[3] = {77797, -1, 0};
|
||||
int test_values[3] = {77797, -1, 0};
|
||||
for (int i = 0; i != 3; ++i) {
|
||||
int const port_number = test_values[i];
|
||||
int port_number = test_values[i];
|
||||
arg[arg.size() - 1] = std::to_string(port_number);
|
||||
REQUIRE_THROWS(caller.call(command, arg, detector_id, action));
|
||||
/*REQUIRE_THROWS_WITH(proxy.Call(command, arguments, detector_id,
|
||||
@@ -72,7 +72,7 @@ void test_onchip_dac_caller(defs::dacIndex index, const std::string &dacname,
|
||||
REQUIRE_THROWS(
|
||||
caller.call(dacname, {"-1", "0x400"}, -1, PUT)); // max val is 0x3ff
|
||||
|
||||
int const chipIndex = -1; // for now, it is -1 only
|
||||
int chipIndex = -1; // for now, it is -1 only
|
||||
auto prev_val = det.getOnChipDAC(index, chipIndex);
|
||||
auto dacValueStr = ToStringHex(dacvalue);
|
||||
auto chipIndexStr = std::to_string(chipIndex);
|
||||
@@ -115,10 +115,10 @@ void test_acquire_binary_file_size(const testFileInfo &file_info,
|
||||
uint64_t num_frames_to_acquire,
|
||||
uint64_t expected_image_size) {
|
||||
assert(file_info.file_format == defs::BINARY);
|
||||
std::string const fname = file_info.file_path + "/" + file_info.file_prefix +
|
||||
std::string fname = file_info.file_path + "/" + file_info.file_prefix +
|
||||
"_d0_f0_" + std::to_string(file_info.file_acq_index) +
|
||||
".raw";
|
||||
uint64_t const expected_file_size =
|
||||
uint64_t expected_file_size =
|
||||
num_frames_to_acquire *
|
||||
(expected_image_size + sizeof(defs::sls_receiver_header));
|
||||
auto actual_file_size = std::filesystem::file_size(fname);
|
||||
@@ -136,7 +136,7 @@ void test_acquire_with_receiver(Caller &caller, const Detector &det) {
|
||||
REQUIRE_NOTHROW(caller.call("start", {}, -1, PUT));
|
||||
bool idle = false;
|
||||
while (!idle) {
|
||||
std::ostringstream const oss;
|
||||
std::ostringstream oss;
|
||||
REQUIRE_NOTHROW(caller.call("status", {}, -1, GET));
|
||||
auto statusList = det.getDetectorStatus();
|
||||
if (statusList.any(defs::ERROR)) {
|
||||
@@ -154,7 +154,7 @@ void create_files_for_acquire(
|
||||
const std::optional<testCtbAcquireInfo> &test_info) {
|
||||
|
||||
// save previous state
|
||||
testFileInfo const prev_file_info = get_file_state(det);
|
||||
testFileInfo prev_file_info = get_file_state(det);
|
||||
auto prev_num_frames = det.getNumberOfFrames().tsquash(
|
||||
"Inconsistent number of frames to acquire");
|
||||
std::optional<testCtbAcquireInfo> prev_ctb_config_info{};
|
||||
@@ -163,7 +163,7 @@ void create_files_for_acquire(
|
||||
}
|
||||
|
||||
// set state for acquire
|
||||
testFileInfo const test_file_info;
|
||||
testFileInfo test_file_info;
|
||||
set_file_state(det, test_file_info);
|
||||
det.setNumberOfFrames(num_frames);
|
||||
if (test_info) {
|
||||
@@ -265,10 +265,10 @@ calculate_ctb_image_size(const testCtbAcquireInfo &test_info,
|
||||
inputs.dbitList = test_info.dbit_list;
|
||||
|
||||
auto out = computeCtbImageSize(inputs);
|
||||
uint64_t const image_size =
|
||||
uint64_t image_size =
|
||||
out.nAnalogBytes + out.nDigitalBytes + out.nTransceiverBytes;
|
||||
LOG(logDEBUG1) << "Expected image size: " << image_size;
|
||||
int const npixelx = out.nPixelsX;
|
||||
int npixelx = out.nPixelsX;
|
||||
LOG(logDEBUG1) << "Expected number of pixels in x: " << npixelx;
|
||||
return std::make_pair(image_size, npixelx);
|
||||
}
|
||||
|
||||
@@ -580,9 +580,9 @@ TEST_CASE("pedestalmode", "[.cmdcall]") {
|
||||
REQUIRE(oss.str() == "pedestalmode [disabled]\n");
|
||||
}
|
||||
|
||||
uint8_t const pedestalFrames = 50;
|
||||
uint16_t const pedestalLoops = 100;
|
||||
int64_t const expNumFrames = pedestalFrames * pedestalLoops * 2;
|
||||
uint8_t pedestalFrames = 50;
|
||||
uint16_t pedestalLoops = 100;
|
||||
int64_t expNumFrames = pedestalFrames * pedestalLoops * 2;
|
||||
auto origFrames = det.getNumberOfFrames().squash(-1);
|
||||
auto origTriggers = det.getNumberOfTriggers().squash(-1);
|
||||
|
||||
|
||||
@@ -183,7 +183,7 @@ void read_from_json(const Document &doc, const std::string &name,
|
||||
}
|
||||
int index = 0;
|
||||
for (const auto &item : json_values) {
|
||||
std::string const sval = item.GetString();
|
||||
std::string sval = item.GetString();
|
||||
retval[index++] = StringTo<sls::ns>(sval);
|
||||
}
|
||||
}
|
||||
@@ -330,7 +330,7 @@ void test_master_file_version(const Detector &det,
|
||||
// different values for json and hdf5
|
||||
// hdf5 version in atttribute and not dataset
|
||||
double retval{};
|
||||
std::string const name = MasterAttributes::N_VERSION.data();
|
||||
std::string name = MasterAttributes::N_VERSION.data();
|
||||
if (doc.has_value()) {
|
||||
const auto &d = *doc;
|
||||
REQUIRE(d.HasMember(MasterAttributes::N_VERSION.data()));
|
||||
@@ -381,14 +381,14 @@ void test_master_file_image_size(const Detector &det,
|
||||
|
||||
auto det_type =
|
||||
det.getDetectorType().tsquash("Inconsistent detector types to test");
|
||||
int const bytes_per_pixel = det.getDynamicRange().squash() / 8;
|
||||
detParameters const par(det_type);
|
||||
int bytes_per_pixel = det.getDynamicRange().squash() / 8;
|
||||
detParameters par(det_type);
|
||||
|
||||
int image_size = 0;
|
||||
switch (det_type) {
|
||||
|
||||
case defs::EIGER: {
|
||||
int const num_chips = (par.nChipX / 2);
|
||||
int num_chips = (par.nChipX / 2);
|
||||
image_size = par.nChanX * par.nChanY * num_chips * bytes_per_pixel;
|
||||
} break;
|
||||
|
||||
@@ -402,9 +402,9 @@ void test_master_file_image_size(const Detector &det,
|
||||
} break;
|
||||
|
||||
case defs::MYTHEN3: {
|
||||
int const counter_mask = det.getCounterMask().squash();
|
||||
int const num_counters = __builtin_popcount(counter_mask);
|
||||
int const num_channels_per_counter = par.nChanX / MAX_NUM_COUNTERS;
|
||||
int counter_mask = det.getCounterMask().squash();
|
||||
int num_counters = __builtin_popcount(counter_mask);
|
||||
int num_channels_per_counter = par.nChanX / MAX_NUM_COUNTERS;
|
||||
image_size = num_channels_per_counter * num_counters * par.nChipX *
|
||||
bytes_per_pixel;
|
||||
} break;
|
||||
@@ -415,7 +415,7 @@ void test_master_file_image_size(const Detector &det,
|
||||
|
||||
case defs::CHIPTESTBOARD:
|
||||
case defs::XILINX_CHIPTESTBOARD: {
|
||||
testCtbAcquireInfo const test_info{};
|
||||
testCtbAcquireInfo test_info{};
|
||||
image_size = calculate_ctb_image_size(
|
||||
test_info, (det_type == defs::XILINX_CHIPTESTBOARD))
|
||||
.first;
|
||||
@@ -439,14 +439,14 @@ void test_master_file_det_size(const Detector &det,
|
||||
// m3 assumes all counters enabled when getting num channels from client
|
||||
// TODO: in future, remove assumption
|
||||
if (det_type == defs::MYTHEN3) {
|
||||
int const nchan = portSize.x / MAX_NUM_COUNTERS;
|
||||
int nchan = portSize.x / MAX_NUM_COUNTERS;
|
||||
auto counter_mask = det.getCounterMask().tsquash(
|
||||
"Inconsistent counter mask for Mythen3 detector");
|
||||
int const num_counters = __builtin_popcount(counter_mask);
|
||||
int num_counters = __builtin_popcount(counter_mask);
|
||||
portSize.x = nchan * num_counters;
|
||||
} else if (det_type == defs::CHIPTESTBOARD ||
|
||||
det_type == defs::XILINX_CHIPTESTBOARD) {
|
||||
testCtbAcquireInfo const test_info{};
|
||||
testCtbAcquireInfo test_info{};
|
||||
portSize.x = calculate_ctb_image_size(
|
||||
test_info, det_type == defs::XILINX_CHIPTESTBOARD)
|
||||
.second;
|
||||
@@ -534,7 +534,7 @@ void test_master_file_total_frames(const Detector &det,
|
||||
det.getNumberOfAdditionalStorageCells().tsquash(
|
||||
"Inconsistent number of additional storage cells");
|
||||
}
|
||||
uint64_t const total_frames =
|
||||
uint64_t total_frames =
|
||||
numFrames * repeats * (int64_t)(numAdditionalStorageCells + 1);
|
||||
|
||||
REQUIRE_NOTHROW(check_master_file<uint64_t>(
|
||||
@@ -549,14 +549,14 @@ void test_master_file_rois(const Detector &det,
|
||||
det.getDetectorType().tsquash("Inconsistent detector types to test");
|
||||
// compensate for m3 channel size and counter mask mess
|
||||
if (det_type == defs::MYTHEN3) {
|
||||
int const nchan = detsize.x / MAX_NUM_COUNTERS;
|
||||
int nchan = detsize.x / MAX_NUM_COUNTERS;
|
||||
auto counter_mask = det.getCounterMask().tsquash(
|
||||
"Inconsistent counter mask for Mythen3 detector");
|
||||
int const num_counters = __builtin_popcount(counter_mask);
|
||||
int num_counters = __builtin_popcount(counter_mask);
|
||||
detsize.x = nchan * num_counters;
|
||||
}
|
||||
// replace -1 for complete ROI
|
||||
bool const is2D = (detsize.y > 1);
|
||||
bool is2D = (detsize.y > 1);
|
||||
for (auto &roi : rois) {
|
||||
if (roi.completeRoi()) {
|
||||
roi.xmin = 0;
|
||||
@@ -751,7 +751,7 @@ void test_master_file_burst_mode(const Detector &det,
|
||||
|
||||
void test_master_file_adc_mask(const Detector &det,
|
||||
const std::optional<Document> &doc) {
|
||||
testCtbAcquireInfo const test_ctb_config{};
|
||||
testCtbAcquireInfo test_ctb_config{};
|
||||
auto adc_mask = test_ctb_config.adc_enable_10g;
|
||||
auto det_type = det.getDetectorType().squash();
|
||||
if (det_type == defs::CHIPTESTBOARD) {
|
||||
@@ -766,7 +766,7 @@ void test_master_file_adc_mask(const Detector &det,
|
||||
|
||||
void test_master_file_analog_flag(const Detector &det,
|
||||
const std::optional<Document> &doc) {
|
||||
testCtbAcquireInfo const test_info{};
|
||||
testCtbAcquireInfo test_info{};
|
||||
auto romode = test_info.readout_mode;
|
||||
auto analog = static_cast<int>(
|
||||
(romode == defs::ANALOG_ONLY || romode == defs::ANALOG_AND_DIGITAL));
|
||||
@@ -777,7 +777,7 @@ void test_master_file_analog_flag(const Detector &det,
|
||||
|
||||
void test_master_file_analog_samples(const Detector &det,
|
||||
const std::optional<Document> &doc) {
|
||||
testCtbAcquireInfo const test_info{};
|
||||
testCtbAcquireInfo test_info{};
|
||||
auto analog_samples = test_info.num_adc_samples;
|
||||
|
||||
REQUIRE_NOTHROW(check_master_file<int>(
|
||||
@@ -786,7 +786,7 @@ void test_master_file_analog_samples(const Detector &det,
|
||||
|
||||
void test_master_file_digital_flag(const Detector &det,
|
||||
const std::optional<Document> &doc) {
|
||||
testCtbAcquireInfo const test_info{};
|
||||
testCtbAcquireInfo test_info{};
|
||||
auto romode = test_info.readout_mode;
|
||||
auto digital = static_cast<int>(romode == defs::DIGITAL_ONLY ||
|
||||
romode == defs::ANALOG_AND_DIGITAL ||
|
||||
@@ -798,7 +798,7 @@ void test_master_file_digital_flag(const Detector &det,
|
||||
|
||||
void test_master_file_digital_samples(const Detector &det,
|
||||
const std::optional<Document> &doc) {
|
||||
testCtbAcquireInfo const test_info{};
|
||||
testCtbAcquireInfo test_info{};
|
||||
auto digital_samples = test_info.num_dbit_samples;
|
||||
|
||||
REQUIRE_NOTHROW(check_master_file<int>(
|
||||
@@ -807,7 +807,7 @@ void test_master_file_digital_samples(const Detector &det,
|
||||
|
||||
void test_master_file_dbit_offset(const Detector &det,
|
||||
const std::optional<Document> &doc) {
|
||||
testCtbAcquireInfo const test_info{};
|
||||
testCtbAcquireInfo test_info{};
|
||||
auto dbit_offset = test_info.dbit_offset;
|
||||
|
||||
REQUIRE_NOTHROW(check_master_file<int>(
|
||||
@@ -816,7 +816,7 @@ void test_master_file_dbit_offset(const Detector &det,
|
||||
|
||||
void test_master_file_dbit_reorder(const Detector &det,
|
||||
const std::optional<Document> &doc) {
|
||||
testCtbAcquireInfo const test_info{};
|
||||
testCtbAcquireInfo test_info{};
|
||||
auto dbit_reorder = test_info.dbit_reorder;
|
||||
|
||||
REQUIRE_NOTHROW(check_master_file<int>(
|
||||
@@ -825,7 +825,7 @@ void test_master_file_dbit_reorder(const Detector &det,
|
||||
|
||||
void test_master_file_dbit_bitset(const Detector &det,
|
||||
const std::optional<Document> &doc) {
|
||||
testCtbAcquireInfo const test_info{};
|
||||
testCtbAcquireInfo test_info{};
|
||||
uint64_t dbit_bitset = 0;
|
||||
for (auto &i : test_info.dbit_list) {
|
||||
dbit_bitset |= (static_cast<uint64_t>(1) << i);
|
||||
@@ -837,7 +837,7 @@ void test_master_file_dbit_bitset(const Detector &det,
|
||||
|
||||
void test_master_file_transceiver_mask(const Detector &det,
|
||||
const std::optional<Document> &doc) {
|
||||
testCtbAcquireInfo const test_info{};
|
||||
testCtbAcquireInfo test_info{};
|
||||
auto trans_mask = test_info.transceiver_mask;
|
||||
|
||||
REQUIRE_NOTHROW(check_master_file<int>(
|
||||
@@ -846,7 +846,7 @@ void test_master_file_transceiver_mask(const Detector &det,
|
||||
|
||||
void test_master_file_transceiver_flag(const Detector &det,
|
||||
const std::optional<Document> &doc) {
|
||||
testCtbAcquireInfo const test_info{};
|
||||
testCtbAcquireInfo test_info{};
|
||||
auto romode = test_info.readout_mode;
|
||||
auto trans = static_cast<int>(romode == defs::DIGITAL_AND_TRANSCEIVER ||
|
||||
romode == defs::TRANSCEIVER_ONLY);
|
||||
@@ -857,7 +857,7 @@ void test_master_file_transceiver_flag(const Detector &det,
|
||||
|
||||
void test_master_file_transceiver_samples(const Detector &det,
|
||||
const std::optional<Document> &doc) {
|
||||
testCtbAcquireInfo const test_info{};
|
||||
testCtbAcquireInfo test_info{};
|
||||
auto trans_samples = test_info.num_trans_samples;
|
||||
REQUIRE_NOTHROW(check_master_file<int>(
|
||||
doc, MasterAttributes::N_TRANSCEIVER_SAMPLES.data(), trans_samples));
|
||||
@@ -1005,17 +1005,17 @@ Document parse_binary_master_attributes(std::string file_path) {
|
||||
REQUIRE(file.is_open());
|
||||
std::stringstream buffer;
|
||||
buffer << file.rdbuf();
|
||||
std::string const json_str = buffer.str();
|
||||
std::string json_str = buffer.str();
|
||||
|
||||
Document doc;
|
||||
ParseResult const result = doc.Parse(json_str.c_str());
|
||||
ParseResult result = doc.Parse(json_str.c_str());
|
||||
if (result == 0) {
|
||||
std::cout << "JSON parse error: " << GetParseError_En(result.Code())
|
||||
<< " (at offset " << result.Offset() << ")" << std::endl;
|
||||
|
||||
// Optional: Show problematic snippet
|
||||
size_t const offset = result.Offset();
|
||||
std::string const context =
|
||||
size_t offset = result.Offset();
|
||||
std::string context =
|
||||
json_str.substr(std::max(0, (int)offset - 20), 40);
|
||||
std::cout << "Context around error: \"" << context << "\"" << std::endl;
|
||||
}
|
||||
@@ -1039,7 +1039,7 @@ TEST_CASE("check_master_file_attributes", "[.cmdcall][.cmdacquire][.cmdattr]") {
|
||||
auto det_type =
|
||||
det.getDetectorType().tsquash("Inconsistent detector types to test");
|
||||
|
||||
int64_t const num_frames = 1;
|
||||
int64_t num_frames = 1;
|
||||
switch (det_type) {
|
||||
case defs::EIGER:
|
||||
case defs::JUNGFRAU:
|
||||
@@ -1057,11 +1057,11 @@ TEST_CASE("check_master_file_attributes", "[.cmdcall][.cmdacquire][.cmdattr]") {
|
||||
throw sls::RuntimeError("Unsupported detector type for this test");
|
||||
}
|
||||
|
||||
testFileInfo const file_info;
|
||||
std::string const master_file_prefix = file_info.getMasterFileNamePrefix();
|
||||
testFileInfo file_info;
|
||||
std::string master_file_prefix = file_info.getMasterFileNamePrefix();
|
||||
|
||||
// binary
|
||||
std::string const fname =
|
||||
std::string fname =
|
||||
master_file_prefix + ".json"; // /tmp/sls_test_master_0.json
|
||||
auto doc = std::make_optional(parse_binary_master_attributes(fname));
|
||||
test_master_file_metadata(det, doc);
|
||||
|
||||
@@ -509,11 +509,11 @@ TEST_CASE("interpolation", "[.cmdcall]") {
|
||||
auto prev_mask = det.getCounterMask();
|
||||
auto prev_vth3DacVal = det.getDAC(defs::VTH3, 0, {});
|
||||
|
||||
int const disabledDacValue = 2800;
|
||||
int disabledDacValue = 2800;
|
||||
auto fixedVth3DacVal = 1000;
|
||||
det.setDAC(defs::VTH3, fixedVth3DacVal, 0, {});
|
||||
// mask with counter 3 disabled and enabled(to test vth3)
|
||||
uint32_t const fixedMask[2] = {0x2, 0x4};
|
||||
uint32_t fixedMask[2] = {0x2, 0x4};
|
||||
for (int i = 0; i != 2; ++i) {
|
||||
det.setCounterMask(fixedMask[i]);
|
||||
{
|
||||
@@ -532,7 +532,7 @@ TEST_CASE("interpolation", "[.cmdcall]") {
|
||||
REQUIRE(oss.str() == "interpolation 0\n");
|
||||
REQUIRE(det.getCounterMask().tsquash(
|
||||
"inconsistent counter mask") == fixedMask[i]);
|
||||
int const expectedVth3DacVal =
|
||||
int expectedVth3DacVal =
|
||||
(fixedMask[i] & 0x4 ? fixedVth3DacVal : disabledDacValue);
|
||||
REQUIRE(det.getDAC(defs::VTH3, 0, {0})
|
||||
.tsquash("inconsistent vth3 dac value") ==
|
||||
@@ -566,13 +566,13 @@ TEST_CASE("pumpprobe", "[.cmdcall]") {
|
||||
auto prev_vth2DacVal = det.getDAC(defs::VTH2, 0, {});
|
||||
auto prev_vth3DacVal = det.getDAC(defs::VTH3, 0, {});
|
||||
|
||||
int const disabledDacValue = 2800;
|
||||
int disabledDacValue = 2800;
|
||||
auto fixedVthDacVal = 1000;
|
||||
det.setDAC(defs::VTH1, fixedVthDacVal, 0, {});
|
||||
det.setDAC(defs::VTH2, fixedVthDacVal, 0, {});
|
||||
det.setDAC(defs::VTH3, fixedVthDacVal, 0, {});
|
||||
// mask with counter 2 disabled and enabled(to test vth2)
|
||||
uint32_t const fixedMask[2] = {0x4, 0x3};
|
||||
uint32_t fixedMask[2] = {0x4, 0x3};
|
||||
for (int i = 0; i != 2; ++i) {
|
||||
std::cout << "i:" << i << std::endl;
|
||||
det.setCounterMask(fixedMask[i]);
|
||||
|
||||
@@ -114,8 +114,8 @@ TEST_CASE("patword", "[.cmdcall]") {
|
||||
|
||||
if (det_type == defs::CHIPTESTBOARD ||
|
||||
det_type == defs::XILINX_CHIPTESTBOARD || det_type == defs::MYTHEN3) {
|
||||
int const addr = 0x23;
|
||||
std::string const saddr = ToStringHex(addr, 4);
|
||||
int addr = 0x23;
|
||||
std::string saddr = ToStringHex(addr, 4);
|
||||
auto prev_val = det.getPatternWord(addr);
|
||||
{
|
||||
std::ostringstream oss;
|
||||
@@ -189,9 +189,9 @@ TEST_CASE("patloop", "[.cmdcall]") {
|
||||
continue;
|
||||
}
|
||||
auto prev_val = det.getPatternLoopAddresses(iLoop);
|
||||
std::string const sLoop = ToString(iLoop);
|
||||
std::string sLoop = ToString(iLoop);
|
||||
if (iLoop < 3) {
|
||||
std::string const deprecatedCmd = "patloop" + sLoop;
|
||||
std::string deprecatedCmd = "patloop" + sLoop;
|
||||
{ // deprecated
|
||||
std::ostringstream oss;
|
||||
caller.call(deprecatedCmd, {"0x20", "0x5c"}, -1, PUT, oss);
|
||||
@@ -238,9 +238,9 @@ TEST_CASE("patnloop", "[.cmdcall]") {
|
||||
continue;
|
||||
}
|
||||
auto prev_val = det.getPatternLoopCycles(iLoop);
|
||||
std::string const sLoop = ToString(iLoop);
|
||||
std::string sLoop = ToString(iLoop);
|
||||
if (iLoop < 3) {
|
||||
std::string const deprecatedCmd = "patnloop" + sLoop;
|
||||
std::string deprecatedCmd = "patnloop" + sLoop;
|
||||
{ // deprecated
|
||||
std::ostringstream oss;
|
||||
caller.call(deprecatedCmd, {"5"}, -1, PUT, oss);
|
||||
@@ -284,9 +284,9 @@ TEST_CASE("patwait", "[.cmdcall]") {
|
||||
continue;
|
||||
}
|
||||
auto prev_val = det.getPatternWaitAddr(iLoop);
|
||||
std::string const sLoop = ToString(iLoop);
|
||||
std::string sLoop = ToString(iLoop);
|
||||
if (iLoop < 3) {
|
||||
std::string const deprecatedCmd = "patwait" + sLoop;
|
||||
std::string deprecatedCmd = "patwait" + sLoop;
|
||||
{ // deprecated
|
||||
std::ostringstream oss;
|
||||
caller.call(deprecatedCmd, {"0x5c"}, -1, PUT, oss);
|
||||
@@ -330,9 +330,9 @@ TEST_CASE("patwaittime", "[.cmdcall]") {
|
||||
continue;
|
||||
}
|
||||
auto prev_val = det.getPatternWaitClocks(iLoop);
|
||||
std::string const sLoop = ToString(iLoop);
|
||||
std::string sLoop = ToString(iLoop);
|
||||
if (iLoop < 3) {
|
||||
std::string const deprecatedCmd = "patwaittime" + sLoop;
|
||||
std::string deprecatedCmd = "patwaittime" + sLoop;
|
||||
{ // deprecated
|
||||
std::ostringstream oss;
|
||||
caller.call(deprecatedCmd, {"8589936640"}, -1, PUT, oss);
|
||||
@@ -436,8 +436,7 @@ TEST_CASE("patternstart", "[.cmdcall]") {
|
||||
Caller caller(&det);
|
||||
REQUIRE_THROWS(caller.call("patternstart", {}, -1, GET));
|
||||
auto det_type = det.getDetectorType().squash();
|
||||
if (det_type == defs::MYTHEN3 || det_type == defs::CHIPTESTBOARD ||
|
||||
det_type == defs::XILINX_CHIPTESTBOARD) {
|
||||
if (det_type == defs::MYTHEN3) {
|
||||
REQUIRE_NOTHROW(caller.call("patternstart", {}, -1, PUT));
|
||||
} else {
|
||||
REQUIRE_THROWS(caller.call("patternstart", {}, -1, PUT));
|
||||
|
||||
@@ -1,239 +0,0 @@
|
||||
// SPDX-License-Identifier: LGPL-3.0-or-other
|
||||
// Copyright (C) 2025 Contributors to the SLS Detector Package
|
||||
#include "Caller.h"
|
||||
#include "catch.hpp"
|
||||
#include "sls/Detector.h"
|
||||
#include "tests/globals.h"
|
||||
|
||||
#include <sstream>
|
||||
|
||||
namespace sls {
|
||||
|
||||
using test::PUT;
|
||||
|
||||
TEST_CASE("Ctb and xilinx - cant put if receiver is not idle",
|
||||
"[.cmdcall][.rx]") {
|
||||
|
||||
Detector det;
|
||||
Caller caller(&det);
|
||||
auto det_type = det.getDetectorType().squash();
|
||||
|
||||
if (det_type == defs::CHIPTESTBOARD ||
|
||||
det_type == defs::XILINX_CHIPTESTBOARD) {
|
||||
auto prev_romode = det.getReadoutMode();
|
||||
auto prev_asamples = det.getNumberOfAnalogSamples();
|
||||
auto prev_dsamples = det.getNumberOfDigitalSamples();
|
||||
auto prev_tsamples = det.getNumberOfTransceiverSamples();
|
||||
auto prev_adcenable10g = det.getTenGigaADCEnableMask();
|
||||
auto prev_trasnsceiverenable = det.getTransceiverEnableMask();
|
||||
auto prev_rxdbitlist = det.getRxDbitList();
|
||||
auto prev_rxdbitoffset = det.getRxDbitOffset();
|
||||
auto prev_rxdbitreorder = det.getRxDbitReorder();
|
||||
|
||||
// start receiver
|
||||
REQUIRE_NOTHROW(caller.call("rx_start", {}, -1, PUT));
|
||||
|
||||
REQUIRE_THROWS(caller.call("romode", {"digital"}, -1, PUT));
|
||||
REQUIRE_THROWS(caller.call("asamples", {"5"}, -1, PUT));
|
||||
REQUIRE_THROWS(caller.call("dsamples", {"100"}, -1, PUT));
|
||||
REQUIRE_THROWS(caller.call("tsamples", {"2"}, -1, PUT));
|
||||
REQUIRE_THROWS(caller.call("adcenable10g", {"0xFF00FFFF"}, -1, PUT));
|
||||
REQUIRE_THROWS(caller.call("transceiverenable", {"0x3"}, -1, PUT));
|
||||
REQUIRE_THROWS(caller.call("rx_dbitlist", {"{1,2,10}"}, -1, PUT));
|
||||
REQUIRE_THROWS(caller.call("rx_dbitoffset", {"5"}, -1, PUT));
|
||||
REQUIRE_THROWS(caller.call("rx_dbitreorder", {"0"}, -1, PUT));
|
||||
|
||||
// stop receiver
|
||||
REQUIRE_NOTHROW(caller.call("rx_stop", {}, -1, PUT));
|
||||
|
||||
for (int i = 0; i != det.size(); ++i) {
|
||||
det.setReadoutMode(prev_romode[i], {i});
|
||||
det.setNumberOfAnalogSamples(prev_asamples[i], {i});
|
||||
det.setNumberOfDigitalSamples(prev_dsamples[i], {i});
|
||||
det.setNumberOfTransceiverSamples(prev_tsamples[i], {i});
|
||||
det.setTenGigaADCEnableMask(prev_adcenable10g[i], {i});
|
||||
det.setTransceiverEnableMask(prev_trasnsceiverenable[i], {i});
|
||||
det.setRxDbitList(prev_rxdbitlist[i], {i});
|
||||
det.setRxDbitOffset(prev_rxdbitoffset[i], {i});
|
||||
det.setRxDbitReorder(prev_rxdbitreorder[i], {i});
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
TEST_CASE("adcenable - cant put if receiver is not idle", "[.cmdcall][.rx]") {
|
||||
|
||||
Detector det;
|
||||
Caller caller(&det);
|
||||
auto det_type = det.getDetectorType().squash();
|
||||
|
||||
if (det_type == defs::CHIPTESTBOARD) {
|
||||
auto prev_adcenable = det.getADCEnableMask();
|
||||
|
||||
// start receiver
|
||||
REQUIRE_NOTHROW(caller.call("rx_start", {}, -1, PUT));
|
||||
|
||||
REQUIRE_THROWS(caller.call("adcenable", {"0xFFFFFF00"}, -1, PUT));
|
||||
|
||||
// stop receiver
|
||||
REQUIRE_NOTHROW(caller.call("rx_stop", {}, -1, PUT));
|
||||
|
||||
for (int i = 0; i != det.size(); ++i) {
|
||||
det.setADCEnableMask(prev_adcenable[i], {i});
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
TEST_CASE("bursts - cant put if receiver is not idle", "[.cmdcall][.rx]") {
|
||||
|
||||
Detector det;
|
||||
Caller caller(&det);
|
||||
auto det_type = det.getDetectorType().squash();
|
||||
|
||||
if (det_type == defs::GOTTHARD2) {
|
||||
auto prev_burst =
|
||||
det.getNumberOfBursts().tsquash("#bursts should be same to test");
|
||||
|
||||
// start receiver
|
||||
REQUIRE_NOTHROW(caller.call("rx_start", {}, -1, PUT));
|
||||
|
||||
REQUIRE_THROWS(caller.call("bursts", {"20"}, -1, PUT));
|
||||
|
||||
// stop receiver
|
||||
REQUIRE_NOTHROW(caller.call("rx_stop", {}, -1, PUT));
|
||||
|
||||
det.setNumberOfBursts(prev_burst);
|
||||
}
|
||||
}
|
||||
|
||||
TEST_CASE("counters - cant put if receiver is not idle", "[.cmdcall][.rx]") {
|
||||
|
||||
Detector det;
|
||||
Caller caller(&det);
|
||||
auto det_type = det.getDetectorType().squash();
|
||||
|
||||
if (det_type == defs::MYTHEN3) {
|
||||
auto prev_counters = det.getCounterMask();
|
||||
|
||||
// start receiver
|
||||
REQUIRE_NOTHROW(caller.call("rx_start", {}, -1, PUT));
|
||||
|
||||
REQUIRE_THROWS(caller.call("counters", {"0 1 2"}, -1, PUT));
|
||||
|
||||
// stop receiver
|
||||
REQUIRE_NOTHROW(caller.call("rx_stop", {}, -1, PUT));
|
||||
|
||||
for (int i = 0; i != det.size(); ++i) {
|
||||
det.setCounterMask(prev_counters[i], {i});
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
TEST_CASE("numinterfaces - cant put if receiver is not idle",
|
||||
"[.cmdcall][.rx]") {
|
||||
|
||||
Detector det;
|
||||
Caller caller(&det);
|
||||
auto det_type = det.getDetectorType().squash();
|
||||
|
||||
if (det_type == defs::JUNGFRAU || det_type == defs::MOENCH) {
|
||||
auto prev_numinterfaces = det.getNumberofUDPInterfaces();
|
||||
|
||||
// start receiver
|
||||
REQUIRE_NOTHROW(caller.call("rx_start", {}, -1, PUT));
|
||||
|
||||
REQUIRE_THROWS(caller.call("numinterafaces", {"2"}, -1, PUT));
|
||||
|
||||
// stop receiver
|
||||
REQUIRE_NOTHROW(caller.call("rx_stop", {}, -1, PUT));
|
||||
|
||||
for (int i = 0; i != det.size(); ++i) {
|
||||
det.setNumberofUDPInterfaces(prev_numinterfaces[i], {i});
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
TEST_CASE("dr - cant put if receiver is not idle", "[.cmdcall][.rx]") {
|
||||
|
||||
Detector det;
|
||||
Caller caller(&det);
|
||||
auto det_type = det.getDetectorType().squash();
|
||||
|
||||
if (det_type == defs::EIGER || det_type == defs::MYTHEN3) {
|
||||
auto prev_dr =
|
||||
det.getDynamicRange().tsquash("dr should be same to test");
|
||||
|
||||
// start receiver
|
||||
REQUIRE_NOTHROW(caller.call("rx_start", {}, -1, PUT));
|
||||
|
||||
REQUIRE_THROWS(caller.call("dr", {"16"}, -1, PUT));
|
||||
|
||||
// stop receiver
|
||||
REQUIRE_NOTHROW(caller.call("rx_stop", {}, -1, PUT));
|
||||
|
||||
det.setDynamicRange(prev_dr);
|
||||
}
|
||||
}
|
||||
|
||||
TEST_CASE("tengiga - cant put if receiver is not idle", "[.cmdcall][.rx]") {
|
||||
|
||||
Detector det;
|
||||
Caller caller(&det);
|
||||
auto det_type = det.getDetectorType().squash();
|
||||
|
||||
if (det_type == defs::EIGER || det_type == defs::MYTHEN3 ||
|
||||
det_type == defs::CHIPTESTBOARD) {
|
||||
auto prev_tengiga = det.getTenGiga();
|
||||
|
||||
// start receiver
|
||||
REQUIRE_NOTHROW(caller.call("rx_start", {}, -1, PUT));
|
||||
|
||||
REQUIRE_THROWS(caller.call("tengiga", {"1"}, -1, PUT));
|
||||
|
||||
// stop receiver
|
||||
REQUIRE_NOTHROW(caller.call("rx_stop", {}, -1, PUT));
|
||||
|
||||
for (int i = 0; i != det.size(); ++i) {
|
||||
det.setTenGiga(prev_tengiga[i], {i});
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
TEST_CASE("general - cant put if receiver is not idle", "[.cmdcall][.rx]") {
|
||||
|
||||
Detector det;
|
||||
Caller caller(&det);
|
||||
|
||||
{
|
||||
auto prev_frames =
|
||||
det.getNumberOfFrames().tsquash("#frames should be same to test");
|
||||
auto prev_triggers =
|
||||
det.getNumberOfTriggers().tsquash("#triggers must be same to test");
|
||||
auto prev_findex = det.getAcquisitionIndex();
|
||||
auto prev_fwrite = det.getFileWrite();
|
||||
auto prev_fifodepth = det.getRxFifoDepth();
|
||||
auto rx_hostname = det.getRxHostname();
|
||||
|
||||
// start receiver
|
||||
REQUIRE_NOTHROW(caller.call("rx_start", {}, -1, PUT));
|
||||
|
||||
REQUIRE_THROWS(caller.call("frames", {"10"}, -1, PUT));
|
||||
REQUIRE_THROWS(caller.call("triggers", {"5"}, -1, PUT));
|
||||
REQUIRE_THROWS(caller.call("findex", {"2"}, -1, PUT));
|
||||
REQUIRE_THROWS(caller.call("fwrite", {"0"}, -1, PUT));
|
||||
REQUIRE_THROWS(caller.call("rx_fifodepth", {"1000"}, -1, PUT));
|
||||
REQUIRE_THROWS(caller.call("rx_hostname", {rx_hostname[0]}, 0, PUT));
|
||||
|
||||
// stop receiver
|
||||
REQUIRE_NOTHROW(caller.call("rx_stop", {}, -1, PUT));
|
||||
|
||||
det.setNumberOfFrames(prev_frames);
|
||||
det.setNumberOfTriggers(prev_triggers);
|
||||
for (int i = 0; i != det.size(); ++i) {
|
||||
det.setAcquisitionIndex(prev_findex[i], {i});
|
||||
det.setFileWrite(prev_fwrite[i], {i});
|
||||
det.setRxFifoDepth(prev_fifodepth[i], {i});
|
||||
det.setRxHostname(rx_hostname[i], {i});
|
||||
}
|
||||
}
|
||||
}
|
||||
} // namespace sls
|
||||
@@ -30,7 +30,7 @@ TEST_CASE("rx_version", "[.cmdcall][.rx]") {
|
||||
Caller caller(&det);
|
||||
std::ostringstream oss;
|
||||
caller.call("rx_version", {}, -1, GET, oss);
|
||||
sls::Version const v(APIRECEIVER);
|
||||
sls::Version v(APIRECEIVER);
|
||||
std::ostringstream vs;
|
||||
vs << "rx_version " << v.concise() << '\n';
|
||||
REQUIRE(oss.str() == vs.str());
|
||||
@@ -365,9 +365,9 @@ TEST_CASE("rx_padding", "[.cmdcall][.rx]") {
|
||||
TEST_CASE("rx_udpsocksize", "[.cmdcall][.rx]") {
|
||||
Detector det;
|
||||
Caller caller(&det);
|
||||
int64_t const prev_val = det.getRxUDPSocketBufferSize().tsquash(
|
||||
int64_t prev_val = det.getRxUDPSocketBufferSize().tsquash(
|
||||
"Need same udp socket buffer size to test");
|
||||
std::string const s_new_val = std::to_string(prev_val);
|
||||
std::string s_new_val = std::to_string(prev_val);
|
||||
/*std::string s_new_val = std::to_string(prev_val - 1000);
|
||||
{ Need permissions
|
||||
std::ostringstream oss;
|
||||
@@ -389,14 +389,14 @@ TEST_CASE("rx_realudpsocksize", "[.cmdcall][.rx]") {
|
||||
{
|
||||
std::ostringstream oss;
|
||||
caller.call("rx_udpsocksize", {}, -1, GET, oss);
|
||||
std::string const s = (oss.str()).erase(0, strlen("rx_udpsocksize "));
|
||||
std::string s = (oss.str()).erase(0, strlen("rx_udpsocksize "));
|
||||
val = std::stol(s);
|
||||
}
|
||||
{
|
||||
std::ostringstream oss;
|
||||
caller.call("rx_realudpsocksize", {}, -1, GET, oss);
|
||||
std::string const s = (oss.str()).erase(0, strlen("rx_realudpsocksize "));
|
||||
uint64_t const rval = std::stol(s);
|
||||
std::string s = (oss.str()).erase(0, strlen("rx_realudpsocksize "));
|
||||
uint64_t rval = std::stol(s);
|
||||
REQUIRE(rval >= val * 2);
|
||||
}
|
||||
}
|
||||
@@ -476,10 +476,10 @@ TEST_CASE("rx_roi", "[.cmdcall]") {
|
||||
REQUIRE_THROWS(caller.call("rx_roi", {"5", "10"}, -1, PUT));
|
||||
} else {
|
||||
auto prev_val = det.getRxROI();
|
||||
defs::xy const detsize = det.getDetectorSize();
|
||||
defs::xy detsize = det.getDetectorSize();
|
||||
auto portSize = det.getPortSize()[0];
|
||||
int const delta = 50;
|
||||
int const numinterfaces = det.getNumberofUDPInterfaces().tsquash(
|
||||
int delta = 50;
|
||||
int numinterfaces = det.getNumberofUDPInterfaces().tsquash(
|
||||
"inconsistent number of interfaces");
|
||||
|
||||
// 1d
|
||||
@@ -757,11 +757,11 @@ TEST_CASE("rx_roi", "[.cmdcall]") {
|
||||
// TODO: check roi in master file
|
||||
{
|
||||
REQUIRE_NOTHROW(create_files_for_acquire(det, caller));
|
||||
testFileInfo const file_info;
|
||||
std::string const master_file_prefix =
|
||||
testFileInfo file_info;
|
||||
std::string master_file_prefix =
|
||||
file_info.getMasterFileNamePrefix();
|
||||
|
||||
std::string const fname = master_file_prefix + ".json";
|
||||
std::string fname = master_file_prefix + ".json";
|
||||
REQUIRE(std::filesystem::exists(fname) == true);
|
||||
#ifdef HDF5C
|
||||
fname = master_file_prefix + ".h5";
|
||||
|
||||
@@ -24,7 +24,7 @@ TEST_CASE("Calling help doesn't throw or cause segfault") {
|
||||
// Dont add [.cmdcall] tag this should run with normal tests
|
||||
Caller caller(nullptr);
|
||||
std::ostringstream os;
|
||||
for (std::string const& cmd : caller.getAllCommands())
|
||||
for (std::string cmd : caller.getAllCommands())
|
||||
REQUIRE_NOTHROW(
|
||||
caller.call(cmd, {}, -1, slsDetectorDefs::HELP_ACTION, os));
|
||||
}
|
||||
@@ -291,7 +291,7 @@ TEST_CASE("threshold", "[.cmdcall]") {
|
||||
auto prev_energies =
|
||||
det.getTrimEnergies().tsquash("inconsistent trim energies to test");
|
||||
if (!prev_energies.empty()) {
|
||||
std::string const senergy = std::to_string(prev_energies[0]);
|
||||
std::string senergy = std::to_string(prev_energies[0]);
|
||||
std::ostringstream oss1, oss2;
|
||||
caller.call("threshold", {senergy, "standard"}, -1, PUT, oss1);
|
||||
REQUIRE(oss1.str() == "threshold [" + senergy + ", standard]\n");
|
||||
@@ -319,15 +319,15 @@ TEST_CASE("threshold", "[.cmdcall]") {
|
||||
auto prev_energies =
|
||||
det.getTrimEnergies().tsquash("inconsistent trim energies to test");
|
||||
if (!prev_energies.empty()) {
|
||||
std::string const senergy = std::to_string(prev_energies[0]);
|
||||
std::string senergy = std::to_string(prev_energies[0]);
|
||||
std::ostringstream oss1, oss2;
|
||||
caller.call("threshold", {senergy, "standard"}, -1, PUT, oss1);
|
||||
REQUIRE(oss1.str() == "threshold [" + senergy + ", standard]\n");
|
||||
caller.call("threshold", {}, -1, GET, oss2);
|
||||
REQUIRE(oss2.str() == "threshold [" + senergy + ", " + senergy +
|
||||
", " + senergy + "]\n");
|
||||
std::string const senergy2 = std::to_string(prev_energies[1]);
|
||||
std::string const senergy3 = std::to_string(prev_energies[2]);
|
||||
std::string senergy2 = std::to_string(prev_energies[1]);
|
||||
std::string senergy3 = std::to_string(prev_energies[2]);
|
||||
std::ostringstream oss3, oss4;
|
||||
caller.call("threshold", {senergy, senergy2, senergy3, "standard"},
|
||||
-1, PUT, oss3);
|
||||
@@ -370,7 +370,7 @@ TEST_CASE("thresholdnotb", "[.cmdcall]") {
|
||||
auto prev_energies =
|
||||
det.getTrimEnergies().tsquash("inconsistent trim energies to test");
|
||||
if (!prev_energies.empty()) {
|
||||
std::string const senergy = std::to_string(prev_energies[0]);
|
||||
std::string senergy = std::to_string(prev_energies[0]);
|
||||
std::ostringstream oss1, oss2;
|
||||
caller.call("thresholdnotb", {senergy, "standard"}, -1, PUT, oss1);
|
||||
REQUIRE(oss1.str() ==
|
||||
@@ -398,7 +398,7 @@ TEST_CASE("thresholdnotb", "[.cmdcall]") {
|
||||
auto prev_energies =
|
||||
det.getTrimEnergies().tsquash("inconsistent trim energies to test");
|
||||
if (!prev_energies.empty()) {
|
||||
std::string const senergy = std::to_string(prev_energies[0]);
|
||||
std::string senergy = std::to_string(prev_energies[0]);
|
||||
std::ostringstream oss1, oss2;
|
||||
caller.call("thresholdnotb", {senergy, "standard"}, -1, PUT, oss1);
|
||||
REQUIRE(oss1.str() ==
|
||||
@@ -406,8 +406,8 @@ TEST_CASE("thresholdnotb", "[.cmdcall]") {
|
||||
caller.call("threshold", {}, -1, GET, oss2);
|
||||
REQUIRE(oss2.str() == "threshold [" + senergy + ", " + senergy +
|
||||
", " + senergy + "]\n");
|
||||
std::string const senergy2 = std::to_string(prev_energies[1]);
|
||||
std::string const senergy3 = std::to_string(prev_energies[2]);
|
||||
std::string senergy2 = std::to_string(prev_energies[1]);
|
||||
std::string senergy3 = std::to_string(prev_energies[2]);
|
||||
std::ostringstream oss3, oss4;
|
||||
caller.call("thresholdnotb",
|
||||
{senergy, senergy2, senergy3, "standard"}, -1, PUT,
|
||||
@@ -528,8 +528,8 @@ TEST_CASE("gappixels", "[.cmdcall]") {
|
||||
if (det_type == defs::JUNGFRAU || det_type == defs::MOENCH)
|
||||
gapPixelTest = true;
|
||||
else if (det_type == defs::EIGER) {
|
||||
bool const quad = det.getQuad().squash(false);
|
||||
bool const fullModule = (det.getModuleGeometry().y % 2 == 0);
|
||||
bool quad = det.getQuad().squash(false);
|
||||
bool fullModule = (det.getModuleGeometry().y % 2 == 0);
|
||||
if (quad || fullModule) {
|
||||
gapPixelTest = true;
|
||||
}
|
||||
@@ -658,9 +658,9 @@ TEST_CASE("badchannels", "[.cmdcall]") {
|
||||
|
||||
REQUIRE_THROWS(caller.call("badchannels", {}, -1, GET));
|
||||
|
||||
std::string const fname_put =
|
||||
std::string fname_put =
|
||||
getAbsolutePathFromCurrentProcess(TEST_FILE_NAME_BAD_CHANNELS);
|
||||
std::string const fname_get = "/tmp/sls_test_channels.txt";
|
||||
std::string fname_get = "/tmp/sls_test_channels.txt";
|
||||
|
||||
REQUIRE_NOTHROW(caller.call("badchannels", {fname_put}, 0, PUT));
|
||||
REQUIRE_NOTHROW(caller.call("badchannels", {fname_get}, 0, GET));
|
||||
@@ -976,7 +976,7 @@ TEST_CASE("dr", "[.cmdcall]") {
|
||||
auto det_type = det.getDetectorType().squash();
|
||||
if (det_type == defs::EIGER) {
|
||||
auto dr = det.getDynamicRange().squash();
|
||||
std::array<int, 4> const vals{4, 8, 16, 32};
|
||||
std::array<int, 4> vals{4, 8, 16, 32};
|
||||
for (const auto val : vals) {
|
||||
std::ostringstream oss1, oss2;
|
||||
caller.call("dr", {std::to_string(val)}, -1, PUT, oss1);
|
||||
@@ -988,7 +988,7 @@ TEST_CASE("dr", "[.cmdcall]") {
|
||||
} else if (det_type == defs::MYTHEN3) {
|
||||
auto dr = det.getDynamicRange().squash();
|
||||
// not updated in firmware to support dr 1
|
||||
std::array<int, 3> const vals{8, 16, 32};
|
||||
std::array<int, 3> vals{8, 16, 32};
|
||||
for (const auto val : vals) {
|
||||
std::ostringstream oss1, oss2;
|
||||
caller.call("dr", {std::to_string(val)}, -1, PUT, oss1);
|
||||
@@ -1542,7 +1542,7 @@ TEST_CASE("powerchip", "[.cmdcall]") {
|
||||
"Inconsistent virtual detector "
|
||||
"server to test powerchip command")) {
|
||||
det.setPowerChip(1);
|
||||
int const hv = det.getHighVoltage().tsquash(
|
||||
int hv = det.getHighVoltage().tsquash(
|
||||
"Inconsistent high voltage to test "
|
||||
"powerchip command");
|
||||
|
||||
@@ -1976,7 +1976,7 @@ TEST_CASE("temp_adc", "[.cmdcall]") {
|
||||
REQUIRE_NOTHROW(caller.call("temp_adc", {}, -1, GET));
|
||||
std::ostringstream oss;
|
||||
REQUIRE_NOTHROW(caller.call("temp_adc", {}, 0, GET, oss));
|
||||
std::string const s = (oss.str()).erase(0, strlen("temp_adc "));
|
||||
std::string s = (oss.str()).erase(0, strlen("temp_adc "));
|
||||
REQUIRE(std::stoi(s) != -1);
|
||||
} else {
|
||||
REQUIRE_THROWS(caller.call("temp_adc", {}, -1, GET));
|
||||
@@ -1991,7 +1991,7 @@ TEST_CASE("temp_fpga", "[.cmdcall]") {
|
||||
REQUIRE_NOTHROW(caller.call("temp_fpga", {}, -1, GET));
|
||||
std::ostringstream oss;
|
||||
REQUIRE_NOTHROW(caller.call("temp_fpga", {}, 0, GET, oss));
|
||||
std::string const s = (oss.str()).erase(0, strlen("temp_fpga "));
|
||||
std::string s = (oss.str()).erase(0, strlen("temp_fpga "));
|
||||
REQUIRE(std::stoi(s) != -1);
|
||||
} else {
|
||||
REQUIRE_THROWS(caller.call("temp_fpga", {}, -1, GET));
|
||||
@@ -2075,7 +2075,7 @@ TEST_CASE("defaultdac", "[.cmdcall]") {
|
||||
}
|
||||
}
|
||||
if (det_type == defs::JUNGFRAU) {
|
||||
std::vector<defs::dacIndex> const daclist = {
|
||||
std::vector<defs::dacIndex> daclist = {
|
||||
defs::VREF_PRECH, defs::VREF_DS, defs::VREF_COMP};
|
||||
for (auto it : daclist) {
|
||||
auto dacname = ToString(it);
|
||||
@@ -2955,7 +2955,7 @@ TEST_CASE("txdelay_frame", "[.cmdcall]") {
|
||||
det_type == defs::MYTHEN3) {
|
||||
val = 5;
|
||||
}
|
||||
std::string const sval = std::to_string(val);
|
||||
std::string sval = std::to_string(val);
|
||||
{
|
||||
std::ostringstream oss1, oss2;
|
||||
caller.call("txdelay_frame", {sval}, -1, PUT, oss1);
|
||||
@@ -2983,8 +2983,8 @@ TEST_CASE("txdelay", "[.cmdcall]") {
|
||||
det_type == defs::MYTHEN3) &&
|
||||
(det.size() < 2)) {
|
||||
REQUIRE_THROWS(caller.call("txdelay", {}, -1, GET));
|
||||
int const val = 5;
|
||||
std::string const sval = std::to_string(val);
|
||||
int val = 5;
|
||||
std::string sval = std::to_string(val);
|
||||
{
|
||||
std::ostringstream oss1;
|
||||
caller.call("txdelay", {sval}, -1, PUT, oss1);
|
||||
@@ -3006,7 +3006,7 @@ TEST_CASE("txdelay", "[.cmdcall]") {
|
||||
det_type == defs::MYTHEN3) {
|
||||
val = 5;
|
||||
}
|
||||
std::string const sval = std::to_string(val);
|
||||
std::string sval = std::to_string(val);
|
||||
{
|
||||
std::ostringstream oss1, oss2;
|
||||
caller.call("txdelay", {sval}, -1, PUT, oss1);
|
||||
@@ -3279,7 +3279,7 @@ TEST_CASE("reg", "[.cmdcall]") {
|
||||
if (det_type == defs::GOTTHARD2) {
|
||||
addr = 0x298;
|
||||
}
|
||||
std::string const saddr = ToStringHex(addr);
|
||||
std::string saddr = ToStringHex(addr);
|
||||
auto prev_val = det.readRegister(addr);
|
||||
{
|
||||
std::ostringstream oss1, oss2;
|
||||
@@ -3338,7 +3338,7 @@ TEST_CASE("setbit", "[.cmdcall]") {
|
||||
if (det_type == defs::GOTTHARD2) {
|
||||
addr = 0x298;
|
||||
}
|
||||
std::string const saddr = ToStringHex(addr);
|
||||
std::string saddr = ToStringHex(addr);
|
||||
auto prev_val = det.readRegister(addr);
|
||||
{
|
||||
std::ostringstream oss1, oss2, oss3;
|
||||
@@ -3368,7 +3368,7 @@ TEST_CASE("clearbit", "[.cmdcall]") {
|
||||
if (det_type == defs::GOTTHARD2) {
|
||||
addr = 0x298;
|
||||
}
|
||||
std::string const saddr = ToStringHex(addr);
|
||||
std::string saddr = ToStringHex(addr);
|
||||
auto prev_val = det.readRegister(addr);
|
||||
{
|
||||
std::ostringstream oss1, oss2, oss3;
|
||||
@@ -3398,7 +3398,7 @@ TEST_CASE("getbit", "[.cmdcall]") {
|
||||
if (det_type == defs::GOTTHARD2) {
|
||||
addr = 0x298;
|
||||
}
|
||||
std::string const saddr = ToStringHex(addr);
|
||||
std::string saddr = ToStringHex(addr);
|
||||
auto prev_val = det.readRegister(addr);
|
||||
{
|
||||
std::ostringstream oss1, oss2;
|
||||
|
||||
@@ -15,7 +15,7 @@ using vs = std::vector<std::string>;
|
||||
|
||||
SCENARIO("Construction", "[support]") {
|
||||
GIVEN("A default constructed CmdParser") {
|
||||
CmdParser const p;
|
||||
CmdParser p;
|
||||
THEN("The state of the object is valid") {
|
||||
REQUIRE(p.detector_id() == -1);
|
||||
REQUIRE(p.multi_id() == 0);
|
||||
@@ -31,7 +31,7 @@ SCENARIO("Parsing a string with the command line parser", "[support]") {
|
||||
GIVEN("A CmdParser") {
|
||||
CmdParser p;
|
||||
WHEN("Parsing an empty string") {
|
||||
std::string const s;
|
||||
std::string s;
|
||||
p.Parse(s);
|
||||
THEN("command and arguments are empty") {
|
||||
REQUIRE(p.detector_id() == -1);
|
||||
@@ -42,7 +42,7 @@ SCENARIO("Parsing a string with the command line parser", "[support]") {
|
||||
}
|
||||
}
|
||||
WHEN("Parsing a string with a single command") {
|
||||
std::string const s = "vrf";
|
||||
std::string s = "vrf";
|
||||
p.Parse(s);
|
||||
THEN("command is assigned and id's remain default") {
|
||||
REQUIRE(p.command() == "vrf");
|
||||
@@ -53,7 +53,7 @@ SCENARIO("Parsing a string with the command line parser", "[support]") {
|
||||
}
|
||||
}
|
||||
WHEN("Parsing a string with command and value") {
|
||||
std::string const s = "vthreshold 1500";
|
||||
std::string s = "vthreshold 1500";
|
||||
p.Parse(s);
|
||||
THEN("cmd and value are assigned and id's remain default") {
|
||||
REQUIRE(p.command() == "vthreshold");
|
||||
@@ -98,7 +98,7 @@ SCENARIO("Parsing a string with the command line parser", "[support]") {
|
||||
}
|
||||
|
||||
WHEN("Parsing string with cmd and multiple arguments") {
|
||||
std::string const s = "trimen 5000 6000 7000";
|
||||
std::string s = "trimen 5000 6000 7000";
|
||||
p.Parse(s);
|
||||
THEN("cmd and args are correct") {
|
||||
REQUIRE(p.command() == "trimen");
|
||||
@@ -115,7 +115,7 @@ SCENARIO("Parsing strings with -h or --help", "[support]") {
|
||||
GIVEN("A parser") {
|
||||
CmdParser p;
|
||||
WHEN("Parsing a string with a command and help ") {
|
||||
std::string const s = "-h list";
|
||||
std::string s = "-h list";
|
||||
|
||||
THEN("the command is correct and isHelp is set") {
|
||||
p.Parse(s);
|
||||
@@ -128,7 +128,7 @@ SCENARIO("Parsing strings with -h or --help", "[support]") {
|
||||
}
|
||||
}
|
||||
WHEN("Parsing a string with -h at a different position") {
|
||||
std::string const s = "list -h something";
|
||||
std::string s = "list -h something";
|
||||
THEN("its also done right") {
|
||||
p.Parse(s);
|
||||
REQUIRE(p.isHelp());
|
||||
@@ -138,7 +138,7 @@ SCENARIO("Parsing strings with -h or --help", "[support]") {
|
||||
}
|
||||
}
|
||||
WHEN("Parsing a string with -help at a different position") {
|
||||
std::string const s = "list --help something";
|
||||
std::string s = "list --help something";
|
||||
THEN("its also done right") {
|
||||
p.Parse(s);
|
||||
REQUIRE(p.isHelp());
|
||||
@@ -186,7 +186,7 @@ TEST_CASE("Parse with no arguments results in no command and default id",
|
||||
"[support]") {
|
||||
// build up argc and argv
|
||||
// first argument is the command used to call the binary
|
||||
int const argc = 1;
|
||||
int argc = 1;
|
||||
const char *const argv[]{"call"};
|
||||
CmdParser p;
|
||||
p.Parse(argc, argv);
|
||||
@@ -200,7 +200,7 @@ TEST_CASE("Parse with no arguments results in no command and default id",
|
||||
TEST_CASE(
|
||||
"Parse a command without client id and detector id results in default",
|
||||
"[support]") {
|
||||
int const argc = 2;
|
||||
int argc = 2;
|
||||
const char *const argv[]{"caller", "vrf"};
|
||||
CmdParser p;
|
||||
p.Parse(argc, argv);
|
||||
@@ -213,7 +213,7 @@ TEST_CASE(
|
||||
|
||||
TEST_CASE("Parse a command with value but without client or detector id",
|
||||
"[support]") {
|
||||
int const argc = 3;
|
||||
int argc = 3;
|
||||
const char *const argv[]{"caller", "vrf", "3000"};
|
||||
CmdParser p;
|
||||
p.Parse(argc, argv);
|
||||
@@ -226,7 +226,7 @@ TEST_CASE("Parse a command with value but without client or detector id",
|
||||
}
|
||||
|
||||
TEST_CASE("Decodes position") {
|
||||
int const argc = 2;
|
||||
int argc = 2;
|
||||
const char *const argv[]{"caller", "7:vrf"};
|
||||
|
||||
CmdParser p;
|
||||
@@ -239,7 +239,7 @@ TEST_CASE("Decodes position") {
|
||||
}
|
||||
|
||||
TEST_CASE("Decodes double digit position", "[support]") {
|
||||
int const argc = 2;
|
||||
int argc = 2;
|
||||
const char *const argv[]{"caller", "73:vcmp"};
|
||||
CmdParser p;
|
||||
p.Parse(argc, argv);
|
||||
@@ -251,7 +251,7 @@ TEST_CASE("Decodes double digit position", "[support]") {
|
||||
}
|
||||
|
||||
TEST_CASE("Decodes position and id", "[support]") {
|
||||
int const argc = 2;
|
||||
int argc = 2;
|
||||
const char *const argv[]{"caller", "5-8:vrf"};
|
||||
CmdParser p;
|
||||
p.Parse(argc, argv);
|
||||
@@ -263,7 +263,7 @@ TEST_CASE("Decodes position and id", "[support]") {
|
||||
}
|
||||
|
||||
TEST_CASE("Double digit id", "[support]") {
|
||||
int const argc = 2;
|
||||
int argc = 2;
|
||||
const char *const argv[]{"caller", "56-8:vrf"};
|
||||
CmdParser p;
|
||||
p.Parse(argc, argv);
|
||||
|
||||
@@ -14,7 +14,7 @@ TEST_CASE("Default construction") {
|
||||
(2 * sizeof(int) + (18 + 32 + 64 + 5 + 8) * 20),
|
||||
"Size of CtbConfig does not match ");
|
||||
|
||||
CtbConfig const c;
|
||||
CtbConfig c;
|
||||
auto dacnames = c.getDacNames();
|
||||
REQUIRE(dacnames.size() == 18);
|
||||
REQUIRE(dacnames[0] == "DAC0");
|
||||
@@ -81,7 +81,7 @@ TEST_CASE("Copy a CTB config") {
|
||||
TEST_CASE("Move CtbConfig ") {
|
||||
CtbConfig c1;
|
||||
c1.setDacName(3, "yetanothername");
|
||||
CtbConfig const c2(std::move(c1));
|
||||
CtbConfig c2(std::move(c1));
|
||||
REQUIRE(c2.getDacName(3) == "yetanothername");
|
||||
}
|
||||
|
||||
|
||||
@@ -10,7 +10,7 @@ namespace sls {
|
||||
using dt = slsDetectorDefs::detectorType;
|
||||
TEST_CASE("Construction with a defined detector type") {
|
||||
freeSharedMemory(0, 0); // clean up to start test
|
||||
Module const m(dt::EIGER);
|
||||
Module m(dt::EIGER);
|
||||
REQUIRE(m.getDetectorType() == dt::EIGER);
|
||||
freeSharedMemory(0, 0); // clean up
|
||||
SharedMemory<sharedModule> moduleShm(0, 0);
|
||||
@@ -19,10 +19,10 @@ TEST_CASE("Construction with a defined detector type") {
|
||||
|
||||
TEST_CASE("Read back detector type from shm") {
|
||||
// Create specific detector in order to create shm
|
||||
Module const m(dt::JUNGFRAU);
|
||||
Module m(dt::JUNGFRAU);
|
||||
|
||||
// New detector that reads type from shm
|
||||
Module const m2;
|
||||
Module m2;
|
||||
REQUIRE(m2.getDetectorType() == dt::JUNGFRAU);
|
||||
|
||||
// Now both objects point to the same shm so we can only
|
||||
@@ -33,7 +33,7 @@ TEST_CASE("Read back detector type from shm") {
|
||||
}
|
||||
|
||||
TEST_CASE("Is shm fixed pattern shm compatible") {
|
||||
Module const m(dt::JUNGFRAU);
|
||||
Module m(dt::JUNGFRAU);
|
||||
|
||||
// Should be true since we just created the shm
|
||||
REQUIRE(m.isFixedPatternSharedMemoryCompatible() == true);
|
||||
@@ -53,7 +53,7 @@ TEST_CASE("Is shm fixed pattern shm compatible") {
|
||||
}
|
||||
|
||||
TEST_CASE("Get default control port") {
|
||||
Module const m(dt::MYTHEN3);
|
||||
Module m(dt::MYTHEN3);
|
||||
REQUIRE(m.getControlPort() == 1952);
|
||||
freeSharedMemory(0, 0);
|
||||
SharedMemory<sharedModule> moduleShm(0, 0);
|
||||
@@ -61,7 +61,7 @@ TEST_CASE("Get default control port") {
|
||||
}
|
||||
|
||||
TEST_CASE("Get default stop port") {
|
||||
Module const m(dt::GOTTHARD2);
|
||||
Module m(dt::GOTTHARD2);
|
||||
REQUIRE(m.getStopPort() == 1953);
|
||||
freeSharedMemory(0, 0);
|
||||
SharedMemory<sharedModule> moduleShm(0, 0);
|
||||
@@ -69,7 +69,7 @@ TEST_CASE("Get default stop port") {
|
||||
}
|
||||
|
||||
TEST_CASE("Get default receiver TCP port") {
|
||||
Module const m(dt::MYTHEN3);
|
||||
Module m(dt::MYTHEN3);
|
||||
REQUIRE(m.getReceiverPort() == 1954);
|
||||
freeSharedMemory(0, 0);
|
||||
SharedMemory<sharedModule> moduleShm(0, 0);
|
||||
|
||||
@@ -20,7 +20,7 @@ TEST_CASE("Copy construct pattern") {
|
||||
}
|
||||
|
||||
TEST_CASE("Compare patterns") {
|
||||
Pattern const p;
|
||||
Pattern p;
|
||||
Pattern p1;
|
||||
REQUIRE(p == p1);
|
||||
|
||||
|
||||
@@ -13,7 +13,7 @@ TEST_CASE("Result looks and behaves like a standard container") {
|
||||
}
|
||||
|
||||
TEST_CASE("Default construction is possible and gives an empty result") {
|
||||
Result<int> const res;
|
||||
Result<int> res;
|
||||
REQUIRE(res.size() == 0);
|
||||
REQUIRE(res.empty() == true);
|
||||
}
|
||||
@@ -38,7 +38,7 @@ TEST_CASE("Like vector it can be constructed from size and value") {
|
||||
}
|
||||
|
||||
TEST_CASE("Result can be iterated using modern syntax") {
|
||||
Result<int> const res{0, 1, 2, 3, 4, 5};
|
||||
Result<int> res{0, 1, 2, 3, 4, 5};
|
||||
|
||||
int i = 0;
|
||||
for (const auto &r : res)
|
||||
@@ -46,28 +46,28 @@ TEST_CASE("Result can be iterated using modern syntax") {
|
||||
}
|
||||
|
||||
TEST_CASE("Calling squash on an empty Result produces default value") {
|
||||
Result<double> const res;
|
||||
Result<double> res;
|
||||
REQUIRE(res.squash() == 0.);
|
||||
|
||||
Result<unsigned> const res2;
|
||||
Result<unsigned> res2;
|
||||
REQUIRE(res2.squash() == 0u);
|
||||
|
||||
Result<std::string> const res3;
|
||||
Result<std::string> res3;
|
||||
REQUIRE(res3.squash() == "");
|
||||
}
|
||||
|
||||
TEST_CASE("When equal squash gives the front value") {
|
||||
Result<int> const res{3, 3, 3};
|
||||
Result<int> res{3, 3, 3};
|
||||
REQUIRE(res.squash() == 3);
|
||||
}
|
||||
|
||||
TEST_CASE("When elements are not equal squash gives default value") {
|
||||
Result<int> const res{3, 3, 3, 5};
|
||||
Result<int> res{3, 3, 3, 5};
|
||||
REQUIRE(res.squash() == 0);
|
||||
}
|
||||
|
||||
TEST_CASE("String compare with squash") {
|
||||
Result<std::string> const res{"hej", "hej", "hej"};
|
||||
Result<std::string> res{"hej", "hej", "hej"};
|
||||
REQUIRE(res.squash() == "hej");
|
||||
}
|
||||
|
||||
@@ -113,13 +113,13 @@ TEST_CASE("Check if elements are equal") {
|
||||
|
||||
TEST_CASE("Result can be converted to std::vector") {
|
||||
Result<short> res{1, 2, 3, 4, 5};
|
||||
std::vector<short> const vec{1, 2, 3, 4, 5};
|
||||
std::vector<short> const vec2 = res;
|
||||
std::vector<short> vec{1, 2, 3, 4, 5};
|
||||
std::vector<short> vec2 = res;
|
||||
REQUIRE(vec2 == vec);
|
||||
}
|
||||
|
||||
TEST_CASE("Result can be printed using <<") {
|
||||
Result<int> const res{1, 2, 3};
|
||||
Result<int> res{1, 2, 3};
|
||||
std::ostringstream os;
|
||||
os << res;
|
||||
REQUIRE(os.str() == "[1, 2, 3]");
|
||||
@@ -139,8 +139,8 @@ TEST_CASE("Convert from Result<int> to Result<ns>") {
|
||||
|
||||
TEST_CASE("Result of vectors") {
|
||||
using VecVec = std::vector<std::vector<int>>;
|
||||
VecVec const vecvec{{1, 2, 3}, {4, 5, 6}};
|
||||
Result<VecVec> const res{vecvec};
|
||||
VecVec vecvec{{1, 2, 3}, {4, 5, 6}};
|
||||
Result<VecVec> res{vecvec};
|
||||
}
|
||||
|
||||
TEST_CASE("Free function begin end") {
|
||||
@@ -159,30 +159,30 @@ TEST_CASE("Sorting a Result") {
|
||||
}
|
||||
|
||||
TEST_CASE("Printing Result<std::string>") {
|
||||
Result<std::string> const res{"ein", "zwei", "drei"};
|
||||
Result<std::string> res{"ein", "zwei", "drei"};
|
||||
std::ostringstream os;
|
||||
os << res;
|
||||
REQUIRE(os.str() == "[ein, zwei, drei]");
|
||||
}
|
||||
|
||||
TEST_CASE("Printing Result<int>") {
|
||||
Result<int> const res{1, 2, 3};
|
||||
Result<int> res{1, 2, 3};
|
||||
std::ostringstream os;
|
||||
os << res;
|
||||
REQUIRE(os.str() == "[1, 2, 3]");
|
||||
}
|
||||
|
||||
TEST_CASE("String conversions") {
|
||||
Result<int> const res{1, 2, 3};
|
||||
Result<int> res{1, 2, 3};
|
||||
REQUIRE(ToString(res) == "[1, 2, 3]");
|
||||
|
||||
Result<std::string> const res2{"one", "two", "three"};
|
||||
Result<std::string> res2{"one", "two", "three"};
|
||||
REQUIRE(ToString(res2) == "[one, two, three]");
|
||||
|
||||
using Smap = std::map<std::string, std::string>;
|
||||
Smap m;
|
||||
m["one"] = "1";
|
||||
Result<Smap> const res3{m, m, m};
|
||||
Result<Smap> res3{m, m, m};
|
||||
REQUIRE(res3.size() == 3);
|
||||
REQUIRE(ToString(res3) == "[{one: 1}, {one: 1}, {one: 1}]");
|
||||
|
||||
@@ -191,25 +191,25 @@ TEST_CASE("String conversions") {
|
||||
m2["two"] = "2";
|
||||
m2["three"] = "3";
|
||||
|
||||
Result<Smap> const res4{m, m2, m};
|
||||
Result<Smap> res4{m, m2, m};
|
||||
REQUIRE(ToString(res4) ==
|
||||
"[{one: 1}, {one: 1, three: 3, two: 2}, {one: 1}]");
|
||||
}
|
||||
|
||||
TEST_CASE("Any element is equal") {
|
||||
Result<int> const r{1, 2, 3, 4, 5};
|
||||
Result<int> r{1, 2, 3, 4, 5};
|
||||
REQUIRE(r.any(3));
|
||||
REQUIRE_FALSE(r.any(9));
|
||||
}
|
||||
|
||||
TEST_CASE("Result contains only the specified elements") {
|
||||
Result<int> const r{1, 1, 1};
|
||||
Result<int> r{1, 1, 1};
|
||||
REQUIRE(r.contains_only(1));
|
||||
REQUIRE(r.contains_only(1, 1));
|
||||
}
|
||||
|
||||
TEST_CASE("Only with multiple values") {
|
||||
Result<int> const r{1, 1, 2, 1, 2, 1, 1};
|
||||
Result<int> r{1, 1, 2, 1, 2, 1, 1};
|
||||
REQUIRE_FALSE(r.contains_only(1));
|
||||
REQUIRE_FALSE(r.contains_only(2));
|
||||
REQUIRE(r.contains_only(1, 2));
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user