241 Commits

Author SHA1 Message Date
2cb09a590a gotthard2, mythen3: firmware type check added, others: minor print 2020-03-10 16:25:07 +01:00
df2512fb1c all servers: eiger, jungfrau, gotthard, ctb, moench, mythen3, gotthard2 updated 2020-03-10 15:57:27 +01:00
e4942a5c8d virtual servers warnings fixed 2020-03-10 15:53:44 +01:00
ac1c40d6f9 virtual servers: redundant declarations fixed 2020-03-10 15:50:33 +01:00
5192dae9c5 removed virtual server warnings 2020-03-10 15:15:09 +01:00
Erik Frojdh
bd6529a64c warnings for virtual servers 2020-03-10 09:27:23 +01:00
4a802bd2e4 gotthard2: switching between continuous to burst mode (burstperiod got reset: fixed) 2020-03-05 16:35:52 +01:00
9ca86c2edb ctb, gotthard, gotthard2, jungfrau, mythen updated 2020-03-05 10:21:24 +01:00
4e2f685b76 gotthard2: gain plot fix with clones 2020-03-04 14:39:44 +01:00
032475fc14 gainplot clone revised 2020-03-04 10:17:51 +01:00
134611c638 gotthard2: switching between period and burst period (not delay and burst period), internal frequency depending on timing source (for all except actualtime and measurement time) 2020-03-03 17:49:28 +01:00
a769f7515c gotthard2 bug fix: fixed pll freq was incorrect when 0 in front 2020-02-28 16:03:15 +01:00
Dhanya Thattil
11e7737a2f
gotthard2: timingsource and currentsource features, (timing source external yet to be implemented in fpga to test (#80) 2020-02-28 12:45:02 +01:00
fe3a7b0faf gotthard2: removed unnecessary casting 2020-02-26 11:02:28 +01:00
6a0a931e3e gotthard2: bursts and burst period, written to same register as triggers and delay (kept in server as variables) and set if conditions meet. bursts and burst period only in auto timing and burst mode. Also updating theses registers when switching between timing modes or burst modes 2020-02-25 15:45:40 +01:00
c03bc4a6b4 gotthard2: copy #frames and period when switching between continuous and burst mode 2020-02-24 17:20:51 +01:00
02b367ffe8 mythen3 and gotthard2: updated clocks 2020-02-24 16:50:47 +01:00
dfb1b9ad69 Revert "gotthard2: burst mode check"
This reverts commit 4d6996bd556ea9788bb98b19fbe6537e0a41e16c.
2020-02-04 15:29:43 +01:00
4d6996bd55 gotthard2: burst mode check 2020-02-04 15:28:24 +01:00
0ac28c0208 gotthard2: burst mode check for #frames 2020-02-04 15:27:18 +01:00
37c3048c2a gotthard2: bug fix from previosu commit 2020-02-04 12:32:37 +01:00
d3dc9a7690 gotthard2: disentangled burst mode #frames, exptime, period from start of acquisition, order dependent now for debugging 2020-02-04 12:23:58 +01:00
806a2736c1 gotthard2: longer wait for startup, period 0 2020-02-04 12:00:07 +01:00
36bd91daa3 gotthard2: sleep before configuring on chip dacs, default exptime 0 and default period to 1ms 2020-02-04 10:50:01 +01:00
89c774dbf7 nios programming: check file size first 2020-01-31 11:24:48 +01:00
Dhanya Thattil
5ca3a1b685
gotthard2 and mythen3: programming fpga, reboot; jungfrau, ctb: modified programming (#74) 2020-01-30 19:52:35 -08:00
a9e375ed34 gotthard2: bursttype to burstmode 2020-01-23 11:03:14 +01:00
f881133795 get/set timing, generate data for gotthard2, vref_rstore instead of restore for gotthard2 2020-01-22 18:18:56 +01:00
8cbf3c62a9 merge from developer 2020-01-22 17:30:13 +01:00
3ea2520615 PR minor changes 2020-01-22 13:55:10 +01:00
e746256653 gotthard2: gain updated 2020-01-21 16:01:38 +01:00
2e78484b61 gotthard2 virtual server sends data 2020-01-21 14:50:31 +01:00
c4137dc309 gotthard2: works 2020-01-20 17:03:11 +01:00
23dffa47df gotthard2 bug fix: no module attached 2020-01-20 14:42:06 +01:00
6cfd0f8962 gotthard2: first edit 2020-01-20 12:13:23 +01:00
e8bdf5a505 gotthard2: updated register map; powerchip checking detector type; internal and external period, frames, exptime; set/get delay, get actualtime, measurement, framesfromstart enabled; which detector comment updated in cmdproxy, detector and slsdetector 2020-01-16 15:33:35 +01:00
9455a5fba1 ctb: adcenable10g included, 10g readout enables included 2019-11-27 17:28:57 +01:00
6b391a34dc gotthard2: bug fix adconfiguration initialization 2019-11-25 14:14:05 +01:00
94382c1ece m3 and g2: while setting clock freq, change phase only if there is a change in phase (removing more printouts, will still only set if needed ) 2019-11-25 10:54:30 +01:00
a95ab1e13e servers: default compile not update versionign 2019-11-22 17:23:07 +01:00
c4675da0c3 m3: reset fixed 2019-11-22 16:40:43 +01:00
d07873ee39 mythen3 and gotthard2: wait request not needed, reset to be implemented 2019-11-22 11:29:24 +01:00
f8df11886a ctb: change in phase done in degrees (phase reset due to change in frequency) 2019-11-21 15:08:38 +01:00
d976c9fcf9 gotthard2: phase direction like mythen3 2019-11-21 14:41:54 +01:00
1cea6af590 mythen3, gotthard2: change phase, change freq bugfix 2019-11-19 17:57:28 +01:00
6a27207875 gotthard2: vetoref, burstmode 2019-11-15 18:59:27 +01:00
a62d6a2fb8 gotthard2: veto reference, better code for byte aligment in server 2019-11-15 11:58:23 +01:00
5518531620 gotthard2: veto reference 2019-11-14 19:01:10 +01:00
21d23be522 gotthard2: inejct channel done 2019-11-13 16:49:35 +01:00
28a5aa8342 injectchannel WIP 2019-11-13 15:11:11 +01:00