2e2e91b219
ctb adc: get in uV and print in client in mV to get decimals
2020-02-27 15:43:42 +01:00
10ba16a9dc
updating versions
2020-02-27 14:26:18 +01:00
8c8032dc69
ctb bug fix: slow adcs incorrect mv read out, needed clk down and usleep before reading
2020-02-27 09:16:22 +01:00
90acd51389
server api changes: for mythen3, jungfrau, eiger as well
2020-02-26 17:52:35 +01:00
fe3a7b0faf
gotthard2: removed unnecessary casting
2020-02-26 11:02:28 +01:00
6a0a931e3e
gotthard2: bursts and burst period, written to same register as triggers and delay (kept in server as variables) and set if conditions meet. bursts and burst period only in auto timing and burst mode. Also updating theses registers when switching between timing modes or burst modes
2020-02-25 15:45:40 +01:00
02b367ffe8
mythen3 and gotthard2: updated clocks
2020-02-24 16:50:47 +01:00
21a1b872bf
bugfix:mythen3 date change
2020-02-24 11:00:16 +01:00
3a74ca8fc2
bugfix: mythen3 git date incorrect
2020-02-24 10:53:06 +01:00
Erik Frojdh
3ea9b86bf5
date fix
2020-02-13 14:50:23 +01:00
36bd91daa3
gotthard2: sleep before configuring on chip dacs, default exptime 0 and default period to 1ms
2020-02-04 10:50:01 +01:00
f0cccf9de8
initialchecks can be bypassed (version compatibility and oher tests at server start up)
2020-01-31 16:46:33 +01:00
89c774dbf7
nios programming: check file size first
2020-01-31 11:24:48 +01:00
Dhanya Thattil
5ca3a1b685
gotthard2 and mythen3: programming fpga, reboot; jungfrau, ctb: modified programming ( #74 )
2020-01-30 19:52:35 -08:00
2314fdabd1
merge from mythen3, and jungfrau fix
2020-01-23 16:44:01 +01:00
abe63acc79
jungfrau fix: wait for acquisition to be done before sending stop receiver
2020-01-23 16:41:09 +01:00
a9e375ed34
gotthard2: bursttype to burstmode
2020-01-23 11:03:14 +01:00
f881133795
get/set timing, generate data for gotthard2, vref_rstore instead of restore for gotthard2
2020-01-22 18:18:56 +01:00
8cbf3c62a9
merge from developer
2020-01-22 17:30:13 +01:00
3ea2520615
PR minor changes
2020-01-22 13:55:10 +01:00
Dhanya Thattil
d8fccdcefa
Merge branch 'developer' into gotthard2
2020-01-21 18:18:57 +01:00
981b13494c
mythen3: virtual server, connected timing mode, row and col in header, included pattern bit and mask
2020-01-21 18:16:27 +01:00
7131f77a3a
eiger: vcal set to 0
2020-01-21 16:10:15 +01:00
2e78484b61
gotthard2 virtual server sends data
2020-01-21 14:50:31 +01:00
6cfd0f8962
gotthard2: first edit
2020-01-20 12:13:23 +01:00
6e47f0b7f7
merge resolved
2020-01-20 11:36:35 +01:00
3c891495db
mythen3: bug fix detector type
2020-01-20 11:32:02 +01:00
e8bdf5a505
gotthard2: updated register map; powerchip checking detector type; internal and external period, frames, exptime; set/get delay, get actualtime, measurement, framesfromstart enabled; which detector comment updated in cmdproxy, detector and slsdetector
2020-01-16 15:33:35 +01:00
Dhanya Thattil
de53747ddd
Counters ( #71 )
...
* mythen3: adding counters mask, firmware still takes only number of counters for now
* mythen3: checking if module attached before powering on chip
* bug fix: loop inital declaration not allowed in c
* fix scope eiger test
* mythen3: renamed setCounters to setCounterMask and getCounterMask in API
* mythen3 replacing counting bits with popcount
Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
2020-01-14 17:40:46 +01:00
28f8a76dcc
updated binaries
2020-01-10 09:05:26 +01:00
086cbacd84
mythen3: connected busy signal insttead of timer
2019-12-10 11:03:27 +01:00
af9b25fd67
eiger: validate trimval range
2019-12-10 10:32:28 +01:00
504fc2d095
ctb: validate asampes and dsamples > 0 for romode; client: exception caught in acquire to stop receiver and clear busy flag
2019-12-10 10:25:14 +01:00
5cf1502287
ctb bug fix: 10g adc enable mask
2019-12-09 11:30:54 +01:00
2ece6b945e
rxr: warnings shouldnt throw exception
2019-11-29 11:09:41 +01:00
3486137de3
bfin warnings fixed
2019-11-27 18:22:33 +01:00
9455a5fba1
ctb: adcenable10g included, 10g readout enables included
2019-11-27 17:28:57 +01:00
f299a34e59
ctb server binary update
2019-11-27 11:31:30 +01:00
9e8a874e39
rxr bug fix: update shm when updating rxr
2019-11-27 11:12:31 +01:00
6b391a34dc
gotthard2: bug fix adconfiguration initialization
2019-11-25 14:14:05 +01:00
94382c1ece
m3 and g2: while setting clock freq, change phase only if there is a change in phase (removing more printouts, will still only set if needed )
2019-11-25 10:54:30 +01:00
c4675da0c3
m3: reset fixed
2019-11-22 16:40:43 +01:00
d07873ee39
mythen3 and gotthard2: wait request not needed, reset to be implemented
2019-11-22 11:29:24 +01:00
f8df11886a
ctb: change in phase done in degrees (phase reset due to change in frequency)
2019-11-21 15:08:38 +01:00
d976c9fcf9
gotthard2: phase direction like mythen3
2019-11-21 14:41:54 +01:00
955bc74a91
mythen3: change vco freq to 1.25GHz
2019-11-21 13:38:54 +01:00
781e8fc67f
mythen3: workaround for busy signal
2019-11-20 11:57:14 +01:00
1cea6af590
mythen3, gotthard2: change phase, change freq bugfix
2019-11-19 17:57:28 +01:00
dfc886a65b
mythen3 gui
2019-11-18 17:57:19 +01:00
a62d6a2fb8
gotthard2: veto reference, better code for byte aligment in server
2019-11-15 11:58:23 +01:00
