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Author	SHA1	Message	Date
mazzol_a	4c1445a2e2	solved merge conflict	2026-04-29 14:31:56 +02:00
Martin Mueller	6bbbce5dc3	CTB: simplify power monitoring (#1428) ... * simplify power monitoring * removed register definitions not needed anymore, formatting * binaries updated --------- Co-authored-by: Martin Mueller <martin.mueller@psi.ch> Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>	2026-04-27 16:54:44 +02:00
mazzol_a	f3fba17dd3	Merge branch 'developer' of github.com:slsdetectorgroup/slsDetectorPackage into dev/matterhornserver	2026-04-24 10:34:56 +02:00
maliakal_d	49ef6df714	fix synchronizer test script (#1440)	2026-04-23 17:18:41 +02:00
mazzol_a	4a236a330f	solved merge conflict	2026-04-23 17:17:34 +02:00
mazzol_a	dd1dace504	refactored directory structure	2026-04-23 17:07:54 +02:00
mazzol_a	b7c2907349	PR Review	2026-04-23 16:25:27 +02:00
mazzol_a	edf1522e0f	porper cleanup of matterhorn app	2026-04-23 09:37:18 +02:00
mazzol_a	973bd89ca5	updated documentation workflow (#1436)	2026-04-21 11:56:19 +02:00
maliakal_d	c05d5a37cd	dev/ fix vchip and binaries (#1435) ... * updated binaries and fixed a warning by moving the usleep_bf to blackfin.c * suppressed warnings * cleaned up docs * renamed function --------- Co-authored-by: Alice <alice.mazzoleni@psi.ch>	2026-04-21 10:59:05 +02:00
mazzol_a	d1d6a45e41	wrong overload	2026-04-20 16:37:33 +02:00
mazzol_a	d2977b4fa2	added some more functions	2026-04-20 14:50:33 +02:00
mazzol_a	63db9b5704	removed stopserver	2026-04-20 13:59:13 +02:00
mazzol_a	864963807a	Merge branch 'developer' into dev/matterhornserver	2026-04-20 12:30:59 +02:00
mazzol_a	ba48329cd4	added Server class usable for all detectors	2026-04-20 12:25:11 +02:00
mazzol_a	8511064640	updated cmake	2026-04-17 17:42:41 +02:00
Martin Mueller	326df1de97	fix pyctbgui powerindex (#1433) ... * fix pyctbgui powerindex * detangled power enable and power dac values * displaybox for vchip --------- Co-authored-by: Martin Mueller <martin.mueller@psi.ch> Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>	2026-04-17 09:25:40 +02:00
mazzol_a	d2a9fcd9f4	fixed build	2026-04-16 14:31:44 +02:00
mazzol_a	51be9dd127	warning unused variable from other PR	2026-04-16 11:48:43 +02:00
mazzol_a	7b166d0332	Matterhorn in tostring	2026-04-16 11:47:56 +02:00
mazzol_a	d264734925	added udp functions to matterhornserver	2026-04-16 11:47:33 +02:00
mazzol_a	a1ab556a0b	merge conflict	2026-04-15 17:46:11 +02:00
Martin Mueller	78edfe3b55	Running Matterhorn on altera CTB (#1427) ... * testing matterhorn1 SPI on altera CTB, works for dummy-chip * added bf_usleep with proper timing for blackfin * simplified spi firmware interface, removed write and readstrobe * define constant for BFIN spi sleep --------- Co-authored-by: Martin Mueller <martin.mueller@psi.ch>	2026-04-15 16:23:04 +02:00
maliakal_d	5ec5d46c48	Dev/ctb separate dac and power (#1420) ... * not allowing power names for dac names to prevent duplicate names * wip * v_abcd commands should be removed to prevent unintentional usage and throw with a suggestion command for dac and power * binary in * dacs with power dac names should work and do not take in dac units to avoid ambiguity, test with 0 value for power dacs should fail, to do: implement power commands * wip: power in client, tests, and fixed server interfaces and ctb implementation, not tested * wip. client and xilinx todo * wip: ctb power works, tests left * fixed some tests * added vchip check * python cmds still left. wip * fixed xilinx. python left * wip * wip. xilinx * fixed powerchip for ctb * power all returns all * configtransceiver is removed * wip python * wip * wip * wip * wip * wip * wip * wip xilinx * wip * wip * wip * pybindings * fix getdacindex and getdacname for normal detectors to throw if random index that doesnt fit to the detector * wip * fixed tests * fixes for python api * wip * python: moved powerlist to Ctb * fixed tests to work for powelist in Ctb * moved signallist, adclist, slowadc, slowadclist to Ctb * throw approperiate error when no modules added for powers * added dac test * fix dac default names and test for dacs * ctb dacs, yet to do othe rdacs * dacs should work now even in tests * run all tests * DetectorPowers->NamedPowers in ctb * comments * removed unnecessary test code * removed hard coded dac names in python NamedDacs and NamedPowers * minor * minor * fixed error messages * changed power to be able to set DAC directly, using enable and disable methods with enabled to get	2026-04-15 10:33:01 +02:00
mazzol_a	0094698572	WIP	2026-04-10 11:31:52 +02:00
mazzol_a	0d2b91cd1f	used CRTP for virtual detector	2026-03-30 11:03:44 +02:00
mazzol_a	7b918ff2e9	WIP	2026-03-25 14:53:47 +01:00
maliakal_d	4ee61ae791	ctb and xilinx: setting all dacs (normal, not power dacs) to 0 (not power down) at startup. This is safer than power down for 4 normal dacs. xilinx ctb: remove disable fmc at power off chip so one can power on and off the chip on their own (#1424)	2026-03-17 16:53:33 +01:00
mazzol_a	c86ca1eaec	per default pyqtgraph should read array as row-major (#1419) ... * per default pyqtgraph should read array as row-major * dont transform for analog images * never flip rows	2026-03-11 12:28:42 +01:00
maliakal_d	3846aec46e	Dev/jungfrau 1m root display support (#1364) ... * Aldo Mozzanica added support for 2 modules in 1M configuration for root display * deleted the wrong files	2026-03-05 17:13:38 +01:00
maliakal_d	6982b8cfa4	rm unnecessary hidden test tags (#1415) ... * removed hidden tags other than .detectorintegration and .disable_check_data_file * updated label, minor	2026-03-05 17:11:56 +01:00
mazzol_a	e3f4819ac2	dont use public headers of fmt	2026-03-05 16:33:03 +01:00
mazzol_a	c13ab29132	some format changes	2026-03-05 15:48:07 +01:00
mazzol_a	54009b2033	add fmt to conda recipe	2026-03-05 15:21:57 +01:00
mazzol_a	ea1edc02d8	properly added fmt as a dependency	2026-03-05 15:00:07 +01:00
maliakal_d	384b2480ab	Dev/fix no rx roi port (#1372) ... * rx_roi fixed when there is no roi for a particular port. Fixed tests for it * removing todo check if files created because its not enough to count matching pattern file names, but also look at timestamp and create files with timestamp else you read older ones. For now, checking individual rois is enough * restore md5 --------- Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>	2026-03-05 12:28:57 +01:00
Erik Fröjdh	a1b8dccdd9	added support for int() for RegisterAddress and RegisterValue (#1414)	2026-03-05 11:35:21 +01:00
mazzol_a	317c3187f5	solved merge conflict	2026-03-05 10:24:47 +01:00
mazzol_a	ab5e13aea0	oops given in hex	2026-03-05 09:46:36 +01:00
Erik Fröjdh	9f72688b9c	Adding offset to RegisterAddress (#1413) ... * implemented + and += for RegisterAddres and tests plus test cleanup	2026-03-05 09:32:21 +01:00
mazzol_a	370aada490	generated register defs from csv file	2026-03-04 21:38:48 +01:00
mazzol_a	6e090dbba2	Dev/update workflows (#1406) ... * only run tests for pull-requests * build gui and simulators * trigger upon push to all branches * renamed workflows * added python tests * added colorama and numpy * added slsdet to pythonpath * updated workflow name	2026-03-02 14:30:27 +01:00
maliakal_d	60f5db1224	xilinx: slow adcs (#1405) ... * xilinx: slow adcs * minor * xilinx: max reference voltage back to 2500mV for slow adcs ad7689	2026-02-27 17:17:11 +01:00
maliakal_d	a3e6cc90ea	server versions werent getting updated (#1407)	2026-02-27 17:12:27 +01:00
maliakal_d	a1c5bf971f	ctb: vchip doesnt validate with vlimit anymore (#1404)	2026-02-26 14:22:46 +01:00
mazzol_a	6a9eac17c8	removed make for the pyctbgui (#1401)	2026-02-25 16:40:32 +01:00
mazzol_a	23fdc1e198	WIP	2026-02-25 14:06:50 +01:00
maliakal_d	e5b8e4ee80	fix the master hdf5 extension from aprevious PR (#1399)	2026-02-24 10:49:11 +01:00
mazzol_a	0e1dad47db	added fmt to workflow	2026-02-23 16:57:52 +01:00
mazzol_a	10ec7c4ae6	cleaned up logs	2026-02-23 16:56:04 +01:00