Running Matterhorn on altera CTB (#1427)

* testing matterhorn1 SPI on altera CTB, works for dummy-chip

* added bf_usleep with proper timing for blackfin

* simplified spi firmware interface, removed write and readstrobe

* define constant for BFIN spi sleep

---------

Co-authored-by: Martin Mueller <martin.mueller@psi.ch>

slsDetectorServers/ctbDetectorServer/RegisterDefs.h

@@ -628,6 +628,14 @@
 #define ADC_SLOW_CTRL_DONE_OFST (1)
 #define ADC_SLOW_CTRL_DONE_MSK  (0x00000001 << ADC_SLOW_CTRL_DONE_OFST)
 
+/* SPI */
+#define SPI_CTRL_REG (0x48 << MEM_MAP_SHIFT)
+    #define SPI_CTRL_RX_EMPTY_BIT    2
+    #define SPI_CTRL_CHIPSELECT_BIT  4
+    #define SPI_CTRL_NBIT_OFST       16
+#define SPI_WRITEDATA_REG (0x49 << MEM_MAP_SHIFT)
+#define SPI_READDATA_REG (0x4A << MEM_MAP_SHIFT)
+
 /** I2C Control register */
 #define I2C_TRANSFER_COMMAND_FIFO_REG (0x100 << MEM_MAP_SHIFT)
 #define I2C_RX_DATA_FIFO_REG          (0x101 << MEM_MAP_SHIFT)

slsDetectorServers/slsDetectorServer/include/slsDetectorServer_funcs.h

@@ -8,6 +8,7 @@
 
 #define GOODBYE (-200)
 #define REBOOT  (-400)
+#define BFIN_SPI_WAIT_uSECONDS 25
 
 // initialization functions
 int updateModeAllowedFunction(int file_des);

slsDetectorServers/slsDetectorServer/src/slsDetectorServer_funcs.c

@@ -10907,6 +10907,15 @@ int set_pattern_wait_interval(int file_des) {
     return Server_SendResult(file_des, INT64, NULL, 0);
 }
 
+// usleep is not viable on blackfin
+void usleep_bf(uint64_t i){
+    const uint64_t BFIN_CYCLES_1uSECOND=20;
+    uint64_t j=i*20;
+    while(--j){
+        asm volatile("");
+    }
+}
+
 /**
  *  Non destructive read from SPI register. Read n_bytes by shifting in dummy
  *  data while keeping csn 0 after the operation. Shift the read out data back
@@ -10914,7 +10923,7 @@ int set_pattern_wait_interval(int file_des) {
  */
 
 int spi_read(int file_des) {
-#if !defined(XILINX_CHIPTESTBOARDD)
+#if !defined(XILINX_CHIPTESTBOARDD) && !defined(CHIPTESTBOARDD)
     functionNotImplemented();
     return sendError(file_des);
 #endif
@@ -10964,7 +10973,7 @@ int spi_read(int file_des) {
     for (int i = 0; i < n_bytes; i++) {
         fake_register[i] = (uint8_t)((i * 2) % 256);
     }
-#else
+#elif defined(XILINX_CHIPTESTBOARDD)
     int spifd = open("/dev/spidev2.0", O_RDWR);
     LOG(logINFO, ("SPI Read: opened spidev2.0 with fd=%d\n", spifd));
     if (spifd < 0) {
@@ -10973,7 +10982,7 @@ int spi_read(int file_des) {
     }
 #endif
 
-    // Allocate dummy data to shif in, we keep a copy of this
+    // Allocate dummy data to shift in, we keep a copy of this
     // to double check that we access a register of the correct size
     uint8_t *dummy_data = malloc(n_bytes);
     if (dummy_data == NULL) {
@@ -11040,7 +11049,7 @@ int spi_read(int file_des) {
         fake_register[i] = local_tx[i + 1];
     }
 
-#else
+#elif defined(XILINX_CHIPTESTBOARDD)
     // For the real detector we do the transfer here
     if (ioctl(spifd, SPI_IOC_MESSAGE(1), &send_cmd) < 0) {
         // cleanup since we return early
@@ -11054,6 +11063,15 @@ int spi_read(int file_des) {
         sprintf(mess, "SPI write failed with %d:%s\n", errno, strerror(errno));
         return sendError(file_des);
     }
+#elif defined(CHIPTESTBOARDD)
+    // set spi to 8 bit per word (-1 comes from the firmware), set chipselect
+    bus_w(SPI_CTRL_REG, ((8 - 1) << SPI_CTRL_NBIT_OFST)+ (1 << SPI_CTRL_CHIPSELECT_BIT));
+    for (int i = 0; i < n_bytes + 1; ++i) {
+        // TODO: should we make bus_w to this address blocking in the firmware to remove usleep ?
+        bus_w(SPI_WRITEDATA_REG, local_tx[i]);
+        usleep_bf(BFIN_SPI_WAIT_uSECONDS);
+        local_rx[i] = (uint8_t)bus_r(SPI_READDATA_REG);
+    }
 #endif
 
     // Copy everything but the first received byte to the user. First byte
@@ -11074,7 +11092,7 @@ int spi_read(int file_des) {
         local_rx[i + 1] = fake_register[i];
     }
     free(fake_register); // we are done with the fake register
-#else
+#elif defined(XILINX_CHIPTESTBOARDD)
     if (ioctl(spifd, SPI_IOC_MESSAGE(1), &send_cmd) < 0) {
         // cleanup since we return early
         close(spifd);
@@ -11088,6 +11106,13 @@ int spi_read(int file_des) {
         return sendError(file_des);
     }
     close(spifd);
+#elif defined(CHIPTESTBOARDD)
+    for (int i = 0; i < n_bytes + 1; ++i) {
+        bus_w(SPI_WRITEDATA_REG, local_tx[i]);
+        usleep_bf(BFIN_SPI_WAIT_uSECONDS);
+        local_rx[i] = (uint8_t)bus_r(SPI_READDATA_REG);
+    }
+    bus_w(SPI_CTRL_REG, (8 - 1) << SPI_CTRL_NBIT_OFST); // remove chip-select
 #endif
     ret = OK;
     LOG(logDEBUG1, ("SPI Read Complete\n"));
@@ -11105,7 +11130,7 @@ int spi_read(int file_des) {
  * Write to SPI register.
  */
 int spi_write(int file_des) {
-#if !defined(XILINX_CHIPTESTBOARDD)
+#if !defined(XILINX_CHIPTESTBOARDD) && !defined(CHIPTESTBOARDD)
     functionNotImplemented();
     return Server_SendResult(file_des, INT32, NULL, 0);
 #endif
@@ -11186,7 +11211,7 @@ int spi_write(int file_des) {
     for (int i = 0; i < n_bytes + 1; i++) {
         local_rx[i] = local_tx[i];
     }
-#else
+#elif defined(XILINX_CHIPTESTBOARDD)
     int spifd = open("/dev/spidev2.0", O_RDWR);
     LOG(logINFO, ("SPI Read: opened spidev2.0 with fd=%d\n", spifd));
     if (spifd < 0) {
@@ -11205,6 +11230,15 @@ int spi_write(int file_des) {
         return sendError(file_des);
     }
     close(spifd);
+#elif defined(CHIPTESTBOARDD)
+    // set spi to 8 bit per word (-1 comes from firmware), set chip-select
+    bus_w(SPI_CTRL_REG, ((8 - 1) << SPI_CTRL_NBIT_OFST)+ (1 << SPI_CTRL_CHIPSELECT_BIT));
+    for (int i = 0; i < n_bytes + 1; ++i) {
+        bus_w(SPI_WRITEDATA_REG, local_tx[i]);
+        usleep_bf(BFIN_SPI_WAIT_uSECONDS);
+        local_rx[i] = (uint8_t)bus_r(SPI_READDATA_REG);
+    }
+    bus_w(SPI_CTRL_REG, (8 - 1) << SPI_CTRL_NBIT_OFST); // remove chip-select
 #endif
 
     ret = OK;
@@ -11357,3 +11391,5 @@ int set_voltage_limit(int file_des) {
 #endif
     return Server_SendResult(file_des, INT32, NULL, 0);
 }
+
+