Commit Graph

19 Commits

Author SHA1 Message Date
ritt bcc7e30369 Implemented measurement of leakage currents 2016-12-01 16:16:37 +01:00
ritt dfe33dc32d Made chip test work with normal V5 board 2016-12-01 12:25:02 +01:00
ritt 50964d81ca Updated examples to new project structure 2016-12-01 09:31:25 +01:00
ritt 8d814a6705 Switch EXT properly when entering / exiting transparent mode 2016-12-01 08:50:23 +01:00
ritt fab70c5365 Fixed problem when no trigger channel is selected 2016-11-30 17:38:23 +01:00
ritt 8906b39e7d Fixed trigger display if no channel is selected 2016-11-30 17:34:59 +01:00
ritt 8004cfb357 Fixed color of trigger level display at bottom of screen 2016-11-30 17:22:34 +01:00
ritt 51134fb2db Re-arranged trigger source configuration 2016-11-30 17:14:46 +01:00
ritt 5ab32c3921 Made transparent trigger mode wok in multi-board configuration 2016-11-28 16:57:50 +01:00
ritt 12709a248e Added trigger schemata 2016-11-25 17:01:54 +01:00
ritt 14420607f2 Implemented variable readout delay in firmware, not at version 30000 2016-11-25 09:14:13 +01:00
ritt 403dc702fb Implemented readout delay 2016-11-24 17:19:27 +01:00
ritt 16b6359c37 Added readout delay to register map 2016-11-24 14:54:17 +01:00
ritt bdd6b7fcad Align cell #0 of each channel instead of 700. Same result, but less confusing. 2016-11-24 14:40:27 +01:00
ritt 017f72c313 Added docs tree 2016-11-21 17:16:07 +01:00
ritt 43ec896a4b Recompiled firmware 2016-11-14 16:33:59 +01:00
ritt 93a27c595f Ignore executables 2016-11-14 16:01:36 +01:00
ritt f61e25d591 README.md edited online with Bitbucket 2016-11-14 14:46:39 +00:00
ritt 7bca3829fa Copied files over from SVN repositories 2016-11-14 15:38:40 +01:00