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Code Issues Pull Requests Actions 1 Packages Projects Releases 37 Wiki Activity
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5e7868d17d53abbe94908d352fed0cd449e8b62e
Jungfraujoch/fpga/scripts
History
Filip Leonarski a7c2849a84 FPGA: measure pipeline beats in timer
2023-11-21 15:55:23 +01:00
..
bd_pcie.tcl
FPGA: Add processing stalls
2023-11-21 15:42:26 +01:00
build_pcie_design.tcl
FPGA: Clean-up of HDL modules
2023-11-18 19:18:26 +01:00
check_hls.sh
FPGA: Split receiver and FPGA design directories
2023-06-07 21:21:22 +02:00
hbm_cache.tcl
FPGA: Add processing stalls
2023-11-21 15:42:26 +01:00
hbm_u55c.tcl
FPGA: Integration on FPGA allows for per pixel weights (in range 1.99 - 3e-5)
2023-10-21 15:37:46 +02:00
image_processing.tcl
FPGA: data analysis is done based on 24-bit numbers - allowing frame summation
2023-10-28 16:35:33 +02:00
jfjoch.tcl
FPGA: measure pipeline beats in timer
2023-11-21 15:55:23 +01:00
mac_100g_pcie.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
network_stack.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
pcie_dma.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
setup_action.sh
FPGA: Fix setup_action.sh
2023-11-17 16:48:27 +01:00
synth_and_impl.tcl
FPGA: Use AggressiveExplore for routing
2023-10-27 19:12:27 +02:00
synth_hls_function.tcl
HLS: Use U55C part number for proper usage statistics
2023-10-27 13:54:35 +02:00
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