Filip Leonarski f3e85deb31 FPGA: Increase PCIe BAR size to 16 MB

2023-09-13 20:55:10 +02:00

..

bd_pcie.tcl

FPGA: Replace internal_packet_generator with frame_generator (generating UDP packets, instead of internal JFJoch packets)

2023-09-13 20:06:09 +02:00

build_pcie_design.tcl

FPGA: Split receiver and FPGA design directories

2023-06-07 21:21:22 +02:00

check_hls.sh

FPGA: Split receiver and FPGA design directories

2023-06-07 21:21:22 +02:00

hbm_u55c.tcl

FPGA: load calibration operates directly on HBM

2023-09-11 21:47:29 +02:00

jfjoch.tcl

FPGA: Some clean-up of frame generator

2023-09-13 20:53:55 +02:00

mac_100g_pcie.tcl

FPGA: Increase FIFO size to improve buffering capability

2023-09-07 12:23:38 +02:00

network_stack.tcl

FPGA: Split receiver and FPGA design directories

2023-06-07 21:21:22 +02:00

pcie_dma.tcl

FPGA: Increase PCIe BAR size to 16 MB

2023-09-13 20:55:10 +02:00

setup_action.sh

FPGA: Split receiver and FPGA design directories

2023-06-07 21:21:22 +02:00

synth_and_impl.tcl

FPGA: Split receiver and FPGA design directories

2023-06-07 21:21:22 +02:00

synth_hls_function.tcl

FPGA: Split receiver and FPGA design directories

2023-06-07 21:21:22 +02:00