v1.0.0-rc.150 #60
Merged
leonarski_f
merged 2 commits from 2026-06-15 20:24:15 +02:00
2606-force-cpu-azint into main
2 Commits
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 leonarski_f
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04db106bd0 |
VERSION: 1.0.0-rc.150
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leonarski_f
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51451f167b |
Force CPU azimuthal integration in FPGA workflow
Add AzimuthalIntegrationSettings::ForceCPUinFPGAWorkflow so the FPGA data-acquisition path can compute azimuthal integration on the CPU instead of the FPGA. This removes the FPGA bin-count limit (FPGA_INTEGRATION_BIN_COUNT) and adds per-bin standard deviation. - MXAnalysisAfterFPGA runs AzIntEngineCPU on the assembled image; the FPGA integration-map load and per-module read-back are skipped when forced. - JFJochReceiverFPGA rejects bin counts above the FPGA limit at acquisition start (unless CPU is forced) with an actionable error. - Wire force_cpu through the broker (both directions) and the frontend. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com> |