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mx/Jungfraujoch
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Code Issues Pull Requests 1 Actions Packages Projects Releases 53 Wiki Activity
671 Commits 69 Branches 138 Tags
7d48c5f2cde3c040fdfd8f7cb183b6a2a12bc1b2
Commit Graph

8 Commits

Author SHA1 Message Date
leonarski_f b3eceef7cd FPGA: Max module number is 32 2023-11-01 15:55:06 +01:00
leonarski_f 112a62fc7f FPGA: remove limit of modules for frame_generator 2023-11-01 14:20:43 +01:00
leonarski_f 8f2b01be80 FPGA: frame_generator and load_calibration return value for error checking 2023-11-01 13:31:41 +01:00
leonarski_f 3b65e6bf88 FPGA: Integration on FPGA allows for per pixel weights (in range 1.99 - 3e-5) 2023-10-21 15:37:46 +02:00
leonarski_f 84bf69b8a6 FPGA: frame generator reads from HBM (work in progress) 2023-09-26 13:14:43 +02:00
leonarski_f f4f4b50be7 FPGA: frame_generator has 8 module specific frames 2023-09-24 15:43:04 +02:00
leonarski_f 16bbf54f2a Remove open source license (for now) 2023-09-15 10:47:21 +02:00
leonarski_f 496d016c31 FPGA: Replace internal_packet_generator with frame_generator (generating UDP packets, instead of internal JFJoch packets) 2023-09-13 20:06:09 +02:00
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