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FPGA: Remove bitshuffle from the pipeline

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leonarski_f
2023-10-27 19:41:02 +02:00
parent f46a8e47a0
commit c896ec5659
3 changed files with 13 additions and 58 deletions
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tests/FPGAIntegrationTest.cpp
-37
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@@ -1235,40 +1235,3 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_spot_finder_snr_threshold"
REQUIRE (spot_finder_result.strong_pixel[0] == (1<<0));
REQUIRE (spot_finder_result.strong_pixel[(89*1024 + 300) / 8] == (1<<4)); // 300 % 8 == 4
}
TEST_CASE("HLS_C_Simulation_bitsuffle", "[FPGA][Full]") {
const uint16_t nmodules = 4;
DiffractionExperiment x((DetectorGeometry(nmodules)));
std::vector<uint16_t> input_frame(FRAME_GENERATOR_MODULES*RAW_MODULE_SIZE);
std::mt19937 g1(1387);
std::uniform_int_distribution<uint16_t> dist(0, 65535);
for (auto &i: input_frame)
i = dist(g1);
x.Mode(DetectorMode::Raw);
x.UseInternalPacketGenerator(true).ImagesPerTrigger(4).PedestalG0Frames(0);
HLSSimulatedDevice test(0, 64);
test.SetInternalGeneratorFrame(input_frame);
REQUIRE_NOTHROW(test.StartAction(x, MODE_BITSHUFFLE_FPGA));
REQUIRE_NOTHROW(test.WaitForActionComplete());
REQUIRE(test.OutputStream().size() == 1);
REQUIRE(test.GetBytesReceived() == 128 * nmodules * 4 * JUNGFRAU_PACKET_SIZE_BYTES);
for (int image = 0; image < 4; image++) {
for (int m = 0; m < nmodules; m++) {
auto imageBuf = (uint16_t *) test.GetDeviceOutput(image, m)->pixels;
std::vector<uint16_t> image_out_unshuf(RAW_MODULE_SIZE);
bshuf_bitunshuffle(imageBuf, image_out_unshuf.data(), RAW_MODULE_SIZE, sizeof(uint16_t), 2048);
for (int i = 0; i < RAW_MODULE_SIZE; i++) {
REQUIRE(image_out_unshuf[i] == input_frame[m * RAW_MODULE_SIZE + i]);
}
}
}
}