FPGA: integration results are reduced to cover two bins per 512-bit

2023-09-29 22:08:55 +02:00
parent ca118f26d5
commit 59d0850b1f
1 changed files with 0 additions and 1 deletions
@@ -1,6 +1,5 @@
 // Copyright (2019-2023) Paul Scherrer Institute

-
 #include "hls_jfjoch.h"

 void axis_256_to_512(hls::stream<ap_axiu<256,1,1,1>> &data_in,