moved files from /base/include
This commit is contained in:
Marty Kraimer
74
src/vxWorks/include/camacLib.h
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74
src/vxWorks/include/camacLib.h
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@@ -0,0 +1,74 @@
|
||||
/* camacLib.h -- Prototypes for camacLib.o
|
||||
*
|
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* Marty Wise
|
||||
* 10/11/93
|
||||
*
|
||||
* $Log$
|
||||
* Revision 1.1 1994/10/20 20:16:16 tang
|
||||
* Commit adding of Camac Driver h file.
|
||||
*
|
||||
* Revision 1.4 94/05/11 13:52:57 13:52:57 wise (Marty Wise)
|
||||
* Added low-level diagnostics
|
||||
*
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||||
* Revision 1.3 94/03/27 10:52:29 10:52:29 wise (Marty Wise)
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||||
* *** empty log message ***
|
||||
*
|
||||
* Revision 1.1 93/11/05 06:39:35 06:39:35 wise (Marty Wise)
|
||||
* Initial revision
|
||||
*
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||||
* Revision 0.3 93/10/19 09:03:45 09:03:45 wise (Marty Wise)
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||||
* Added cssa and csmad
|
||||
*
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||||
* Revision 0.2 93/10/12 07:33:01 07:33:01 wise (Marty Wise)
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||||
* cfubc working, cfmad working, almost ready for alpha release.
|
||||
*
|
||||
* Revision 0.1 93/10/11 10:31:48 10:31:48 wise (Marty Wise)
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* Initial revision
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||||
*
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||||
*
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||||
*
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||||
*/
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||||
static char ht2992_h_RCSID[] = "$Header$";
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||||
/********************************/
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||||
/* GLOBAL DATA */
|
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/********************************/
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extern int debug_hook;
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|
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extern struct glob_dat {
|
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int total;
|
||||
int read_error[5];
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int write_error[5];
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int cmd_error[5];
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int total_err;
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int lam_count[12];
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} debug_dat;
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||||
/********************************/
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||||
/* FUNCTION PROTOTYPES */
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/********************************/
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void cdreg(int *ext, int b, int c, int n, int a);
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void cfsa(int f, int ext, int *dat, int *q);
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void cssa(int f, int ext, short *dat, int *q);
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void ccci(int ext, int l);
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void cccz(int ext);
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void cccc(int ext);
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||||
void ccinit(int b);
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void ctci(int ext, int *l);
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void cgreg(int ext, int *b, int *c, int *n, int *a);
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void cfmad(int f, int extb[2], int *intc, int cb[4]);
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void cfubc(int f, int ext, int *intc, int cb[4]);
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void cfubc(int f, int ext, int *intc, int cb[4]);
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void csmad(int f, int extb[2], short *intc, int cb[4]);
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void ctcd(int ext, int *l);
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void cccd(int ext, int l);
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void csga(int fa[], int exta[], unsigned short intc[], int qa[], int cb[4]);
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void cfga(int fa[], int exta[], int intc[], int qa[], int cb[4]);
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void cfubr(int f, int ext, int intc[], int cb[4]);
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void csubc(int f, int ext, unsigned short *intc, int cb[4]);
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void csubr(int f, int ext, int intc[], int cb[4]);
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||||
void print_reg(int ext);
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586
src/vxWorks/include/module_types.h
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586
src/vxWorks/include/module_types.h
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@@ -0,0 +1,586 @@
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/* module_types.h */
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/* base/include $Id$ */
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/*
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* Author: Bob Dalesio
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* Date: 12-07-88
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*
|
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* Experimental Physics and Industrial Control System (EPICS)
|
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*
|
||||
* Copyright 1991, the Regents of the University of California,
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* and the University of Chicago Board of Governors.
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*
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* This software was produced under U.S. Government contracts:
|
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* (W-7405-ENG-36) at the Los Alamos National Laboratory,
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||||
* and (W-31-109-ENG-38) at Argonne National Laboratory.
|
||||
*
|
||||
* Initial development by:
|
||||
* The Controls and Automation Group (AT-8)
|
||||
* Ground Test Accelerator
|
||||
* Accelerator Technology Division
|
||||
* Los Alamos National Laboratory
|
||||
*
|
||||
* Co-developed with
|
||||
* The Controls and Computing Group
|
||||
* Accelerator Systems Division
|
||||
* Advanced Photon Source
|
||||
* Argonne National Laboratory
|
||||
*
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||||
* Modification Log:
|
||||
* -----------------
|
||||
* .01 12-07-88 lrd moved IO_TYPES.H into here
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||||
* added interruptable indicator for each io card
|
||||
* added arrays of pointers for info on the io cards
|
||||
* .02 02-01-89 lrd add Allen-Bradley Modules
|
||||
* rearrange I/O card order
|
||||
* .03 02-04-89 lrd add bus specification
|
||||
*
|
||||
* .04 02-06-89 joh add timing int vec #
|
||||
* .05 02-09-89 lrd move vectors and I/O card base addresses here
|
||||
* .06 02-11-89 lrd changed AB num cards to 12 and OFE num chan to 4
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||||
* .04 02-13-89 joh fixed length of timing address array
|
||||
* .05 04-22-89 lrd changed AB num channels to 8 for ABBI cards
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||||
* .06 04-24-89 lrd moved AB 6008SV info here
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* .07 05-26-89 joh added Joerger VTR1 transient recorder
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* .08 09-13-89 lrd add VXI module specification to each type
|
||||
* remove unused modules
|
||||
* .09 09-25-89 lrd AB adapters to 8 cards to 16 and IFE channels to
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* 8
|
||||
* .10 10-17-89 lrd AB changed number of cards from 12 to 16 for
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* binary inputs and outputs
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* .11 11-21-89 joh fixed card and chnl count for at5 vxi timing
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* .12 11-30-89 lrd add the OMS 6 axis motor driver
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* .13 12-12-89 joh moved XY220 base to match changes made by the
|
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* hardware section.
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* .14 05-16-90 cr add Single Ended IFE module
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* .15 05-24-90 mk add 4-20Ma IFE
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* .16 05-23-90 lrd/ms add DVX-2502
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* .17 07-19-90 ms changed the mizar interrupt vector to e8
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* wouldn't work with the CMC ethernet card
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* used the same interrupt vector
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* .18 12-19-90 lrd add 0-5V IFE
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* .19 03-26-91 lrd modified the AT5-VXIBO from 16 to 32
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* .20 07-23-91 ges Add AT830X card base addresses and vectors.
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* .21 08-14-91 ges Add AT830X_1 card base addresses and ivectors.
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* (These are the new gen 8308B and 8309C cards)
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* .22 06-24-92 joh added the hp E1368a VXI video switching module
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* .23 06-25-92 bg stripped intitial 1 off the standard addresses
|
||||
* in AB_BASE_ADDR,ai_memaddrs,wf_memaddrs,AT830X_
|
||||
* ADDRS, and AT830X_1_ADDRS so they can be mapped
|
||||
in sysBusToLocalAdrs
|
||||
* .24 06-25-92 bg stripped initial ff off all short addresses so
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||||
they can be mapped in sysBusToLocalAdrs
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||||
* .25 06-25-92 bg Moved SM_BASE_ADDR frin oms_driver.h to sm_addrs
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||||
in this file.
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* .26 06-25-92 bg Moved dvx addresses,interrupt vectors,channel numbers
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and card number definitions from dvx_driver.h to here.
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||||
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||||
* .26 06-25-92 bg Moved dvx addresses,interrupt vectors,channel numbers
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* .27 06-25-92 bg Added definitions for xy240_driver
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||||
* .28 06-25-92 bg Removed all reference to the Zio085
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* .29 06-26-92 bg Temporarily returned all reference to the Zio085
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||||
* .30 06-26-92 joh added binary input capability to the hp E1368a
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* VXI video switching module
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* .31 06-30-92 joh added constant for the number of VXI LA
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||||
* .32 07-06-92 joh added base and size VXIA24 & A32 devices
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* .33 07-07-92 joh added KSC V215 VXI AI
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||||
* .34 07-09-92 joh added AT8 FP10S master/slave fast
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* protect module
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||||
* .35 07-10-92 joh added FP int vec base
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||||
* .36 07-17-92 bg moved addresses for Comet card from drvComet.c to
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* here.
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* .37 07-23-92 joh number of AI channels for AT5 VXI should be 8 not 6
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* number of BI channels for AT5 VXI should be 32 not 16
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* number of TI channels for AT5 VXI should be 10 not 5
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||||
* (these changes reflect the AT5 hardware upgrade)
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*
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* .38 08-04-92 joh fixed COMET A16 base addr
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* .39 08-10-92 joh number of xy220 cards now matches the AT8
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* address standard
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* .40 08-11-92 joh moved xy010 base to here
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* .41 08-11-92 joh took out xycom specific defines
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* .42 09-15-92 joh DVX num cards was set allowing the DVX to
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* overlap the VXI DC address and continue
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* outside of VME A16. DVX num cards is now one
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* .43 06-18-93 lrd reduced xy220 number of cards to 1 - mv167 mismatch on short address space
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* .44 05-05-94 kornke Changed number of supported OMS cards.
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*/
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#ifndef INCLmodule_typesh
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#define INCLmodule_typesh
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/* Device module types */
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/*
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* all devices have corresponding entries in ~operator/db/src/menus.c
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* changes must be made in both areas to keep the database and drivers in sync
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*/
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/* & in comment indicates tested with card 0 */
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/* % in comment indicates tested with card other than card 0 */
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/* # in comment indicates that the Nth card has been tested */
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/* !! never been tested */
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/*
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* @# If any changes are made to this file, check the procedures
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* ab_card, and vme_card in signallist.c, and get_address in sigmenu.c.
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*/
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#ifdef MODULE_TYPES_INIT
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#define MODULE_TYPES_DEF(MT_DEF_PARM) MT_DEF_PARM
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#else
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#define MODULE_TYPES_DEF(MT_DEF_PARM) extern MT_DEF_PARM;
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#endif
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/* Number of columns used in io_report. */
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#define IOR_MAX_COLS 4
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/* I/O types */
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#define IO_AI 0
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#define IO_AO 1
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#define IO_BI 2
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#define IO_BO 3
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#define IO_SM 4
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#define IO_WF 5
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#define IO_TIMER 6
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#define MAX_IO_TYPE IO_TIMER
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/* bus types */
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/* must correspond to the values in link types */
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/* these defines are in ~gta/dbcon/h/link.h */
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/* equates for the Allen-Bradley cards. */
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#define AB_BASE_ADDR 0xc00000 /* base addr of first AB6008SV */
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#define AB_MAX_LINKS 2 /* number of serial links from VME */
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#define AB_MAX_ADAPTERS 8 /* number of physical adapters on a link */
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#define AB_MAX_CARDS 16 /* max number of IO cards per adapter */
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#define AB_CARD_ADAPTER 16 /* cards per logical adapter */
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#define AB_CHAN_CARD 16 /* max channels per card */
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/* analog inputs */
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#define AB1771IL 0 /* &% Allen-Bradley low level analog input */
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#define AB1771IFE 1 /* &% Allen-Bradley low level analog input */
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#define AB1771IXE 2 /* &% Allen-Bradley millivolt input */
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#define XY566SE 3 /* & Xycom 12-bit Single Ended Scanned*/
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#define XY566DI 4 /* &% Xycom 12-bit Differential Scanned */
|
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#define XY566DIL 5 /* &% Xycom 12-bit Differential Latched */
|
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#define VXI_AT5_AI 6 /* % AT-5 VXI module's Analog Inputs */
|
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#define AB1771IFE_SE 7 /* % A-B IFE in 16 single-ended input mode */
|
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#define AB1771IFE_4to20MA 8 /* % A-B IFE in 8 double-ended 4to20Ma */
|
||||
#define DVX2502 9 /* &% DVX_2502 128 chan 16 bit differential */
|
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#define AB1771IFE_0to5V 10 /* % A-B IFE in 8 double-ended 4to20Ma */
|
||||
#define KSCV215 11 /* % KSC V215 VXI 16 bit differential */
|
||||
#define AB1771IrPlatinum 12 /* % A-B RTD Platinum */
|
||||
#define AB1771IrCopper 13 /* % A-B RTD Copper */
|
||||
#define MAX_AI_TYPES AB1771IrCopper
|
||||
MODULE_TYPES_DEF(short ai_num_cards[MAX_AI_TYPES+1])
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={12,12,12, 4, 4, 6,32,12,12, 1, 12, 32, 12,12};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short ai_num_channels[MAX_AI_TYPES+1])
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={ 8, 8, 8,32,16,16, 8,16, 8, 127, 8, 32,6,6};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short ai_interruptable[MAX_AI_TYPES+1])
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 0, 0,0,0};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short ai_bus[MAX_AI_TYPES+1])
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={ 4, 4, 4, 2, 2, 2, 2, 4, 4, 2, 4, 2,4,4};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(unsigned short ai_addrs[MAX_AI_TYPES+1])
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={ 0,0,0,0x6000,0x7000,0xe000, 0xc014,0,0, 0xff00, 0, 0,0,0};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(long ai_memaddrs[MAX_AI_TYPES+1])
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={0,0,0,0x000000,0x040000,0x0c0000, 0,0,0, 0x100000, 0, 0,0,0};
|
||||
#endif
|
||||
|
||||
/* analog outputs */
|
||||
#define AB1771OFE 0 /* &% Allen-Bradley 12 bit Analog Output */
|
||||
#define VMI4100 1 /* & VMIC VMIVME 4100 */
|
||||
#define ZIO085 2 /* & Ziomek 085 */
|
||||
#define VXI_AT5_AO 3 /* !! AT-5 VXI modules analog outputs */
|
||||
#define MAX_AO_TYPES VXI_AT5_AO
|
||||
MODULE_TYPES_DEF(short ao_num_cards[MAX_AO_TYPES+1])
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= {12, 4, 1, 32};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short ao_num_channels[MAX_AO_TYPES+1])
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= { 4, 16, 32, 16};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short ao_interruptable[MAX_AO_TYPES+1] )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= { 0, 0, 0, 1};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short ao_bus[MAX_AO_TYPES+1])
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={ 4, 2, 2, 2};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(unsigned short ao_addrs[MAX_AO_TYPES+1])
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={ 0,0x4100,0x0800, 0xc000};
|
||||
#endif
|
||||
|
||||
/* binary inputs */
|
||||
#define ABBI_08_BIT 0 /* &% Allen-Bradley generic Binary In 8 bit */
|
||||
#define ABBI_16_BIT 1 /* &% Allen-Bradley generic Binary In 16 bit */
|
||||
#define BB910 2 /* & BURR BROWN MPV 910 (relay) */
|
||||
#define XY210 3 /* &% XYcom 32 bit binary in */
|
||||
#define VXI_AT5_BI 4 /* !! AT-5 VXI modules binary inputs */
|
||||
#define HPE1368A_BI 5 /* !! HP E1368A video switch */
|
||||
#define AT8_FP10S_BI 6 /* !! AT8 FP10 slave fast protect */
|
||||
#define XY240_BI 7 /* !! Xycom 32 bit binary in / 32 bit binary out */
|
||||
#define MAX_BI_TYPES XY240_BI
|
||||
MODULE_TYPES_DEF(short bi_num_cards[MAX_BI_TYPES+1] )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={ 12, 12, 4, 4, 32, 32, 8, 2};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short bi_num_channels[MAX_BI_TYPES+1] )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={ 8, 16, 32, 32, 32, 16, 32, 32};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short bi_interruptable[MAX_BI_TYPES+1] )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={ 1, 1, 0, 0, 1, 1, 1, 1};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short bi_bus[MAX_BI_TYPES+1])
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={ 4, 4, 2, 2, 2, 2, 2, 2};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(unsigned short bi_addrs[MAX_BI_TYPES+1])
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={ 0,0,0xb800,0xa000, 0xc000, 0xc000, 0x0e00, 0xd000};
|
||||
#endif
|
||||
|
||||
/* binary outputs */
|
||||
#define ABBO_08_BIT 0 /* &% Allen-Bradley 8 bit binary out */
|
||||
#define ABBO_16_BIT 1 /* &% Allen-Bradley 16 bit binary out */
|
||||
#define BB902 2 /* &% BURR BROWN MPV 902 (relay) */
|
||||
#define XY220 3 /* &% XYcom 32 bit binary out */
|
||||
#define VXI_AT5_BO 4 /* !! AT-5 VXI modules binary outputs */
|
||||
#define HPE1368A_BO 5 /* !! HP E1368A video switch */
|
||||
#define AT8_FP10M_BO 6 /* !! AT8 FP10 master fast protect */
|
||||
#define XY240_BO 7 /* !! Xycom 32 bit binary in / 32 bit binary out */
|
||||
#define MAX_BO_TYPES XY240_BO
|
||||
MODULE_TYPES_DEF(short bo_num_cards[MAX_BO_TYPES+1] )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={12, 12, 4, 1, 32, 32, 2, 2};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short bo_num_channels[MAX_BO_TYPES+1] )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={ 8, 16, 32, 32, 32, 16, 32, 32};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short bo_interruptable[MAX_BO_TYPES+1] )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={ 0, 0, 0, 0, 1, 0, 0, 1 };
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short bo_bus[MAX_BO_TYPES+1])
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={ 4, 4, 2, 2, 2, 2, 2, 2 };
|
||||
#endif
|
||||
MODULE_TYPES_DEF(unsigned short bo_addrs[MAX_BO_TYPES+1])
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={ 0,0,0xd800,0xc800, 0xc000, 0xc000, 0x0c00, 0xd000};
|
||||
#endif
|
||||
|
||||
/* stepper motor drivers */
|
||||
#define CM57_83E 0 /* & Compumotor 57-83E motor controller */
|
||||
#define OMS_6AXIS 1 /* & OMS six axis motor controller */
|
||||
#define MAX_SM_TYPES OMS_6AXIS
|
||||
MODULE_TYPES_DEF(short sm_num_cards[MAX_SM_TYPES+1] )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={ 8, 8 };
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short sm_num_channels[MAX_SM_TYPES+1] )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= { 1, 8};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short sm_interruptable[MAX_SM_TYPES+1] )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= { 0, 0 };
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short sm_bus[MAX_SM_TYPES+1])
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={ 2, 2 };
|
||||
#endif
|
||||
MODULE_TYPES_DEF(unsigned short sm_addrs[MAX_SM_TYPES+1])
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={ 0x8000, 0xfc00 };
|
||||
#endif
|
||||
|
||||
/* waveforms */
|
||||
#define XY566WF 0 /* & Xycom 566 as a waveform */
|
||||
#define CAMAC_THING 1 /* !! CAMAC waveform digitizer */
|
||||
#define JGVTR1 2 /* & Joerger transient recorder */
|
||||
#define COMET 3 /* !! COMET transient recorder */
|
||||
#define MAX_WF_TYPES COMET
|
||||
MODULE_TYPES_DEF(short wf_num_cards[MAX_WF_TYPES+1] )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={4, 4, 8, 4};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short wf_num_channels[MAX_WF_TYPES+1] )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={1, 1, 1, 4};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short wf_interruptable[MAX_WF_TYPES+1] )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= {0, 0, 0, 0};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short wf_bus[MAX_WF_TYPES+1])
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={2, 3, 2, 2};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(unsigned short wf_addrs[MAX_WF_TYPES+1])
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={0x9000, 0, 0xB000, 0xbc00};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(unsigned short wf_armaddrs[MAX_WF_TYPES+1])
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= {0x5400, 0, 0, 0};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(long wf_memaddrs[MAX_WF_TYPES+1])
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={0x080000, 0, 0xb80000, 0xe0000000};
|
||||
#endif
|
||||
|
||||
|
||||
/* timing cards */
|
||||
#define MZ8310 0 /* &% Mizar Timing Module */
|
||||
#define DG535 1 /* !! GPIB timing instrument */
|
||||
#define VXI_AT5_TIME 2 /* !! AT-5 VXI modules timing channels */
|
||||
#define MAX_TM_TYPES VXI_AT5_TIME
|
||||
MODULE_TYPES_DEF(short tm_num_cards[MAX_TM_TYPES+1] )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={ 4, 1, 32 };
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short tm_num_channels[MAX_TM_TYPES+1] )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={10, 1, 10};
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short tm_interruptable[MAX_TM_TYPES+1] )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= { 1, 0, 1 };
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short tm_bus[MAX_TM_TYPES+1])
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={ 2, 5, 2 };
|
||||
#endif
|
||||
MODULE_TYPES_DEF(unsigned short tm_addrs[MAX_TM_TYPES+1])
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
={0xf800, 0, 0xc000 };
|
||||
#endif
|
||||
|
||||
/* AT830X clock cards */
|
||||
MODULE_TYPES_DEF(long AT830X_1_addrs )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= 0x0400;
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short AT830X_1_num_cards )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= 2;
|
||||
#endif
|
||||
MODULE_TYPES_DEF(long AT830X_addrs )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= 0xaa0000;
|
||||
#endif
|
||||
MODULE_TYPES_DEF(short AT830X_num_cards )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= 2;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* system controller cards.
|
||||
* (driver looks for only one card)
|
||||
*/
|
||||
MODULE_TYPES_DEF(long xy010ScA16Base)
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= 0x0000;
|
||||
#endif
|
||||
/*
|
||||
* limit the size of the VXI logical address space
|
||||
*
|
||||
* <VXI LA BASE> = <VME SHORT ADDR BASE> + 0xc000
|
||||
*
|
||||
* LA VME address
|
||||
* 0 <VXI LA BASE>
|
||||
* EPICS_VXI_LA_COUNT <VXI LA BASE> + (EPICS_VXI_LA_COUNT-1)*64
|
||||
*/
|
||||
MODULE_TYPES_DEF(unsigned char EPICS_VXI_LA_COUNT)
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= 32;
|
||||
#endif
|
||||
|
||||
/*
|
||||
*
|
||||
* address ranges for VXI A24 and A32 devices
|
||||
*
|
||||
*/
|
||||
MODULE_TYPES_DEF(char *EPICS_VXI_A24_BASE)
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= (char *) 0x900000;
|
||||
#endif
|
||||
MODULE_TYPES_DEF(unsigned long EPICS_VXI_A24_SIZE)
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= 0x100000;
|
||||
#endif
|
||||
MODULE_TYPES_DEF(char *EPICS_VXI_A32_BASE)
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= (char *) 0x90000000;
|
||||
#endif
|
||||
MODULE_TYPES_DEF(unsigned long EPICS_VXI_A32_SIZE)
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= 0x10000000;
|
||||
#endif
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Interrupt vector locations used by the MV167 CPU board.
|
||||
* These are defined in mv167.h
|
||||
*
|
||||
* PCC2_INT_VEC_BASE 0x40 PCC interrupt vector base number
|
||||
* any multiple of 0x10
|
||||
* UTIL_INT_VEC_BASE0 0x50 VMEchip2 utility interrupt
|
||||
* vector base number
|
||||
* any multiple of 0x10
|
||||
* UTIL_INT_VEC_BASE1 0x60 VMEchip2 utility interrupt
|
||||
* vector base number
|
||||
* any multiple of 0x10
|
||||
*
|
||||
* INT_VEC_CD2400_A 0x90 int vec for channel A
|
||||
* INT_VEC_CD2400_B 0x94 int vec for channel B
|
||||
* INT_VEC_CD2400_C 0x98 int vec for channel C
|
||||
* INT_VEC_CD2400_D 0x9c int vec for channel D
|
||||
*
|
||||
* LANC_IRQ_LEVEL 3 LNANC IRQ level
|
||||
* MPCC_IRQ_LEVEL 4 serial comm IRQ level
|
||||
* SYS_CLK_LEVEL 6 interrupt level for sysClk
|
||||
* AUX_CLK_LEVEL 5 interrupt level for auxClk
|
||||
* SCSI_IRQ_LEVEL 2 scsi interrupt level
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* interrupt vector allocation - one for each XY566 DIL card */
|
||||
MODULE_TYPES_DEF(int AI566_VNUM)
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
=0xf8; /* Xycom 566 Differential Latched */
|
||||
#endif
|
||||
|
||||
/* interrupt vector allocation - one for each DVX card */
|
||||
MODULE_TYPES_DEF(int DVX_IVEC0)
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
=0xd0;
|
||||
#endif
|
||||
|
||||
/* stepper motor interrupt vector - one for each motor */
|
||||
MODULE_TYPES_DEF(int MD_INT_BASE)
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
=0xf0; /* base of the motor int vector */
|
||||
#endif
|
||||
|
||||
/* I reserve from here up to num_cards * 4 interrupting chans/card - joh */
|
||||
MODULE_TYPES_DEF(int MZ8310_INT_VEC_BASE)
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
=0xe8;
|
||||
#endif
|
||||
|
||||
/* Allen-Bradley Serial Driver - MAX_AB_LINKS number of vectors */
|
||||
MODULE_TYPES_DEF(int AB_VEC_BASE)
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
=0x60;
|
||||
#endif
|
||||
|
||||
/* only one interrupt vector allocated for all Joerger VTR1 boards joh */
|
||||
MODULE_TYPES_DEF(int JGVTR1_INT_VEC)
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
=0xe0;
|
||||
#endif
|
||||
|
||||
/* AT830X_1 cards have 1 intr vector for each AT830X_1_num_cards (presently 2) */
|
||||
MODULE_TYPES_DEF(int AT830X_1_IVEC0)
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
=0xd4;
|
||||
#endif
|
||||
|
||||
/* AT830X cards have 1 intr vector for each AT830X_num_cards (presently 2) */
|
||||
MODULE_TYPES_DEF(int AT830X_IVEC0)
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
=0xd6;
|
||||
#endif
|
||||
|
||||
/* AT8 fast protect interrupt vector base */
|
||||
MODULE_TYPES_DEF(int AT8FP_IVEC_BASE)
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
=0xa2;
|
||||
#endif
|
||||
|
||||
|
||||
MODULE_TYPES_DEF(int AT8FPM_IVEC_BASE )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
=0xaa;
|
||||
#endif
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Addresses and IRQ information used by the XVME402 bitbus cards.
|
||||
*
|
||||
******************************************************************************/
|
||||
MODULE_TYPES_DEF(unsigned short BB_SHORT_OFF )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= 0x1800; /* the first address of link 0's region */
|
||||
#endif
|
||||
#define BB_NUM_LINKS 4 /* max number of BB ports allowed */
|
||||
MODULE_TYPES_DEF(int BB_IVEC_BASE )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= 0xa0; /* vectored interrupts (2 used for each link) */
|
||||
#endif
|
||||
MODULE_TYPES_DEF(int BB_IRQ_LEVEL )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= 5; /* IRQ level */
|
||||
#endif
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Information for the PEP modular Bitbus boards.
|
||||
*
|
||||
******************************************************************************/
|
||||
MODULE_TYPES_DEF(unsigned short PEP_BB_SHORT_OFF )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= 0x1c00;
|
||||
#endif
|
||||
MODULE_TYPES_DEF(int PEP_BB_IVEC_BASE )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= 0xe8;
|
||||
#endif
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Addresses and IRQ information used by the NI1014 and NI1014D bitbus cards.
|
||||
*
|
||||
******************************************************************************/
|
||||
MODULE_TYPES_DEF(unsigned short NIGPIB_SHORT_OFF)
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= 0x5000;/* First address of link 0's region */
|
||||
#endif
|
||||
/* Each link uses 0x0200 bytes */
|
||||
#define NIGPIB_NUM_LINKS 4 /* Max number of NI GPIB ports allowed */
|
||||
MODULE_TYPES_DEF(int NIGPIB_IVEC_BASE )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
= 100; /* Vectored interrupts (2 used for each link) */
|
||||
#endif
|
||||
MODULE_TYPES_DEF(int NIGPIB_IRQ_LEVEL )
|
||||
#ifdef MODULE_TYPES_INIT
|
||||
=5; /* IRQ level */
|
||||
#endif
|
||||
|
||||
#if 0 /* JRW */
|
||||
#define NI1014_LINK_NUM_BASE 0
|
||||
#endif
|
||||
|
||||
/*
|
||||
* nothing after this endif
|
||||
*/
|
||||
#endif /*INCLmodule_typesh*/
|
||||
Reference in New Issue
Block a user