diff --git a/src/include/Makefile b/src/include/Makefile new file mode 100644 index 000000000..965d8fbe4 --- /dev/null +++ b/src/include/Makefile @@ -0,0 +1,18 @@ +# +# $Id$ +# +# Lowest Level Directroy Makefile +# by Janet Anderson +# +# $Log$ +# Revision 1.1 1994/09/07 19:26:32 jba +# New file +# +# + +EPICS=../../.. + +include $(EPICS)/config/CONFIG_BASE + +include $(EPICS)/config/RULES_ARCHS + diff --git a/src/include/Makefile.Unix b/src/include/Makefile.Unix new file mode 100755 index 000000000..a6b52d7f0 --- /dev/null +++ b/src/include/Makefile.Unix @@ -0,0 +1,17 @@ +EPICS = ../../../.. +include Target.include +include $(EPICS)/config/CONFIG_BASE + +INC += dbDefs.h +INC += camacLib.h +INC += casdef.h +INC += epicsTypes.h +INC += epicsVersion.h +INC += gsd_sync_defs.h +INC += module_types.h +INC += sbufLib.h +INC += shareLib.h +INC += createSoftLinks.sh +INC += bsdProto.h + +include $(EPICS)/config/RULES.Unix diff --git a/src/include/bsdProto.h b/src/include/bsdProto.h new file mode 100644 index 000000000..3ff5e3160 --- /dev/null +++ b/src/include/bsdProto.h @@ -0,0 +1,73 @@ +/* + * $Id + * + * Author Jeff Hill + * + * BSD prototypes missing from SUNOS4, MULTINET and + * perhaps other environments + * + */ + +#ifndef bsdProtInc +#define bsdProtInc + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined (SUNOS4) || defined(MULTINET) + +#include + + +int ioctl (int fd, int req, ...); +int socket_ioctl (int fd, int req, ...); +int socket_close (int fd); +int gettimeofday (struct timeval *tp, struct timezone *tzp); +int gethostname (char *name, int namelen); +int ftruncate (int fd, long length); + +#ifndef NOBSDNETPROTO + +#ifndef __cplusplus +void bzero (char *b, int length); +int select (int width, fd_set *readfds, fd_set *writefds, + fd_set *exceptfds, struct timeval *timeout); +int setsockopt (int socket, int level, int optname, + char *optval, int optlen); +int send (int socket, char *buf, int len, int flags); +int sendto (int socket, char *buf, int len, + int flags, struct sockaddr *to, int tolen); +int connect (int socket, struct sockaddr *name, int namelen); +unsigned long inet_addr (char *); +#endif + +int socket (int domain, int type, int protocol); +int bind (int socket, struct sockaddr *name, int namelen); +int listen (int socket, int backlog); +int accept (int socket, struct sockaddr *addr, int *addrlen); +int shutdown (int socket, int how); +int recv (int socket, char *buf, int len, int flags); +int recvfrom (int socket, char *buf, int len, + int flags, struct sockaddr *from, int *fromlen); +int getpeername (int socket, struct sockaddr *name, int *namelen); +int getsockname (int socket, struct sockaddr *name, int *namelen); +char * inet_ntoa (struct in_addr in); + +#if !defined (htonl) || defined(MULTINET) +epicsInt32 htonl (epicsInt32); +epicsInt16 htons (epicsInt16); +epicsInt32 ntohl (epicsInt32); +epicsInt16 ntohs (epicsInt16); +#endif + +#endif /*BSDNETPROTO*/ + +#endif /* defined(SUNOS4) */ + +#ifdef __cplusplus +} +#endif + +#endif /* bsdProtInc */ + diff --git a/src/include/camacLib.h b/src/include/camacLib.h new file mode 100644 index 000000000..0a523c3f0 --- /dev/null +++ b/src/include/camacLib.h @@ -0,0 +1,74 @@ +/* camacLib.h -- Prototypes for camacLib.o + * + * Marty Wise + * 10/11/93 + * + * $Log$ + * Revision 1.1 1994/10/20 20:16:16 tang + * Commit adding of Camac Driver h file. + * + * Revision 1.4 94/05/11 13:52:57 13:52:57 wise (Marty Wise) + * Added low-level diagnostics + * + * Revision 1.3 94/03/27 10:52:29 10:52:29 wise (Marty Wise) + * *** empty log message *** + * + * Revision 1.1 93/11/05 06:39:35 06:39:35 wise (Marty Wise) + * Initial revision + * + * Revision 0.3 93/10/19 09:03:45 09:03:45 wise (Marty Wise) + * Added cssa and csmad + * + * Revision 0.2 93/10/12 07:33:01 07:33:01 wise (Marty Wise) + * cfubc working, cfmad working, almost ready for alpha release. + * + * Revision 0.1 93/10/11 10:31:48 10:31:48 wise (Marty Wise) + * Initial revision + * + * + * + */ + +static char ht2992_h_RCSID[] = "$Header$"; + +/********************************/ +/* GLOBAL DATA */ +/********************************/ +extern int debug_hook; + +extern struct glob_dat { + int total; + int read_error[5]; + int write_error[5]; + int cmd_error[5]; + int total_err; + int lam_count[12]; +} debug_dat; + + +/********************************/ +/* FUNCTION PROTOTYPES */ +/********************************/ + +void cdreg(int *ext, int b, int c, int n, int a); +void cfsa(int f, int ext, int *dat, int *q); +void cssa(int f, int ext, short *dat, int *q); +void ccci(int ext, int l); +void cccz(int ext); +void cccc(int ext); +void ccinit(int b); +void ctci(int ext, int *l); +void cgreg(int ext, int *b, int *c, int *n, int *a); +void cfmad(int f, int extb[2], int *intc, int cb[4]); +void cfubc(int f, int ext, int *intc, int cb[4]); +void cfubc(int f, int ext, int *intc, int cb[4]); +void csmad(int f, int extb[2], short *intc, int cb[4]); +void ctcd(int ext, int *l); +void cccd(int ext, int l); +void csga(int fa[], int exta[], unsigned short intc[], int qa[], int cb[4]); +void cfga(int fa[], int exta[], int intc[], int qa[], int cb[4]); +void cfubr(int f, int ext, int intc[], int cb[4]); +void csubc(int f, int ext, unsigned short *intc, int cb[4]); +void csubr(int f, int ext, int intc[], int cb[4]); +void print_reg(int ext); + diff --git a/src/include/casdef.h b/src/include/casdef.h new file mode 100644 index 000000000..204d09ce4 --- /dev/null +++ b/src/include/casdef.h @@ -0,0 +1,426 @@ +/* + * $Id$ + * + * Author: Jeffrey O. Hill + * johill@lanl.gov + * (505) 665 1831 + * Date: 1-95 + * + * Experimental Physics and Industrial Control System (EPICS) + * + * Copyright 1991, the Regents of the University of California, + * and the University of Chicago Board of Governors. + * + * This software was produced under U.S. Government contracts: + * (W-7405-ENG-36) at the Los Alamos National Laboratory, + * and (W-31-109-ENG-38) at Argonne National Laboratory. + * + * Initial development by: + * The Controls and Automation Group (AT-8) + * Ground Test Accelerator + * Accelerator Technology Division + * Los Alamos National Laboratory + * + * Co-developed with + * The Controls and Computing Group + * Accelerator Systems Division + * Advanced Photon Source + * Argonne National Laboratory + * + * Modification Log: + * ----------------- + * $Log$ + * Revision 1.3 1995/10/12 01:27:49 jhill + * doc + * + * Revision 1.2 1995/09/29 21:35:33 jhill + * API clean up + * + * Revision 1.1 1995/08/12 00:13:33 jhill + * installed into cvs + * + * TODO: + * .01 Do we need lock/unlock routines so that the application + * can write several fields at once? If so then we will need + * auto lock TMO. + * .02 Is a bit mask the proper way to express the intrest type? + * .03 Use special configuration notify events (ala X) to update + * the application when the units, limits, etc change? + * .04 certain things like native type cant be changed during + * pv id's life time or we will be required to have locking + * .05 remove "native" from routine names below since this is + * redundant? + * .06 They should be able to pass in a pointer to their structure + * when creating the server and then this should be passed + * back when their entry points are called. + */ + +#include /* EPICS arch independent types */ +#include /* EPICS time stamp */ +#include /* EPICS alarm severity and alarm condition */ +#include /* EPICS error codes */ + +typedef int caStatus; + +typedef unsigned caId; + +typedef union { + void *ptr; + unsigned uint; +}appId; + +typedef struct{ + unsigned long sec; /* seconds */ + unsigned long nsec; /* nano - seconds */ +}caTime; + +typedef struct cas_value_log { + epicsAny value; + epicsAlarmSeverity severity; + epicsAlarmCondition condition; + TS_STAMP time; +}casValueLog; + +/* + * ndim == 0 => scaler + * otherwise pIndexArray points to an array of ndim items + */ +#define nDimScaler 0U +typedef struct cas_io_context { + epicsArrayIndex *pIndexArray; /* pointer to index array */ + unsigned nDim; /* number of dimensions */ +}casCtx; + +/* + * =========================================================== + * provided by the application (and called by the server via + * a jump table) + * + * All of these operations need to return without delay + * if we are to avoid hanging a single threaded server. + * =========================================================== + */ + +/* + * Canonical name is copied by the application into the buf pointed to by + * officialPVNameBuf. Copy no more than officialPVNameBufSize + * characters and null terminate. + * + * This allows for PV name aliases. + * + * If an operation will not complete immediately then the application is + * required to return S_casApp_asyncCompletion and then call + * caServerPVExistTestDone () when the operation actually completes. + */ +typedef caStatus pvExistTest (const char *pPVName, char *officialPVNameBuf, + unsigned officialPVNameBufSize, caId ioId); + +/* + * The application supplied entry point pvAddrCreate() will + * be called by the server library each time that + * CA attaches a channel to a process varible for + * the first time. + * + * The application typically will allocate an application specific + * address structure with caMalloc() and return a pointer to it + * in "*pPVId". + */ +typedef caStatus pvAddrCreate (const char *pvNameString, caId pvId, + appId *pPVId); + +/* + * The application supplied entry point pvAddrDelete() will + * be called by the server library each time that + * the number of CA attachments to a particular PV + * decrements to zero. This routine provide an opportunity + * for the application to delete any resources allocated + * during pvAddrCreate(). Typically caFree() will be called + * to free memmory allocated inside of pvAddrCreate() above. + */ +typedef caStatus pvAddrDelete (appId pvId); + + + +/* + * The application supplied entry point pvInterestRegister () + * will be called each time that the server wishes to + * subscripe for PV value change events via caServerPostEvents() + */ +typedef caStatus pvInterestRegister (appId pvId, unsigned select); + +/* + * The application supplied entry point pvInterestDelete () + * will be called each time that the server wishes to + * remove its subscription for PV value change events + * via caServerPostEvents() + */ +typedef caStatus pvInterestDelete (appId pvId); + +/* + * If an operation will not complete immediately + * then the application is required to return + * S_casApp_asyncCompletion and then call + * caServerPostPVIOCompletion () + * when the operation actually completes. + */ +typedef caStatus pvWrite (appId pvId, const casCtx *pCtx, + const epicsAny *pValue, caId ioId); + +/* + * If an operation will not complete immediately then the application + * is required to return S_casApp_asyncCompletion and then call + * caServerPostPVIOCompletion () when the operation actually completes. + * + * If it is an array operation then the array entry in epicsAny + * in casValueLog is initialized by the application to point + * to a segement structure (see epicsTypes.h). The segment + * structure is initialized to point to one or more buffers + * containing the array. The free call back function pointer + * in the segment structure is initialized by the application + * to point to a funtion to be called when the ca server library + * has finished copying the data at some time in the (potentially + * distant) future. + */ +typedef caStatus pvRead (appId pvId, const casCtx *pCtx, + casValueLog *pLog, caId ioId); + +/* + * the following are not allowed to change during an PV id's lifetime + * (post a PV delete event if these items need to be changed) + */ +typedef epicsType pvNativeType (appId pvId); + +/* + * return zero if it is is a scaler + */ +typedef unsigned pvMaxNativeDimension (appId pvId); +/* + * This is called only if pvMaxNativeDimension() above indicates + * that the PV isnt a scaler quantity. + */ +typedef epicsIndex pvMaxNativeElementCount (appId pvId, unsigned dim); +typedef unsigned pvMaxSimultAsyncOps (appId pvId); +typedef epicsType pvBestExternalType (appId pvId); +typedef void pvUnits (appId pvId, unsigned bufByteSize, char *pStringBuf); +typedef unsigned pvEnumStateCount (appId pvId); +typedef void pvEnumStateString (appId pvId, unsigned stateNumber, + unsigned bufByteSize, char *pStringBuf); +typedef unsigned pvPrecision (appId pvId); +typedef void pvGraphLimits (appId pvId, double *pUpperLimit, double *pLowerLimit); +typedef void pvControlLimits (appId pvId, double *pUpperLimit, double *pLowerLimit); +typedef void pvAlarmLimits (appId pvId, double *pUpperAlarmLimit, + double *pUpperWarningLimit, double *pLowerWarningLimit, + double *pLowerAlarmLimit); + + + +/* + * Optional per channel interface + * + * Per channel state required if the application + * implements access control + */ +typedef caStatus chAddrCreate (appId pvId, caId chId, appId *pChanId); +typedef caStatus chAddrDelete (appId ChId); +typedef caStatus chSetOwner (appId ChId, const char *pUser, const char *pHost); +#define channelInterest_AccessRights (1<<0) +typedef caStatus chInterestRegister (appId ChId, unsigned select); +typedef caStatus chInterestDelete (appId ChId); +typedef epicsBoolean chReadAccess (appId ChId); +typedef epicsBoolean chWriteAccess (appId ChId); + +/* + * If an entry point isnt supplied by the application + * (set to NULL) then the server lib will fill in + * a default action + */ +typedef struct cas_application_entry_table{ + pvExistTest *pPVExistTest; + pvAddrCreate *pPVAddrCreate; + pvAddrDelete *pPVAddrDelete; + + pvInterestRegister *pPVInterestRegister; + pvInterestDelete *pPVInterestDelete; + + pvWrite *pPVWrite; + pvRead *pPVRead; + + pvNativeType *pPVNativeType; + pvBestExternalType *pPVBestExternalType; + pvMaxNativeDimension *pPVMaxNativeDimension; + pvMaxNativeElementCount *pPVMaxNativeElementCount; + pvMaxSimultAsyncOps *pPVMaxSimultAsyncOps; + pvUnits *pPVUnits; + pvPrecision *pPVPrecision; + pvEnumStateCount *pPVEnumStateCount; + pvEnumStateString *pPVEnumStateString; + pvGraphLimits *pPVGraphLimits; + pvControlLimits *pPVControlLimits; + pvAlarmLimits *pPVAlarmLimits; + + chAddrCreate *pChAddrCreate; + chAddrDelete *pChAddrDelete; + chSetOwner *pChSetOwner; + chInterestRegister *pChInterestRegister; + chInterestDelete *pChInterestDelete; + chReadAccess *pChReadAccess; + chWriteAccess *pChWriteAccess; +}casAppEntryTable; + +/* + * =========================================================== + * called by the application + * =========================================================== + */ + +/* + * Context used when creating a server. + * Set appropriate flag in the "flags" + * field for each parameter that does + * not default. + */ + +/* + * the estimated number of proces variables + */ +#define casCreateCtx_pvCountEstimate (1<<1) /*default = ??? */ + +/* + * the maximum number of characters in a pv name + */ +#define casCreateCtx_pvMaxNameLength (2<<1) /* required */ + +/* + * max number of IO ops pending simultaneously + * (for operations that are not directed at a particular PV) + */ +#define casCreateCtx_maxSimulIO (3<<1) /* default = 1 */ + +typedef struct { + unsigned flags; + unsigned pvCountEstimate; + unsigned pvMaxNameLength; + unsigned maxSimulIO; +}casCreateCtx; + +void *caMalloc (size_t size); +void *caCalloc (size_t count, size_t size); +void caFree (const void *pBlock); + +/* + * NOTE: Always force casAppEntryTable to zero prior to initializatiion + * so that if new entries are added to the bottom of the structure + * existing code will specify nill entries for any new entry points + * and therefore take the default. + */ +typedef const void *caServerId; +caStatus caServerCreate (const casAppEntryTable *pTable, + const casCreateCtx *pCtx, caServerId *pId); +caStatus caServerDelete (caServerId id); +caStatus caServerProcess (caServerId id, const caTime *pDelay); +typedef unsigned caServerTimerId; +caStatus caServerAddTimeout (caServerId id, const caTime *pDelay, + void (*pFunc)(void *pParam), void *pParam, + caServerTimerId *pAlarmId); +caStatus caServerDeleteTimeout (caServerId id, caServerTimerId alarmId); + +caStatus caServerSetDebugLevel (caServerId id, unsigned level); +caStatus caServerShow (caServerId id, unsigned level); + +/* + * Most application will call this function when a PV's value is modified. + * (pvId is in the ctx structure when the pv is created) + */ +caStatus caServerPostMonitorEvent (caServerId casid, caId pvId, + const casValueLog *pLog, unsigned select); + +/* + * Some application will call this function to request that + * a PV address is to be deleted. + * (pvId is in the ctx structure when the pv is created) + */ +caStatus caServerPostDeleteEvent (caServerId casid, caId pvId); + +/* + * Some application will call this function to asynchronously complete + * a PV exist test operation. + * (ioId is in the ctx structure when the opertion is initiated by + * the server) + */ +caStatus caServerPVExistTestDone (caServerId casid, caId ioId, + const char *pOfficialName, caStatus status); + +/* + * Some application will call this function to asynchronously complete + * a PV address create operation. + * (ioId is in the ctx structure when the opertion is initiated by + * the server) + */ +caStatus caServerPVAddrCreateDone (caServerId casid, caId ioId, + const void *pPVAddr, caStatus status); + +/* + * Some application will call this function to asynchronously complete + * a PV address delete operation. + * (ioId is in the ctx structure when the opertion is initiated by + * the server) + */ +caStatus caServerPVAddrDeleteDone (caServerId casid, caId ioId, caStatus status); + +/* + * Some application will call this function to asynchronously complete + * a PV write operation. + * (ioId is in the ctx structure when the opertion is initiated by + * the server) + */ +caStatus caServerPVWriteDone (caServerId casid, caId ioId, caStatus status); + +/* + * Some application will call this function to asynchronously complete + * a PV read operation. + * (ioId is in the ctx structure when the opertion is initiated by + * the server) + */ +caStatus caServerPVReadDone (caServerId casid, caId ioId, const casValueLog *pLog, + caStatus status); + +/* + * =========================================================== + * for internal use by the server library + * (and potentially returned to the server application) + * =========================================================== + */ +#define S_cas_success 0 +#define S_cas_internal (M_cas| 1) /*Internal failure*/ +#define S_cas_noMemory (M_cas| 2) /*Memory allocation failed*/ +#define S_cas_portInUse (M_cas| 3) /*IP port already in use*/ +#define S_cas_hugeRequest (M_cas | 4) /*Requested op does not fit*/ +#define S_cas_sendBlocked (M_cas | 5) /*Blocked for send q space*/ +#define S_cas_badElementCount (M_cas | 6) /*Bad element count*/ +#define S_cas_noConvert (M_cas | 7) /*No conversion between src & dest types*/ +#define S_cas_badWriteType (M_cas | 8) /*Src type inappropriate for write*/ +#define S_cas_ioBlocked (M_cas | 9) /*Blocked for io completion*/ +#define S_cas_partialMessage (M_cas | 10) /*Partial message*/ +#define S_cas_noContext (M_cas | 11) /*Context parameter is required*/ +#define S_cas_disconnect (M_cas | 12) /*Lost connection to server*/ +#define S_cas_recvBlocked (M_cas | 13) /*Recv blocked*/ +#define S_cas_badType (M_cas | 14) /*Bad data type*/ +#define S_cas_timerDoesNotExist (M_cas | 15) /*Timer does not exist*/ +#define S_cas_badEventType (M_cas | 16) /*Bad event type*/ +#define S_cas_badResourceId (M_cas | 17) /*Bad resource identifier*/ +#define S_cas_chanCreateFailed (M_cas | 18) /*Unable to create channel*/ + + +/* + * =========================================================== + * returned by the application (to the server library) + * =========================================================== + */ +#define S_casApp_success 0 +#define S_casApp_noMemory (M_casApp | 1) /*Memory allocation failed*/ +#define S_casApp_pvNotFound (M_casApp | 2) /*PV not found*/ +#define S_casApp_badPVId (M_casApp | 3) /*Unknown PV identifier*/ +#define S_casApp_noSupport (M_casApp | 4) /*No application support for op*/ +#define S_casApp_asyncCompletion (M_casApp | 5) /*Operation will complete asynchronously*/ +#define S_casApp_badDimension (M_casApp | 6) /*bad matrix size in request*/ + diff --git a/src/include/createSoftLinks.sh b/src/include/createSoftLinks.sh new file mode 100644 index 000000000..4693bacd6 --- /dev/null +++ b/src/include/createSoftLinks.sh @@ -0,0 +1,12 @@ +#! /bin/sh +# createSoftLinks.sh +# $Id$ + +# Tailored script to create local softlinks releative to this directory +# the name createSoftLinks.sh is a key and must not be changed. If the +# release tool sccsGet finds a file by the name of (createSoftLinks.sh), +# after it has retrieved any out-of-date SCCS files, it invokes the +# script to create the defined softlinks + +/bin/rm -f epicsVersion.h +ln -s ../version/epicsVersion.h epicsVersion.h diff --git a/src/include/dbDefs.h b/src/include/dbDefs.h new file mode 100644 index 000000000..f5af3ca71 --- /dev/null +++ b/src/include/dbDefs.h @@ -0,0 +1,112 @@ +/* $Id$ + * + * Author: Marty Kraimer + * Date: 6-1-90 + * + * Experimental Physics and Industrial Control System (EPICS) + * + * Copyright 1991, the Regents of the University of California, + * and the University of Chicago Board of Governors. + * + * This software was produced under U.S. Government contracts: + * (W-7405-ENG-36) at the Los Alamos National Laboratory, + * and (W-31-109-ENG-38) at Argonne National Laboratory. + * + * Initial development by: + * The Controls and Automation Group (AT-8) + * Ground Test Accelerator + * Accelerator Technology Division + * Los Alamos National Laboratory + * + * Co-developed with + * The Controls and Computing Group + * Accelerator Systems Division + * Advanced Photon Source + * Argonne National Laboratory + * + * Modification Log: + * ----------------- + * .01 mm-dd-yy iii Comment + * .02 12-03-91 rcz defines from vxWorks.h for Unix + * .03 12-03-91 rcz added define PVNAME_STRINGSZ + * .04 05-22-92 mrk cleanup + * .05 07-22-93 mrk Cleanup defs for NO and YES + * .06 08-11-93 joh included errMdef.h + */ + +#ifndef INCdbDefsh +#define INCdbDefsh 1 + +#if defined(NULL) +#undef NULL +#endif +#define NULL 0 + +#if defined(NO) +#undef NO +#endif +#define NO 0 + +#if defined(YES) +#undef YES +#endif +#define YES 1 + +#if defined(TRUE) +#undef TRUE +#endif +#define TRUE 1 + +#if defined(FALSE) +#undef FALSE +#endif +#define FALSE 0 + +#ifndef OK +#define OK 0 +#endif +#ifndef ERROR +#define ERROR (-1) +#endif +#ifndef NONE +#define NONE (-1) /* for times when NULL won't do */ +#endif + +#ifndef NELEMENTS +#define NELEMENTS(array) /* number of elements in an array */ \ + (sizeof (array) / sizeof ((array) [0])) +#endif + +#ifndef max +#define max(x, y) (((x) < (y)) ? (y) : (x)) +#endif +#ifndef min +#define min(x, y) (((x) < (y)) ? (x) : (y)) +#endif + +#ifndef OFFSET +#define OFFSET(structure, member) /* byte offset of member in structure*/\ + ((int) &(((structure *) 0) -> member)) +#endif + +/* FLDNAME_SZ must be 4 */ +#define PVNAME_STRINGSZ 29 /* includes NULL terminator for PVNAME_SZ */ +#define PVNAME_SZ (PVNAME_STRINGSZ - 1) /*Process Variable Name Size */ +#define FLDNAME_SZ 4 /*Field Name Size */ + +#define DB_MAX_CHOICES 30 + +#define SUPERVISORY 0 +#define CLOSED_LOOP 1 + +#define NTO1FIRST 0 +#define NTO1LOW 1 +#define NTO1HIGH 2 +#define NTO1AVE 3 + +#define vxTicksPerSecond (sysClkRateGet()) /*clock ticks per second*/ + +#include +#include + +#endif /* INCdbDefsh */ diff --git a/src/include/epicsTypes.h b/src/include/epicsTypes.h new file mode 100644 index 000000000..0570f92f5 --- /dev/null +++ b/src/include/epicsTypes.h @@ -0,0 +1,284 @@ +/* $Id */ + +/* + * Author: Jeff Hill + * Date: 5-95 + * + * Experimental Physics and Industrial Control System (EPICS) + * + * Copyright 1991, the Regents of the University of California, + * and the University of Chicago Board of Governors. + * + * This software was produced under U.S. Government contracts: + * (W-7405-ENG-36) at the Los Alamos National Laboratory, + * and (W-31-109-ENG-38) at Argonne National Laboratory. + * + * Initial development by: + * The Controls and Automation Group (AT-8) + * Ground Test Accelerator + * Accelerator Technology Division + * Los Alamos National Laboratory + * + * Co-developed with + * The Controls and Computing Group + * Accelerator Systems Division + * Advanced Photon Source + * Argonne National Laboratory + * + * Modification Log: + * ----------------- + * $Log$ + * Revision 1.7 1995/12/19 19:46:44 jhill + * added epicsStatus typedef + * + * Revision 1.6 1995/09/29 21:41:41 jhill + * added use of sbufs + * + */ + +#ifndef INCepicsTypesh +#define INCepicsTypesh 1 + +#ifdef __STDC__ +# define READONLY const +#else +# define READONLY +#endif + +#include + +#include +#include + +#ifndef stringOf +# ifdef __STDC__ +# define stringOf(TOKEN) #TOKEN +# else +# define stringOf(TOKEN) "TOKEN" +# endif +#endif + +typedef enum { + epicsFalse=0, + epicsTrue=1 } epicsBoolean; + +/* + * Architecture Independent Data Types + * (so far this is sufficient for all archs we have ported to) + */ +typedef char epicsInt8; +typedef unsigned char epicsUInt8; +typedef short epicsInt16; +typedef unsigned short epicsUInt16; +typedef epicsUInt16 epicsEnum16; +typedef int epicsInt32; +typedef unsigned epicsUInt32; +typedef float epicsFloat32; +typedef double epicsFloat64; +typedef unsigned long epicsIndex; +typedef epicsInt32 epicsStatus; + +typedef struct { + unsigned length; + char *pString; +}epicsString; + +typedef struct { + epicsIndex first; + epicsIndex count; +}epicsArrayIndex; + +/* + * Arrays are stored in a stored in a shared buffer + * in order to avoid redundant copying. See "sbufLib.h". + * + * The first segment in a shared buffer containing an + * EPICS array will always contain only the + * "epicsArrayDescriptor" described below. Subsequent + * segments will contain the array data (in C language + * dimension order). + * + * Segments in the shared buffer must end on natural + * boundaries for the element type stored in the array. + * + * nDim - the number of dimensions. nDim==0 => scaler + * pDim - pointer to an array of lengths for each dimension + * + */ +typedef SBUFID epicsArray; +typedef struct { + unsigned nDim; /* the number of dimensions */ + epicsIndex *pDim; /* array of dimension lengths */ +}epicsArrayDescriptor; + +/* + * !! Dont use this - it may vanish in the future !! + * + * Provided only for backwards compatibility with + * db_access.h + * + */ +#define MAX_STRING_SIZE 40 +typedef char epicsOldString[MAX_STRING_SIZE]; + +/* + * union of all types + * + * Strings included here as pointers only so that we support + * large string types. + * + * Arrays included here as pointers because large arrays will + * not fit in this union. + */ +typedef union epics_any{ + epicsInt8 int8; + epicsUInt8 uInt8; + epicsInt16 int16; + epicsUInt16 uInt16; + epicsEnum16 enum16; + epicsInt32 int32; + epicsUInt32 uInt32; + epicsFloat32 float32; + epicsFloat64 float64; + epicsString string; + epicsArray array; +}epicsAny; + +/* + * Corresponding Type Codes + * (this enum must start at zero) + * + * !! Update epicsTypeToDBR_XXXX[] and DBR_XXXXToEpicsType + * in db_access.h if you edit this enum !! + */ +typedef enum { + epicsInt8T, + epicsUInt8T, + epicsInt16T, + epicsUInt16T, + epicsEnum16T, + epicsInt32T, + epicsUInt32T, + epicsFloat32T, + epicsFloat64T, + epicsStringT, + epicsOldStringT +}epicsType; +#define firstEpicsType epicsInt8T +#define lastEpicsType epicsOldStringT +#define validEpicsType(x) ((x>=firstEpicsType) && (x<=lastEpicsType)) +#define invalidEpicsType(x) ((xlastEpicsType)) + + +/* + * The enumeration "epicsType" is an index to this array + * of type name strings. + */ +#ifdef epicsTypesGLOBAL +READONLY char *epicsTypeNames [lastEpicsType+1] = { + stringOf (epicsInt8), + stringOf (epicsUInt8), + stringOf (epicsInt16), + stringOf (epicsUInt16), + stringOf (epicsEnum16), + stringOf (epicsInt32), + stringOf (epicsUInt32), + stringOf (epicsFloat32), + stringOf (epicsFloat64), + stringOf (epicsString), + stringOf (epicsOldString), +}; +#else /* epicsTypesGLOBAL */ +epicsShareExtern READONLY char *epicsTypeNames [lastEpicsType+1]; +#endif /* epicsTypesGLOBAL */ + +/* + * The enumeration "epicsType" is an index to this array + * of type code name strings. + */ +#ifdef epicsTypesGLOBAL +READONLY char *epicsTypeCodeNames [lastEpicsType+1] = { + stringOf (epicsInt8T), + stringOf (epicsUInt8T), + stringOf (epicsInt16T), + stringOf (epicsUInt16T), + stringOf (epicsEnum16T), + stringOf (epicsInt32T), + stringOf (epicsUInt32T), + stringOf (epicsFloat32T), + stringOf (epicsFloat64T), + stringOf (epicsStringT), + stringOf (epicsOldStringT), +}; +#else /* epicsTypesGLOBAL */ +epicsShareExtern READONLY char *epicsTypeCodeNames [lastEpicsType+1]; +#endif /* epicsTypesGLOBAL */ + +#ifdef epicsTypesGLOBAL +READONLY unsigned epicsTypeSizes [lastEpicsType+1] = { + sizeof (epicsInt8), + sizeof (epicsUInt8), + sizeof (epicsInt16), + sizeof (epicsUInt16), + sizeof (epicsEnum16), + sizeof (epicsInt32), + sizeof (epicsUInt32), + sizeof (epicsFloat32), + sizeof (epicsFloat64), + sizeof (epicsString), + sizeof (epicsOldString), +}; +#else /* epicsTypesGLOBAL */ +epicsShareExtern READONLY unsigned epicsTypeSizes [lastEpicsType+1]; +#endif /* epicsTypesGLOBAL */ + +/* + * The enumeration "epicsType" is an index to this array + * of type class identifiers. + */ +typedef enum { + epicsIntC, + epicsUIntC, + epicsEnumC, + epicsFloatC, + epicsStringC, + epicsOldStringC} epicsTypeClass; +#ifdef epicsTypesGLOBAL +READONLY epicsTypeClass epicsTypeClasses [lastEpicsType+1] = { + epicsIntC, + epicsUIntC, + epicsIntC, + epicsUIntC, + epicsEnumC, + epicsIntC, + epicsUIntC, + epicsFloatC, + epicsFloatC, + epicsStringC, + epicsOldStringC + }; +#else /* epicsTypesGLOBAL */ +epicsShareExtern READONLY epicsTypeClass epicsTypeClasses [lastEpicsType+1]; +#endif /* epicsTypesGLOBAL */ + + +#ifdef epicsTypesGLOBAL +READONLY char *epicsTypeAnyFieldName [lastEpicsType+1] = { + stringOf (int8), + stringOf (uInt8), + stringOf (int16), + stringOf (uInt16), + stringOf (enum16), + stringOf (int32), + stringOf (uInt32), + stringOf (float32), + stringOf (float64), + stringOf (string), + "", /* Old Style Strings will not be in epicsAny type */ + }; +#else /* epicsTypesGLOBAL */ +epicsShareExtern READONLY char *epicsTypeAnyFieldName [lastEpicsType+1]; +#endif /* epicsTypesGLOBAL */ + +#endif /* INCepicsTypesh */ + diff --git a/src/include/epicsVersion.h b/src/include/epicsVersion.h new file mode 100644 index 000000000..e1c48bbee --- /dev/null +++ b/src/include/epicsVersion.h @@ -0,0 +1,11 @@ +/* + * EPICS Version information + */ +#define EPICS_VERSION 3 +#define EPICS_REVISION 12 +#define EPICS_MODIFICATION 2 +#define EPICS_UPDATE_LEVEL 1 + +#define epicsReleaseVersion "@(#)Version R3.12.2.1 $Date$" + +#define EPICS_VERSION_STRING "EPICS Version 3.12.2.1" diff --git a/src/include/gsd_sync_defs.h b/src/include/gsd_sync_defs.h new file mode 100644 index 000000000..7f66c4233 --- /dev/null +++ b/src/include/gsd_sync_defs.h @@ -0,0 +1,55 @@ +#ifndef INCgsd_sync_defsh +#define INCgsd_sync_defsh +/* $Id$ + * Author: Gale Slentz + * Date: 09-18-90 + * + * Experimental Physics and Industrial Control System (EPICS) + * + * Copyright 1991, the Regents of the University of California, + * and the University of Chicago Board of Governors. + * + * This software was produced under U.S. Government contracts: + * (W-7405-ENG-36) at the Los Alamos National Laboratory, + * and (W-31-109-ENG-38) at Argonne National Laboratory. + * + * Initial development by: + * The Controls and Automation Group (AT-8) + * Ground Test Accelerator + * Accelerator Technology Division + * Los Alamos National Laboratory + * + * Co-developed with + * The Controls and Computing Group + * Accelerator Systems Division + * Advanced Photon Source + * Argonne National Laboratory + * + * Modification Log: + * ----------------- + * .01 09-18-90 ges initial version + * + */ +/*+/mod*********************************************************************** +* TITLE gsd_sync_defs.h - defines for gsd_sync.c +* +* DESCRIPTION +* Contains the definitions that a user of gsd_sync.c +* (for silo of synchronous data) would need to use. +* +*-***************************************************************************/ +#define PREVIOUS_SYNC_DATA 0 +#define NEXTSET_SYNC_DATA 1 +#define USEC_TIME_OUT 100 /* struct timeval's timeout 100usecs */ +#define VOID void + +struct gsd_sync_data { + char *pName; /* ptr to channel name string */ + chid pChid; /* Channel Access id */ + chtype time_type; /* DBR_TIME_xxxx type specifier for data */ + int count; /* element count */ + int svalid; /* valid data flag */ + VOID *pSdata; /* ptr to DBR_TIME_XXXX structure */ +}; + +#endif /* INCgsd_sync_defsh */ diff --git a/src/include/module_types.h b/src/include/module_types.h new file mode 100644 index 000000000..a1cbe1d12 --- /dev/null +++ b/src/include/module_types.h @@ -0,0 +1,586 @@ +/* module_types.h */ +/* base/include $Id$ */ +/* + * Author: Bob Dalesio + * Date: 12-07-88 + * + * Experimental Physics and Industrial Control System (EPICS) + * + * Copyright 1991, the Regents of the University of California, + * and the University of Chicago Board of Governors. + * + * This software was produced under U.S. Government contracts: + * (W-7405-ENG-36) at the Los Alamos National Laboratory, + * and (W-31-109-ENG-38) at Argonne National Laboratory. + * + * Initial development by: + * The Controls and Automation Group (AT-8) + * Ground Test Accelerator + * Accelerator Technology Division + * Los Alamos National Laboratory + * + * Co-developed with + * The Controls and Computing Group + * Accelerator Systems Division + * Advanced Photon Source + * Argonne National Laboratory + * + * Modification Log: + * ----------------- + * .01 12-07-88 lrd moved IO_TYPES.H into here + * added interruptable indicator for each io card + * added arrays of pointers for info on the io cards + * .02 02-01-89 lrd add Allen-Bradley Modules + * rearrange I/O card order + * .03 02-04-89 lrd add bus specification + * + * .04 02-06-89 joh add timing int vec # + * .05 02-09-89 lrd move vectors and I/O card base addresses here + * .06 02-11-89 lrd changed AB num cards to 12 and OFE num chan to 4 + * .04 02-13-89 joh fixed length of timing address array + * .05 04-22-89 lrd changed AB num channels to 8 for ABBI cards + * .06 04-24-89 lrd moved AB 6008SV info here + * .07 05-26-89 joh added Joerger VTR1 transient recorder + * .08 09-13-89 lrd add VXI module specification to each type + * remove unused modules + * .09 09-25-89 lrd AB adapters to 8 cards to 16 and IFE channels to + * 8 + * .10 10-17-89 lrd AB changed number of cards from 12 to 16 for + * binary inputs and outputs + * .11 11-21-89 joh fixed card and chnl count for at5 vxi timing + * .12 11-30-89 lrd add the OMS 6 axis motor driver + * .13 12-12-89 joh moved XY220 base to match changes made by the + * hardware section. + * .14 05-16-90 cr add Single Ended IFE module + * .15 05-24-90 mk add 4-20Ma IFE + * .16 05-23-90 lrd/ms add DVX-2502 + * .17 07-19-90 ms changed the mizar interrupt vector to e8 + * wouldn't work with the CMC ethernet card + * used the same interrupt vector + * .18 12-19-90 lrd add 0-5V IFE + * .19 03-26-91 lrd modified the AT5-VXIBO from 16 to 32 + * .20 07-23-91 ges Add AT830X card base addresses and vectors. + * .21 08-14-91 ges Add AT830X_1 card base addresses and ivectors. + * (These are the new gen 8308B and 8309C cards) + * .22 06-24-92 joh added the hp E1368a VXI video switching module + * .23 06-25-92 bg stripped intitial 1 off the standard addresses + * in AB_BASE_ADDR,ai_memaddrs,wf_memaddrs,AT830X_ + * ADDRS, and AT830X_1_ADDRS so they can be mapped + in sysBusToLocalAdrs + * .24 06-25-92 bg stripped initial ff off all short addresses so + they can be mapped in sysBusToLocalAdrs + * .25 06-25-92 bg Moved SM_BASE_ADDR frin oms_driver.h to sm_addrs + in this file. + * .26 06-25-92 bg Moved dvx addresses,interrupt vectors,channel numbers + and card number definitions from dvx_driver.h to here. + + * .26 06-25-92 bg Moved dvx addresses,interrupt vectors,channel numbers + * .27 06-25-92 bg Added definitions for xy240_driver + * .28 06-25-92 bg Removed all reference to the Zio085 + * .29 06-26-92 bg Temporarily returned all reference to the Zio085 + * .30 06-26-92 joh added binary input capability to the hp E1368a + * VXI video switching module + * .31 06-30-92 joh added constant for the number of VXI LA + * .32 07-06-92 joh added base and size VXIA24 & A32 devices + * .33 07-07-92 joh added KSC V215 VXI AI + * .34 07-09-92 joh added AT8 FP10S master/slave fast + * protect module + * .35 07-10-92 joh added FP int vec base + * .36 07-17-92 bg moved addresses for Comet card from drvComet.c to + * here. + * .37 07-23-92 joh number of AI channels for AT5 VXI should be 8 not 6 + * number of BI channels for AT5 VXI should be 32 not 16 + * number of TI channels for AT5 VXI should be 10 not 5 + * (these changes reflect the AT5 hardware upgrade) + * + * .38 08-04-92 joh fixed COMET A16 base addr + * .39 08-10-92 joh number of xy220 cards now matches the AT8 + * address standard + * .40 08-11-92 joh moved xy010 base to here + * .41 08-11-92 joh took out xycom specific defines + * .42 09-15-92 joh DVX num cards was set allowing the DVX to + * overlap the VXI DC address and continue + * outside of VME A16. DVX num cards is now one + * .43 06-18-93 lrd reduced xy220 number of cards to 1 - mv167 mismatch on short address space + * .44 05-05-94 kornke Changed number of supported OMS cards. + */ + +#ifndef INCLmodule_typesh +#define INCLmodule_typesh + +/* Device module types */ +/* + * all devices have corresponding entries in ~operator/db/src/menus.c + * changes must be made in both areas to keep the database and drivers in sync + */ +/* & in comment indicates tested with card 0 */ +/* % in comment indicates tested with card other than card 0 */ +/* # in comment indicates that the Nth card has been tested */ +/* !! never been tested */ + +/* + * @# If any changes are made to this file, check the procedures + * ab_card, and vme_card in signallist.c, and get_address in sigmenu.c. + */ + +#ifdef MODULE_TYPES_INIT +#define MODULE_TYPES_DEF(MT_DEF_PARM) MT_DEF_PARM +#else +#define MODULE_TYPES_DEF(MT_DEF_PARM) extern MT_DEF_PARM; +#endif + +/* Number of columns used in io_report. */ +#define IOR_MAX_COLS 4 + +/* I/O types */ +#define IO_AI 0 +#define IO_AO 1 +#define IO_BI 2 +#define IO_BO 3 +#define IO_SM 4 +#define IO_WF 5 +#define IO_TIMER 6 +#define MAX_IO_TYPE IO_TIMER + +/* bus types */ +/* must correspond to the values in link types */ +/* these defines are in ~gta/dbcon/h/link.h */ + + +/* equates for the Allen-Bradley cards. */ +#define AB_BASE_ADDR 0xc00000 /* base addr of first AB6008SV */ +#define AB_MAX_LINKS 2 /* number of serial links from VME */ +#define AB_MAX_ADAPTERS 8 /* number of physical adapters on a link */ +#define AB_MAX_CARDS 16 /* max number of IO cards per adapter */ +#define AB_CARD_ADAPTER 16 /* cards per logical adapter */ +#define AB_CHAN_CARD 16 /* max channels per card */ + +/* analog inputs */ +#define AB1771IL 0 /* &% Allen-Bradley low level analog input */ +#define AB1771IFE 1 /* &% Allen-Bradley low level analog input */ +#define AB1771IXE 2 /* &% Allen-Bradley millivolt input */ +#define XY566SE 3 /* & Xycom 12-bit Single Ended Scanned*/ +#define XY566DI 4 /* &% Xycom 12-bit Differential Scanned */ +#define XY566DIL 5 /* &% Xycom 12-bit Differential Latched */ +#define VXI_AT5_AI 6 /* % AT-5 VXI module's Analog Inputs */ +#define AB1771IFE_SE 7 /* % A-B IFE in 16 single-ended input mode */ +#define AB1771IFE_4to20MA 8 /* % A-B IFE in 8 double-ended 4to20Ma */ +#define DVX2502 9 /* &% DVX_2502 128 chan 16 bit differential */ +#define AB1771IFE_0to5V 10 /* % A-B IFE in 8 double-ended 4to20Ma */ +#define KSCV215 11 /* % KSC V215 VXI 16 bit differential */ +#define AB1771IrPlatinum 12 /* % A-B RTD Platinum */ +#define AB1771IrCopper 13 /* % A-B RTD Copper */ +#define MAX_AI_TYPES AB1771IrCopper +MODULE_TYPES_DEF(short ai_num_cards[MAX_AI_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={12,12,12, 4, 4, 6,32,12,12, 1, 12, 32, 12,12}; +#endif +MODULE_TYPES_DEF(short ai_num_channels[MAX_AI_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 8, 8, 8,32,16,16, 8,16, 8, 127, 8, 32,6,6}; +#endif +MODULE_TYPES_DEF(short ai_interruptable[MAX_AI_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 0, 0,0,0}; +#endif +MODULE_TYPES_DEF(short ai_bus[MAX_AI_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 4, 4, 4, 2, 2, 2, 2, 4, 4, 2, 4, 2,4,4}; +#endif +MODULE_TYPES_DEF(unsigned short ai_addrs[MAX_AI_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 0,0,0,0x6000,0x7000,0xe000, 0xc014,0,0, 0xff00, 0, 0,0,0}; +#endif +MODULE_TYPES_DEF(long ai_memaddrs[MAX_AI_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={0,0,0,0x000000,0x040000,0x0c0000, 0,0,0, 0x100000, 0, 0,0,0}; +#endif + +/* analog outputs */ +#define AB1771OFE 0 /* &% Allen-Bradley 12 bit Analog Output */ +#define VMI4100 1 /* & VMIC VMIVME 4100 */ +#define ZIO085 2 /* & Ziomek 085 */ +#define VXI_AT5_AO 3 /* !! AT-5 VXI modules analog outputs */ +#define MAX_AO_TYPES VXI_AT5_AO +MODULE_TYPES_DEF(short ao_num_cards[MAX_AO_TYPES+1]) +#ifdef MODULE_TYPES_INIT + = {12, 4, 1, 32}; +#endif +MODULE_TYPES_DEF(short ao_num_channels[MAX_AO_TYPES+1]) +#ifdef MODULE_TYPES_INIT + = { 4, 16, 32, 16}; +#endif +MODULE_TYPES_DEF(short ao_interruptable[MAX_AO_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + = { 0, 0, 0, 1}; +#endif +MODULE_TYPES_DEF(short ao_bus[MAX_AO_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 4, 2, 2, 2}; +#endif +MODULE_TYPES_DEF(unsigned short ao_addrs[MAX_AO_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 0,0x4100,0x0800, 0xc000}; +#endif + +/* binary inputs */ +#define ABBI_08_BIT 0 /* &% Allen-Bradley generic Binary In 8 bit */ +#define ABBI_16_BIT 1 /* &% Allen-Bradley generic Binary In 16 bit */ +#define BB910 2 /* & BURR BROWN MPV 910 (relay) */ +#define XY210 3 /* &% XYcom 32 bit binary in */ +#define VXI_AT5_BI 4 /* !! AT-5 VXI modules binary inputs */ +#define HPE1368A_BI 5 /* !! HP E1368A video switch */ +#define AT8_FP10S_BI 6 /* !! AT8 FP10 slave fast protect */ +#define XY240_BI 7 /* !! Xycom 32 bit binary in / 32 bit binary out */ +#define MAX_BI_TYPES XY240_BI +MODULE_TYPES_DEF(short bi_num_cards[MAX_BI_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + ={ 12, 12, 4, 4, 32, 32, 8, 2}; +#endif +MODULE_TYPES_DEF(short bi_num_channels[MAX_BI_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + ={ 8, 16, 32, 32, 32, 16, 32, 32}; +#endif +MODULE_TYPES_DEF(short bi_interruptable[MAX_BI_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + ={ 1, 1, 0, 0, 1, 1, 1, 1}; +#endif +MODULE_TYPES_DEF(short bi_bus[MAX_BI_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 4, 4, 2, 2, 2, 2, 2, 2}; +#endif +MODULE_TYPES_DEF(unsigned short bi_addrs[MAX_BI_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 0,0,0xb800,0xa000, 0xc000, 0xc000, 0x0e00, 0xd000}; +#endif + +/* binary outputs */ +#define ABBO_08_BIT 0 /* &% Allen-Bradley 8 bit binary out */ +#define ABBO_16_BIT 1 /* &% Allen-Bradley 16 bit binary out */ +#define BB902 2 /* &% BURR BROWN MPV 902 (relay) */ +#define XY220 3 /* &% XYcom 32 bit binary out */ +#define VXI_AT5_BO 4 /* !! AT-5 VXI modules binary outputs */ +#define HPE1368A_BO 5 /* !! HP E1368A video switch */ +#define AT8_FP10M_BO 6 /* !! AT8 FP10 master fast protect */ +#define XY240_BO 7 /* !! Xycom 32 bit binary in / 32 bit binary out */ +#define MAX_BO_TYPES XY240_BO +MODULE_TYPES_DEF(short bo_num_cards[MAX_BO_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + ={12, 12, 4, 1, 32, 32, 2, 2}; +#endif +MODULE_TYPES_DEF(short bo_num_channels[MAX_BO_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + ={ 8, 16, 32, 32, 32, 16, 32, 32}; +#endif +MODULE_TYPES_DEF(short bo_interruptable[MAX_BO_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + ={ 0, 0, 0, 0, 1, 0, 0, 1 }; +#endif +MODULE_TYPES_DEF(short bo_bus[MAX_BO_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 4, 4, 2, 2, 2, 2, 2, 2 }; +#endif +MODULE_TYPES_DEF(unsigned short bo_addrs[MAX_BO_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 0,0,0xd800,0xc800, 0xc000, 0xc000, 0x0c00, 0xd000}; +#endif + +/* stepper motor drivers */ +#define CM57_83E 0 /* & Compumotor 57-83E motor controller */ +#define OMS_6AXIS 1 /* & OMS six axis motor controller */ +#define MAX_SM_TYPES OMS_6AXIS +MODULE_TYPES_DEF(short sm_num_cards[MAX_SM_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + ={ 8, 8 }; +#endif +MODULE_TYPES_DEF(short sm_num_channels[MAX_SM_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + = { 1, 8}; +#endif +MODULE_TYPES_DEF(short sm_interruptable[MAX_SM_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + = { 0, 0 }; +#endif +MODULE_TYPES_DEF(short sm_bus[MAX_SM_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 2, 2 }; +#endif +MODULE_TYPES_DEF(unsigned short sm_addrs[MAX_SM_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 0x8000, 0xfc00 }; +#endif + +/* waveforms */ +#define XY566WF 0 /* & Xycom 566 as a waveform */ +#define CAMAC_THING 1 /* !! CAMAC waveform digitizer */ +#define JGVTR1 2 /* & Joerger transient recorder */ +#define COMET 3 /* !! COMET transient recorder */ +#define MAX_WF_TYPES COMET +MODULE_TYPES_DEF(short wf_num_cards[MAX_WF_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + ={4, 4, 8, 4}; +#endif +MODULE_TYPES_DEF(short wf_num_channels[MAX_WF_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + ={1, 1, 1, 4}; +#endif +MODULE_TYPES_DEF(short wf_interruptable[MAX_WF_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + = {0, 0, 0, 0}; +#endif +MODULE_TYPES_DEF(short wf_bus[MAX_WF_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={2, 3, 2, 2}; +#endif +MODULE_TYPES_DEF(unsigned short wf_addrs[MAX_WF_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={0x9000, 0, 0xB000, 0xbc00}; +#endif +MODULE_TYPES_DEF(unsigned short wf_armaddrs[MAX_WF_TYPES+1]) +#ifdef MODULE_TYPES_INIT + = {0x5400, 0, 0, 0}; +#endif +MODULE_TYPES_DEF(long wf_memaddrs[MAX_WF_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={0x080000, 0, 0xb80000, 0xe0000000}; +#endif + + +/* timing cards */ +#define MZ8310 0 /* &% Mizar Timing Module */ +#define DG535 1 /* !! GPIB timing instrument */ +#define VXI_AT5_TIME 2 /* !! AT-5 VXI modules timing channels */ +#define MAX_TM_TYPES VXI_AT5_TIME +MODULE_TYPES_DEF(short tm_num_cards[MAX_TM_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + ={ 4, 1, 32 }; +#endif +MODULE_TYPES_DEF(short tm_num_channels[MAX_TM_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + ={10, 1, 10}; +#endif +MODULE_TYPES_DEF(short tm_interruptable[MAX_TM_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + = { 1, 0, 1 }; +#endif +MODULE_TYPES_DEF(short tm_bus[MAX_TM_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 2, 5, 2 }; +#endif +MODULE_TYPES_DEF(unsigned short tm_addrs[MAX_TM_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={0xf800, 0, 0xc000 }; +#endif + +/* AT830X clock cards */ +MODULE_TYPES_DEF(long AT830X_1_addrs ) +#ifdef MODULE_TYPES_INIT + = 0x0400; +#endif +MODULE_TYPES_DEF(short AT830X_1_num_cards ) +#ifdef MODULE_TYPES_INIT + = 2; +#endif +MODULE_TYPES_DEF(long AT830X_addrs ) +#ifdef MODULE_TYPES_INIT + = 0xaa0000; +#endif +MODULE_TYPES_DEF(short AT830X_num_cards ) +#ifdef MODULE_TYPES_INIT + = 2; +#endif + +/* + * system controller cards. + * (driver looks for only one card) + */ +MODULE_TYPES_DEF(long xy010ScA16Base) +#ifdef MODULE_TYPES_INIT + = 0x0000; +#endif +/* + * limit the size of the VXI logical address space + * + * = + 0xc000 + * + * LA VME address + * 0 + * EPICS_VXI_LA_COUNT + (EPICS_VXI_LA_COUNT-1)*64 + */ +MODULE_TYPES_DEF(unsigned char EPICS_VXI_LA_COUNT) +#ifdef MODULE_TYPES_INIT + = 32; +#endif + +/* + * + * address ranges for VXI A24 and A32 devices + * + */ +MODULE_TYPES_DEF(char *EPICS_VXI_A24_BASE) +#ifdef MODULE_TYPES_INIT + = (char *) 0x900000; +#endif +MODULE_TYPES_DEF(unsigned long EPICS_VXI_A24_SIZE) +#ifdef MODULE_TYPES_INIT + = 0x100000; +#endif +MODULE_TYPES_DEF(char *EPICS_VXI_A32_BASE) +#ifdef MODULE_TYPES_INIT + = (char *) 0x90000000; +#endif +MODULE_TYPES_DEF(unsigned long EPICS_VXI_A32_SIZE) +#ifdef MODULE_TYPES_INIT + = 0x10000000; +#endif + + +/****************************************************************************** + * + * Interrupt vector locations used by the MV167 CPU board. + * These are defined in mv167.h + * + * PCC2_INT_VEC_BASE 0x40 PCC interrupt vector base number + * any multiple of 0x10 + * UTIL_INT_VEC_BASE0 0x50 VMEchip2 utility interrupt + * vector base number + * any multiple of 0x10 + * UTIL_INT_VEC_BASE1 0x60 VMEchip2 utility interrupt + * vector base number + * any multiple of 0x10 + * + * INT_VEC_CD2400_A 0x90 int vec for channel A + * INT_VEC_CD2400_B 0x94 int vec for channel B + * INT_VEC_CD2400_C 0x98 int vec for channel C + * INT_VEC_CD2400_D 0x9c int vec for channel D + * + * LANC_IRQ_LEVEL 3 LNANC IRQ level + * MPCC_IRQ_LEVEL 4 serial comm IRQ level + * SYS_CLK_LEVEL 6 interrupt level for sysClk + * AUX_CLK_LEVEL 5 interrupt level for auxClk + * SCSI_IRQ_LEVEL 2 scsi interrupt level + * + ******************************************************************************/ + +/* interrupt vector allocation - one for each XY566 DIL card */ +MODULE_TYPES_DEF(int AI566_VNUM) +#ifdef MODULE_TYPES_INIT + =0xf8; /* Xycom 566 Differential Latched */ +#endif + +/* interrupt vector allocation - one for each DVX card */ +MODULE_TYPES_DEF(int DVX_IVEC0) +#ifdef MODULE_TYPES_INIT + =0xd0; +#endif + +/* stepper motor interrupt vector - one for each motor */ +MODULE_TYPES_DEF(int MD_INT_BASE) +#ifdef MODULE_TYPES_INIT + =0xf0; /* base of the motor int vector */ +#endif + +/* I reserve from here up to num_cards * 4 interrupting chans/card - joh */ +MODULE_TYPES_DEF(int MZ8310_INT_VEC_BASE) +#ifdef MODULE_TYPES_INIT + =0xe8; +#endif + +/* Allen-Bradley Serial Driver - MAX_AB_LINKS number of vectors */ +MODULE_TYPES_DEF(int AB_VEC_BASE) +#ifdef MODULE_TYPES_INIT + =0x60; +#endif + +/* only one interrupt vector allocated for all Joerger VTR1 boards joh */ +MODULE_TYPES_DEF(int JGVTR1_INT_VEC) +#ifdef MODULE_TYPES_INIT + =0xe0; +#endif + +/* AT830X_1 cards have 1 intr vector for each AT830X_1_num_cards (presently 2) */ +MODULE_TYPES_DEF(int AT830X_1_IVEC0) +#ifdef MODULE_TYPES_INIT + =0xd4; +#endif + +/* AT830X cards have 1 intr vector for each AT830X_num_cards (presently 2) */ +MODULE_TYPES_DEF(int AT830X_IVEC0) +#ifdef MODULE_TYPES_INIT + =0xd6; +#endif + +/* AT8 fast protect interrupt vector base */ +MODULE_TYPES_DEF(int AT8FP_IVEC_BASE) +#ifdef MODULE_TYPES_INIT + =0xa2; +#endif + + +MODULE_TYPES_DEF(int AT8FPM_IVEC_BASE ) +#ifdef MODULE_TYPES_INIT + =0xaa; +#endif + + +/****************************************************************************** + * + * Addresses and IRQ information used by the XVME402 bitbus cards. + * + ******************************************************************************/ +MODULE_TYPES_DEF(unsigned short BB_SHORT_OFF ) +#ifdef MODULE_TYPES_INIT + = 0x1800; /* the first address of link 0's region */ +#endif +#define BB_NUM_LINKS 4 /* max number of BB ports allowed */ +MODULE_TYPES_DEF(int BB_IVEC_BASE ) +#ifdef MODULE_TYPES_INIT + = 0xa0; /* vectored interrupts (2 used for each link) */ +#endif +MODULE_TYPES_DEF(int BB_IRQ_LEVEL ) +#ifdef MODULE_TYPES_INIT + = 5; /* IRQ level */ +#endif + +/****************************************************************************** + * + * Information for the PEP modular Bitbus boards. + * + ******************************************************************************/ +MODULE_TYPES_DEF(unsigned short PEP_BB_SHORT_OFF ) +#ifdef MODULE_TYPES_INIT + = 0x1c00; +#endif +MODULE_TYPES_DEF(int PEP_BB_IVEC_BASE ) +#ifdef MODULE_TYPES_INIT + = 0xe8; +#endif + +/****************************************************************************** + * + * Addresses and IRQ information used by the NI1014 and NI1014D bitbus cards. + * + ******************************************************************************/ +MODULE_TYPES_DEF(unsigned short NIGPIB_SHORT_OFF) +#ifdef MODULE_TYPES_INIT + = 0x5000;/* First address of link 0's region */ +#endif + /* Each link uses 0x0200 bytes */ +#define NIGPIB_NUM_LINKS 4 /* Max number of NI GPIB ports allowed */ +MODULE_TYPES_DEF(int NIGPIB_IVEC_BASE ) +#ifdef MODULE_TYPES_INIT + = 100; /* Vectored interrupts (2 used for each link) */ +#endif +MODULE_TYPES_DEF(int NIGPIB_IRQ_LEVEL ) +#ifdef MODULE_TYPES_INIT + =5; /* IRQ level */ +#endif + +#if 0 /* JRW */ +#define NI1014_LINK_NUM_BASE 0 +#endif + +/* + * nothing after this endif + */ +#endif /*INCLmodule_typesh*/ diff --git a/src/include/sbufLib.h b/src/include/sbufLib.h new file mode 100644 index 000000000..4f8ece8e4 --- /dev/null +++ b/src/include/sbufLib.h @@ -0,0 +1,127 @@ +/* + * $Id$ + * + * Shared Buffer Library Header File + * + * Author: Jeffrey O. Hill + * johill@lanl.gov + * (505) 665 1831 + * + * Experimental Physics and Industrial Control System (EPICS) + * + * Copyright 1991, the Regents of the University of California, + * and the University of Chicago Board of Governors. + * + * This software was produced under U.S. Government contracts: + * (W-7405-ENG-36) at the Los Alamos National Laboratory, + * and (W-31-109-ENG-38) at Argonne National Laboratory. + * + * Initial development by: + * The Controls and Automation Group (AT-8) + * Ground Test Accelerator + * Accelerator Technology Division + * Los Alamos National Laboratory + * + * Co-developed with + * The Controls and Computing Group + * Accelerator Systems Division + * Advanced Photon Source + * Argonne National Laboratory + * + * Modification Log: + * ----------------- + * $Log$ + * Revision 1.1 1995/09/29 21:42:26 jhill + * installed into CVS + * + * + * NOTES: + */ + +#ifndef INCsbufLibh +#define INCsbufLibh + +#include + +#ifndef READONLY +#define READONLY const +#endif + +typedef unsigned long sbufIndex; +typedef int sbufStatus; +typedef void userFreeFunc(void *pUserArg); +typedef READONLY void *SBUFID; +typedef READONLY void *SSEGID; + +#ifdef __STDC__ + +SBUFID sbufCreate (void); +sbufStatus sbufDelete (SBUFID id); +void sbufShowAll (void); +void sbufShow (SBUFID id); +sbufIndex sbufSize (SBUFID id); + +/* + * + * To avoid redundant copying of large buffers + * the buffer provider is required to supply a + * function pointer (pFree) which is called when + * consumer is finished with the buffer. + * The provider must _not_ change or free the + * buffer until the pFree call back is called. + */ +/* + * data segment is added to the end of the sbuf + */ +sbufStatus sbufAppend (SBUFID id, READONLY void *pData, + sbufIndex dataSize, userFreeFunc *pFree, READONLY void *pFreeArg); +/* + * data segment is inserted at the beginning of the sbuf + */ +sbufStatus sbufPrefix (SBUFID id, READONLY void *pData, + sbufIndex dataSize, userFreeFunc *pFree, READONLY void *pFreeArg); + +/* + * A shared segment is removed from the beginning of a shared buffer + * (it is the application's responsability to dispose of the + * segment when it is finished with it) + */ +sbufStatus sbufPopPrefix(SBUFID sBufId, SSEGID *pSSegId, + READONLY void **ppData, sbufIndex *pDataSize); +/* + * A shared segment is removed from the end of a shared buffer + * (it is the application's responsability to dispose of the + * segment when it is finished with it) + */ +sbufStatus sbufPopAppendix(SBUFID sBufId, SSEGID *pSSegId, + READONLY void **ppData, sbufIndex *pDataSize); + +/* + * Delete a segment + * + * (free routine is called) + */ +sbufStatus sbufSegDelete (SSEGID id); + +#else /*__STDC__*/ +SBUFID sbufCreate (); +sbufStatus sbufDelete (); +sbufStatus sbufShowAll (); +sbufStatus sbufShow (); +sbufIndex sbufSize (); +sbufStatus sbufAppend (); +sbufStatus sbufPrefix (); +sbufStatus sbufPopPrefix (); +sbufStatus sbufPopAppendix (); +#endif /*__STDC__*/ + +/* + * Status returned by sbufLib functions + */ +#define S_sbuf_success 0 +#define S_sbuf_noMemory (M_sbuf | 1) /*Memory allocation failed*/ +#define S_sbuf_uknId (M_sbuf | 2) /*Unknown identifier*/ +#define S_sbuf_empty (M_sbuf | 3) /*shared buffer is empty*/ + +#endif /*INCsbufLibh*/ + diff --git a/src/include/shareLib.h b/src/include/shareLib.h new file mode 100644 index 000000000..2c6390ffe --- /dev/null +++ b/src/include/shareLib.h @@ -0,0 +1,18 @@ + +/* + * Use compiler specific key words to set up shareable library + * external symbols and entry points + */ + +#ifdef WIN32 +# ifdef _WINDLL +# define epicsShareExtern __declspec(dllexport) +# else +# define epicsShareExtern __declspec(dllimport) extern +# endif +# define epicsShareAPI __stdcall +#else +# define epicsShareAPI +# define epicsShareExtern extern +#endif + diff --git a/src/libCom/misc/createSoftLinks.sh b/src/libCom/misc/createSoftLinks.sh new file mode 100644 index 000000000..4693bacd6 --- /dev/null +++ b/src/libCom/misc/createSoftLinks.sh @@ -0,0 +1,12 @@ +#! /bin/sh +# createSoftLinks.sh +# $Id$ + +# Tailored script to create local softlinks releative to this directory +# the name createSoftLinks.sh is a key and must not be changed. If the +# release tool sccsGet finds a file by the name of (createSoftLinks.sh), +# after it has retrieved any out-of-date SCCS files, it invokes the +# script to create the defined softlinks + +/bin/rm -f epicsVersion.h +ln -s ../version/epicsVersion.h epicsVersion.h diff --git a/src/libCom/misc/dbDefs.h b/src/libCom/misc/dbDefs.h new file mode 100644 index 000000000..f5af3ca71 --- /dev/null +++ b/src/libCom/misc/dbDefs.h @@ -0,0 +1,112 @@ +/* $Id$ + * + * Author: Marty Kraimer + * Date: 6-1-90 + * + * Experimental Physics and Industrial Control System (EPICS) + * + * Copyright 1991, the Regents of the University of California, + * and the University of Chicago Board of Governors. + * + * This software was produced under U.S. Government contracts: + * (W-7405-ENG-36) at the Los Alamos National Laboratory, + * and (W-31-109-ENG-38) at Argonne National Laboratory. + * + * Initial development by: + * The Controls and Automation Group (AT-8) + * Ground Test Accelerator + * Accelerator Technology Division + * Los Alamos National Laboratory + * + * Co-developed with + * The Controls and Computing Group + * Accelerator Systems Division + * Advanced Photon Source + * Argonne National Laboratory + * + * Modification Log: + * ----------------- + * .01 mm-dd-yy iii Comment + * .02 12-03-91 rcz defines from vxWorks.h for Unix + * .03 12-03-91 rcz added define PVNAME_STRINGSZ + * .04 05-22-92 mrk cleanup + * .05 07-22-93 mrk Cleanup defs for NO and YES + * .06 08-11-93 joh included errMdef.h + */ + +#ifndef INCdbDefsh +#define INCdbDefsh 1 + +#if defined(NULL) +#undef NULL +#endif +#define NULL 0 + +#if defined(NO) +#undef NO +#endif +#define NO 0 + +#if defined(YES) +#undef YES +#endif +#define YES 1 + +#if defined(TRUE) +#undef TRUE +#endif +#define TRUE 1 + +#if defined(FALSE) +#undef FALSE +#endif +#define FALSE 0 + +#ifndef OK +#define OK 0 +#endif +#ifndef ERROR +#define ERROR (-1) +#endif +#ifndef NONE +#define NONE (-1) /* for times when NULL won't do */ +#endif + +#ifndef NELEMENTS +#define NELEMENTS(array) /* number of elements in an array */ \ + (sizeof (array) / sizeof ((array) [0])) +#endif + +#ifndef max +#define max(x, y) (((x) < (y)) ? (y) : (x)) +#endif +#ifndef min +#define min(x, y) (((x) < (y)) ? (x) : (y)) +#endif + +#ifndef OFFSET +#define OFFSET(structure, member) /* byte offset of member in structure*/\ + ((int) &(((structure *) 0) -> member)) +#endif + +/* FLDNAME_SZ must be 4 */ +#define PVNAME_STRINGSZ 29 /* includes NULL terminator for PVNAME_SZ */ +#define PVNAME_SZ (PVNAME_STRINGSZ - 1) /*Process Variable Name Size */ +#define FLDNAME_SZ 4 /*Field Name Size */ + +#define DB_MAX_CHOICES 30 + +#define SUPERVISORY 0 +#define CLOSED_LOOP 1 + +#define NTO1FIRST 0 +#define NTO1LOW 1 +#define NTO1HIGH 2 +#define NTO1AVE 3 + +#define vxTicksPerSecond (sysClkRateGet()) /*clock ticks per second*/ + +#include +#include + +#endif /* INCdbDefsh */ diff --git a/src/libCom/misc/epicsTypes.h b/src/libCom/misc/epicsTypes.h new file mode 100644 index 000000000..0570f92f5 --- /dev/null +++ b/src/libCom/misc/epicsTypes.h @@ -0,0 +1,284 @@ +/* $Id */ + +/* + * Author: Jeff Hill + * Date: 5-95 + * + * Experimental Physics and Industrial Control System (EPICS) + * + * Copyright 1991, the Regents of the University of California, + * and the University of Chicago Board of Governors. + * + * This software was produced under U.S. Government contracts: + * (W-7405-ENG-36) at the Los Alamos National Laboratory, + * and (W-31-109-ENG-38) at Argonne National Laboratory. + * + * Initial development by: + * The Controls and Automation Group (AT-8) + * Ground Test Accelerator + * Accelerator Technology Division + * Los Alamos National Laboratory + * + * Co-developed with + * The Controls and Computing Group + * Accelerator Systems Division + * Advanced Photon Source + * Argonne National Laboratory + * + * Modification Log: + * ----------------- + * $Log$ + * Revision 1.7 1995/12/19 19:46:44 jhill + * added epicsStatus typedef + * + * Revision 1.6 1995/09/29 21:41:41 jhill + * added use of sbufs + * + */ + +#ifndef INCepicsTypesh +#define INCepicsTypesh 1 + +#ifdef __STDC__ +# define READONLY const +#else +# define READONLY +#endif + +#include + +#include +#include + +#ifndef stringOf +# ifdef __STDC__ +# define stringOf(TOKEN) #TOKEN +# else +# define stringOf(TOKEN) "TOKEN" +# endif +#endif + +typedef enum { + epicsFalse=0, + epicsTrue=1 } epicsBoolean; + +/* + * Architecture Independent Data Types + * (so far this is sufficient for all archs we have ported to) + */ +typedef char epicsInt8; +typedef unsigned char epicsUInt8; +typedef short epicsInt16; +typedef unsigned short epicsUInt16; +typedef epicsUInt16 epicsEnum16; +typedef int epicsInt32; +typedef unsigned epicsUInt32; +typedef float epicsFloat32; +typedef double epicsFloat64; +typedef unsigned long epicsIndex; +typedef epicsInt32 epicsStatus; + +typedef struct { + unsigned length; + char *pString; +}epicsString; + +typedef struct { + epicsIndex first; + epicsIndex count; +}epicsArrayIndex; + +/* + * Arrays are stored in a stored in a shared buffer + * in order to avoid redundant copying. See "sbufLib.h". + * + * The first segment in a shared buffer containing an + * EPICS array will always contain only the + * "epicsArrayDescriptor" described below. Subsequent + * segments will contain the array data (in C language + * dimension order). + * + * Segments in the shared buffer must end on natural + * boundaries for the element type stored in the array. + * + * nDim - the number of dimensions. nDim==0 => scaler + * pDim - pointer to an array of lengths for each dimension + * + */ +typedef SBUFID epicsArray; +typedef struct { + unsigned nDim; /* the number of dimensions */ + epicsIndex *pDim; /* array of dimension lengths */ +}epicsArrayDescriptor; + +/* + * !! Dont use this - it may vanish in the future !! + * + * Provided only for backwards compatibility with + * db_access.h + * + */ +#define MAX_STRING_SIZE 40 +typedef char epicsOldString[MAX_STRING_SIZE]; + +/* + * union of all types + * + * Strings included here as pointers only so that we support + * large string types. + * + * Arrays included here as pointers because large arrays will + * not fit in this union. + */ +typedef union epics_any{ + epicsInt8 int8; + epicsUInt8 uInt8; + epicsInt16 int16; + epicsUInt16 uInt16; + epicsEnum16 enum16; + epicsInt32 int32; + epicsUInt32 uInt32; + epicsFloat32 float32; + epicsFloat64 float64; + epicsString string; + epicsArray array; +}epicsAny; + +/* + * Corresponding Type Codes + * (this enum must start at zero) + * + * !! Update epicsTypeToDBR_XXXX[] and DBR_XXXXToEpicsType + * in db_access.h if you edit this enum !! + */ +typedef enum { + epicsInt8T, + epicsUInt8T, + epicsInt16T, + epicsUInt16T, + epicsEnum16T, + epicsInt32T, + epicsUInt32T, + epicsFloat32T, + epicsFloat64T, + epicsStringT, + epicsOldStringT +}epicsType; +#define firstEpicsType epicsInt8T +#define lastEpicsType epicsOldStringT +#define validEpicsType(x) ((x>=firstEpicsType) && (x<=lastEpicsType)) +#define invalidEpicsType(x) ((xlastEpicsType)) + + +/* + * The enumeration "epicsType" is an index to this array + * of type name strings. + */ +#ifdef epicsTypesGLOBAL +READONLY char *epicsTypeNames [lastEpicsType+1] = { + stringOf (epicsInt8), + stringOf (epicsUInt8), + stringOf (epicsInt16), + stringOf (epicsUInt16), + stringOf (epicsEnum16), + stringOf (epicsInt32), + stringOf (epicsUInt32), + stringOf (epicsFloat32), + stringOf (epicsFloat64), + stringOf (epicsString), + stringOf (epicsOldString), +}; +#else /* epicsTypesGLOBAL */ +epicsShareExtern READONLY char *epicsTypeNames [lastEpicsType+1]; +#endif /* epicsTypesGLOBAL */ + +/* + * The enumeration "epicsType" is an index to this array + * of type code name strings. + */ +#ifdef epicsTypesGLOBAL +READONLY char *epicsTypeCodeNames [lastEpicsType+1] = { + stringOf (epicsInt8T), + stringOf (epicsUInt8T), + stringOf (epicsInt16T), + stringOf (epicsUInt16T), + stringOf (epicsEnum16T), + stringOf (epicsInt32T), + stringOf (epicsUInt32T), + stringOf (epicsFloat32T), + stringOf (epicsFloat64T), + stringOf (epicsStringT), + stringOf (epicsOldStringT), +}; +#else /* epicsTypesGLOBAL */ +epicsShareExtern READONLY char *epicsTypeCodeNames [lastEpicsType+1]; +#endif /* epicsTypesGLOBAL */ + +#ifdef epicsTypesGLOBAL +READONLY unsigned epicsTypeSizes [lastEpicsType+1] = { + sizeof (epicsInt8), + sizeof (epicsUInt8), + sizeof (epicsInt16), + sizeof (epicsUInt16), + sizeof (epicsEnum16), + sizeof (epicsInt32), + sizeof (epicsUInt32), + sizeof (epicsFloat32), + sizeof (epicsFloat64), + sizeof (epicsString), + sizeof (epicsOldString), +}; +#else /* epicsTypesGLOBAL */ +epicsShareExtern READONLY unsigned epicsTypeSizes [lastEpicsType+1]; +#endif /* epicsTypesGLOBAL */ + +/* + * The enumeration "epicsType" is an index to this array + * of type class identifiers. + */ +typedef enum { + epicsIntC, + epicsUIntC, + epicsEnumC, + epicsFloatC, + epicsStringC, + epicsOldStringC} epicsTypeClass; +#ifdef epicsTypesGLOBAL +READONLY epicsTypeClass epicsTypeClasses [lastEpicsType+1] = { + epicsIntC, + epicsUIntC, + epicsIntC, + epicsUIntC, + epicsEnumC, + epicsIntC, + epicsUIntC, + epicsFloatC, + epicsFloatC, + epicsStringC, + epicsOldStringC + }; +#else /* epicsTypesGLOBAL */ +epicsShareExtern READONLY epicsTypeClass epicsTypeClasses [lastEpicsType+1]; +#endif /* epicsTypesGLOBAL */ + + +#ifdef epicsTypesGLOBAL +READONLY char *epicsTypeAnyFieldName [lastEpicsType+1] = { + stringOf (int8), + stringOf (uInt8), + stringOf (int16), + stringOf (uInt16), + stringOf (enum16), + stringOf (int32), + stringOf (uInt32), + stringOf (float32), + stringOf (float64), + stringOf (string), + "", /* Old Style Strings will not be in epicsAny type */ + }; +#else /* epicsTypesGLOBAL */ +epicsShareExtern READONLY char *epicsTypeAnyFieldName [lastEpicsType+1]; +#endif /* epicsTypesGLOBAL */ + +#endif /* INCepicsTypesh */ + diff --git a/src/libCom/misc/gsd_sync_defs.h b/src/libCom/misc/gsd_sync_defs.h new file mode 100644 index 000000000..7f66c4233 --- /dev/null +++ b/src/libCom/misc/gsd_sync_defs.h @@ -0,0 +1,55 @@ +#ifndef INCgsd_sync_defsh +#define INCgsd_sync_defsh +/* $Id$ + * Author: Gale Slentz + * Date: 09-18-90 + * + * Experimental Physics and Industrial Control System (EPICS) + * + * Copyright 1991, the Regents of the University of California, + * and the University of Chicago Board of Governors. + * + * This software was produced under U.S. Government contracts: + * (W-7405-ENG-36) at the Los Alamos National Laboratory, + * and (W-31-109-ENG-38) at Argonne National Laboratory. + * + * Initial development by: + * The Controls and Automation Group (AT-8) + * Ground Test Accelerator + * Accelerator Technology Division + * Los Alamos National Laboratory + * + * Co-developed with + * The Controls and Computing Group + * Accelerator Systems Division + * Advanced Photon Source + * Argonne National Laboratory + * + * Modification Log: + * ----------------- + * .01 09-18-90 ges initial version + * + */ +/*+/mod*********************************************************************** +* TITLE gsd_sync_defs.h - defines for gsd_sync.c +* +* DESCRIPTION +* Contains the definitions that a user of gsd_sync.c +* (for silo of synchronous data) would need to use. +* +*-***************************************************************************/ +#define PREVIOUS_SYNC_DATA 0 +#define NEXTSET_SYNC_DATA 1 +#define USEC_TIME_OUT 100 /* struct timeval's timeout 100usecs */ +#define VOID void + +struct gsd_sync_data { + char *pName; /* ptr to channel name string */ + chid pChid; /* Channel Access id */ + chtype time_type; /* DBR_TIME_xxxx type specifier for data */ + int count; /* element count */ + int svalid; /* valid data flag */ + VOID *pSdata; /* ptr to DBR_TIME_XXXX structure */ +}; + +#endif /* INCgsd_sync_defsh */ diff --git a/src/libCom/misc/shareLib.h b/src/libCom/misc/shareLib.h new file mode 100644 index 000000000..2c6390ffe --- /dev/null +++ b/src/libCom/misc/shareLib.h @@ -0,0 +1,18 @@ + +/* + * Use compiler specific key words to set up shareable library + * external symbols and entry points + */ + +#ifdef WIN32 +# ifdef _WINDLL +# define epicsShareExtern __declspec(dllexport) +# else +# define epicsShareExtern __declspec(dllimport) extern +# endif +# define epicsShareAPI __stdcall +#else +# define epicsShareAPI +# define epicsShareExtern extern +#endif + diff --git a/src/vxWorks/include/camacLib.h b/src/vxWorks/include/camacLib.h new file mode 100644 index 000000000..0a523c3f0 --- /dev/null +++ b/src/vxWorks/include/camacLib.h @@ -0,0 +1,74 @@ +/* camacLib.h -- Prototypes for camacLib.o + * + * Marty Wise + * 10/11/93 + * + * $Log$ + * Revision 1.1 1994/10/20 20:16:16 tang + * Commit adding of Camac Driver h file. + * + * Revision 1.4 94/05/11 13:52:57 13:52:57 wise (Marty Wise) + * Added low-level diagnostics + * + * Revision 1.3 94/03/27 10:52:29 10:52:29 wise (Marty Wise) + * *** empty log message *** + * + * Revision 1.1 93/11/05 06:39:35 06:39:35 wise (Marty Wise) + * Initial revision + * + * Revision 0.3 93/10/19 09:03:45 09:03:45 wise (Marty Wise) + * Added cssa and csmad + * + * Revision 0.2 93/10/12 07:33:01 07:33:01 wise (Marty Wise) + * cfubc working, cfmad working, almost ready for alpha release. + * + * Revision 0.1 93/10/11 10:31:48 10:31:48 wise (Marty Wise) + * Initial revision + * + * + * + */ + +static char ht2992_h_RCSID[] = "$Header$"; + +/********************************/ +/* GLOBAL DATA */ +/********************************/ +extern int debug_hook; + +extern struct glob_dat { + int total; + int read_error[5]; + int write_error[5]; + int cmd_error[5]; + int total_err; + int lam_count[12]; +} debug_dat; + + +/********************************/ +/* FUNCTION PROTOTYPES */ +/********************************/ + +void cdreg(int *ext, int b, int c, int n, int a); +void cfsa(int f, int ext, int *dat, int *q); +void cssa(int f, int ext, short *dat, int *q); +void ccci(int ext, int l); +void cccz(int ext); +void cccc(int ext); +void ccinit(int b); +void ctci(int ext, int *l); +void cgreg(int ext, int *b, int *c, int *n, int *a); +void cfmad(int f, int extb[2], int *intc, int cb[4]); +void cfubc(int f, int ext, int *intc, int cb[4]); +void cfubc(int f, int ext, int *intc, int cb[4]); +void csmad(int f, int extb[2], short *intc, int cb[4]); +void ctcd(int ext, int *l); +void cccd(int ext, int l); +void csga(int fa[], int exta[], unsigned short intc[], int qa[], int cb[4]); +void cfga(int fa[], int exta[], int intc[], int qa[], int cb[4]); +void cfubr(int f, int ext, int intc[], int cb[4]); +void csubc(int f, int ext, unsigned short *intc, int cb[4]); +void csubr(int f, int ext, int intc[], int cb[4]); +void print_reg(int ext); + diff --git a/src/vxWorks/include/module_types.h b/src/vxWorks/include/module_types.h new file mode 100644 index 000000000..a1cbe1d12 --- /dev/null +++ b/src/vxWorks/include/module_types.h @@ -0,0 +1,586 @@ +/* module_types.h */ +/* base/include $Id$ */ +/* + * Author: Bob Dalesio + * Date: 12-07-88 + * + * Experimental Physics and Industrial Control System (EPICS) + * + * Copyright 1991, the Regents of the University of California, + * and the University of Chicago Board of Governors. + * + * This software was produced under U.S. Government contracts: + * (W-7405-ENG-36) at the Los Alamos National Laboratory, + * and (W-31-109-ENG-38) at Argonne National Laboratory. + * + * Initial development by: + * The Controls and Automation Group (AT-8) + * Ground Test Accelerator + * Accelerator Technology Division + * Los Alamos National Laboratory + * + * Co-developed with + * The Controls and Computing Group + * Accelerator Systems Division + * Advanced Photon Source + * Argonne National Laboratory + * + * Modification Log: + * ----------------- + * .01 12-07-88 lrd moved IO_TYPES.H into here + * added interruptable indicator for each io card + * added arrays of pointers for info on the io cards + * .02 02-01-89 lrd add Allen-Bradley Modules + * rearrange I/O card order + * .03 02-04-89 lrd add bus specification + * + * .04 02-06-89 joh add timing int vec # + * .05 02-09-89 lrd move vectors and I/O card base addresses here + * .06 02-11-89 lrd changed AB num cards to 12 and OFE num chan to 4 + * .04 02-13-89 joh fixed length of timing address array + * .05 04-22-89 lrd changed AB num channels to 8 for ABBI cards + * .06 04-24-89 lrd moved AB 6008SV info here + * .07 05-26-89 joh added Joerger VTR1 transient recorder + * .08 09-13-89 lrd add VXI module specification to each type + * remove unused modules + * .09 09-25-89 lrd AB adapters to 8 cards to 16 and IFE channels to + * 8 + * .10 10-17-89 lrd AB changed number of cards from 12 to 16 for + * binary inputs and outputs + * .11 11-21-89 joh fixed card and chnl count for at5 vxi timing + * .12 11-30-89 lrd add the OMS 6 axis motor driver + * .13 12-12-89 joh moved XY220 base to match changes made by the + * hardware section. + * .14 05-16-90 cr add Single Ended IFE module + * .15 05-24-90 mk add 4-20Ma IFE + * .16 05-23-90 lrd/ms add DVX-2502 + * .17 07-19-90 ms changed the mizar interrupt vector to e8 + * wouldn't work with the CMC ethernet card + * used the same interrupt vector + * .18 12-19-90 lrd add 0-5V IFE + * .19 03-26-91 lrd modified the AT5-VXIBO from 16 to 32 + * .20 07-23-91 ges Add AT830X card base addresses and vectors. + * .21 08-14-91 ges Add AT830X_1 card base addresses and ivectors. + * (These are the new gen 8308B and 8309C cards) + * .22 06-24-92 joh added the hp E1368a VXI video switching module + * .23 06-25-92 bg stripped intitial 1 off the standard addresses + * in AB_BASE_ADDR,ai_memaddrs,wf_memaddrs,AT830X_ + * ADDRS, and AT830X_1_ADDRS so they can be mapped + in sysBusToLocalAdrs + * .24 06-25-92 bg stripped initial ff off all short addresses so + they can be mapped in sysBusToLocalAdrs + * .25 06-25-92 bg Moved SM_BASE_ADDR frin oms_driver.h to sm_addrs + in this file. + * .26 06-25-92 bg Moved dvx addresses,interrupt vectors,channel numbers + and card number definitions from dvx_driver.h to here. + + * .26 06-25-92 bg Moved dvx addresses,interrupt vectors,channel numbers + * .27 06-25-92 bg Added definitions for xy240_driver + * .28 06-25-92 bg Removed all reference to the Zio085 + * .29 06-26-92 bg Temporarily returned all reference to the Zio085 + * .30 06-26-92 joh added binary input capability to the hp E1368a + * VXI video switching module + * .31 06-30-92 joh added constant for the number of VXI LA + * .32 07-06-92 joh added base and size VXIA24 & A32 devices + * .33 07-07-92 joh added KSC V215 VXI AI + * .34 07-09-92 joh added AT8 FP10S master/slave fast + * protect module + * .35 07-10-92 joh added FP int vec base + * .36 07-17-92 bg moved addresses for Comet card from drvComet.c to + * here. + * .37 07-23-92 joh number of AI channels for AT5 VXI should be 8 not 6 + * number of BI channels for AT5 VXI should be 32 not 16 + * number of TI channels for AT5 VXI should be 10 not 5 + * (these changes reflect the AT5 hardware upgrade) + * + * .38 08-04-92 joh fixed COMET A16 base addr + * .39 08-10-92 joh number of xy220 cards now matches the AT8 + * address standard + * .40 08-11-92 joh moved xy010 base to here + * .41 08-11-92 joh took out xycom specific defines + * .42 09-15-92 joh DVX num cards was set allowing the DVX to + * overlap the VXI DC address and continue + * outside of VME A16. DVX num cards is now one + * .43 06-18-93 lrd reduced xy220 number of cards to 1 - mv167 mismatch on short address space + * .44 05-05-94 kornke Changed number of supported OMS cards. + */ + +#ifndef INCLmodule_typesh +#define INCLmodule_typesh + +/* Device module types */ +/* + * all devices have corresponding entries in ~operator/db/src/menus.c + * changes must be made in both areas to keep the database and drivers in sync + */ +/* & in comment indicates tested with card 0 */ +/* % in comment indicates tested with card other than card 0 */ +/* # in comment indicates that the Nth card has been tested */ +/* !! never been tested */ + +/* + * @# If any changes are made to this file, check the procedures + * ab_card, and vme_card in signallist.c, and get_address in sigmenu.c. + */ + +#ifdef MODULE_TYPES_INIT +#define MODULE_TYPES_DEF(MT_DEF_PARM) MT_DEF_PARM +#else +#define MODULE_TYPES_DEF(MT_DEF_PARM) extern MT_DEF_PARM; +#endif + +/* Number of columns used in io_report. */ +#define IOR_MAX_COLS 4 + +/* I/O types */ +#define IO_AI 0 +#define IO_AO 1 +#define IO_BI 2 +#define IO_BO 3 +#define IO_SM 4 +#define IO_WF 5 +#define IO_TIMER 6 +#define MAX_IO_TYPE IO_TIMER + +/* bus types */ +/* must correspond to the values in link types */ +/* these defines are in ~gta/dbcon/h/link.h */ + + +/* equates for the Allen-Bradley cards. */ +#define AB_BASE_ADDR 0xc00000 /* base addr of first AB6008SV */ +#define AB_MAX_LINKS 2 /* number of serial links from VME */ +#define AB_MAX_ADAPTERS 8 /* number of physical adapters on a link */ +#define AB_MAX_CARDS 16 /* max number of IO cards per adapter */ +#define AB_CARD_ADAPTER 16 /* cards per logical adapter */ +#define AB_CHAN_CARD 16 /* max channels per card */ + +/* analog inputs */ +#define AB1771IL 0 /* &% Allen-Bradley low level analog input */ +#define AB1771IFE 1 /* &% Allen-Bradley low level analog input */ +#define AB1771IXE 2 /* &% Allen-Bradley millivolt input */ +#define XY566SE 3 /* & Xycom 12-bit Single Ended Scanned*/ +#define XY566DI 4 /* &% Xycom 12-bit Differential Scanned */ +#define XY566DIL 5 /* &% Xycom 12-bit Differential Latched */ +#define VXI_AT5_AI 6 /* % AT-5 VXI module's Analog Inputs */ +#define AB1771IFE_SE 7 /* % A-B IFE in 16 single-ended input mode */ +#define AB1771IFE_4to20MA 8 /* % A-B IFE in 8 double-ended 4to20Ma */ +#define DVX2502 9 /* &% DVX_2502 128 chan 16 bit differential */ +#define AB1771IFE_0to5V 10 /* % A-B IFE in 8 double-ended 4to20Ma */ +#define KSCV215 11 /* % KSC V215 VXI 16 bit differential */ +#define AB1771IrPlatinum 12 /* % A-B RTD Platinum */ +#define AB1771IrCopper 13 /* % A-B RTD Copper */ +#define MAX_AI_TYPES AB1771IrCopper +MODULE_TYPES_DEF(short ai_num_cards[MAX_AI_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={12,12,12, 4, 4, 6,32,12,12, 1, 12, 32, 12,12}; +#endif +MODULE_TYPES_DEF(short ai_num_channels[MAX_AI_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 8, 8, 8,32,16,16, 8,16, 8, 127, 8, 32,6,6}; +#endif +MODULE_TYPES_DEF(short ai_interruptable[MAX_AI_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 0, 0,0,0}; +#endif +MODULE_TYPES_DEF(short ai_bus[MAX_AI_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 4, 4, 4, 2, 2, 2, 2, 4, 4, 2, 4, 2,4,4}; +#endif +MODULE_TYPES_DEF(unsigned short ai_addrs[MAX_AI_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 0,0,0,0x6000,0x7000,0xe000, 0xc014,0,0, 0xff00, 0, 0,0,0}; +#endif +MODULE_TYPES_DEF(long ai_memaddrs[MAX_AI_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={0,0,0,0x000000,0x040000,0x0c0000, 0,0,0, 0x100000, 0, 0,0,0}; +#endif + +/* analog outputs */ +#define AB1771OFE 0 /* &% Allen-Bradley 12 bit Analog Output */ +#define VMI4100 1 /* & VMIC VMIVME 4100 */ +#define ZIO085 2 /* & Ziomek 085 */ +#define VXI_AT5_AO 3 /* !! AT-5 VXI modules analog outputs */ +#define MAX_AO_TYPES VXI_AT5_AO +MODULE_TYPES_DEF(short ao_num_cards[MAX_AO_TYPES+1]) +#ifdef MODULE_TYPES_INIT + = {12, 4, 1, 32}; +#endif +MODULE_TYPES_DEF(short ao_num_channels[MAX_AO_TYPES+1]) +#ifdef MODULE_TYPES_INIT + = { 4, 16, 32, 16}; +#endif +MODULE_TYPES_DEF(short ao_interruptable[MAX_AO_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + = { 0, 0, 0, 1}; +#endif +MODULE_TYPES_DEF(short ao_bus[MAX_AO_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 4, 2, 2, 2}; +#endif +MODULE_TYPES_DEF(unsigned short ao_addrs[MAX_AO_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 0,0x4100,0x0800, 0xc000}; +#endif + +/* binary inputs */ +#define ABBI_08_BIT 0 /* &% Allen-Bradley generic Binary In 8 bit */ +#define ABBI_16_BIT 1 /* &% Allen-Bradley generic Binary In 16 bit */ +#define BB910 2 /* & BURR BROWN MPV 910 (relay) */ +#define XY210 3 /* &% XYcom 32 bit binary in */ +#define VXI_AT5_BI 4 /* !! AT-5 VXI modules binary inputs */ +#define HPE1368A_BI 5 /* !! HP E1368A video switch */ +#define AT8_FP10S_BI 6 /* !! AT8 FP10 slave fast protect */ +#define XY240_BI 7 /* !! Xycom 32 bit binary in / 32 bit binary out */ +#define MAX_BI_TYPES XY240_BI +MODULE_TYPES_DEF(short bi_num_cards[MAX_BI_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + ={ 12, 12, 4, 4, 32, 32, 8, 2}; +#endif +MODULE_TYPES_DEF(short bi_num_channels[MAX_BI_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + ={ 8, 16, 32, 32, 32, 16, 32, 32}; +#endif +MODULE_TYPES_DEF(short bi_interruptable[MAX_BI_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + ={ 1, 1, 0, 0, 1, 1, 1, 1}; +#endif +MODULE_TYPES_DEF(short bi_bus[MAX_BI_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 4, 4, 2, 2, 2, 2, 2, 2}; +#endif +MODULE_TYPES_DEF(unsigned short bi_addrs[MAX_BI_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 0,0,0xb800,0xa000, 0xc000, 0xc000, 0x0e00, 0xd000}; +#endif + +/* binary outputs */ +#define ABBO_08_BIT 0 /* &% Allen-Bradley 8 bit binary out */ +#define ABBO_16_BIT 1 /* &% Allen-Bradley 16 bit binary out */ +#define BB902 2 /* &% BURR BROWN MPV 902 (relay) */ +#define XY220 3 /* &% XYcom 32 bit binary out */ +#define VXI_AT5_BO 4 /* !! AT-5 VXI modules binary outputs */ +#define HPE1368A_BO 5 /* !! HP E1368A video switch */ +#define AT8_FP10M_BO 6 /* !! AT8 FP10 master fast protect */ +#define XY240_BO 7 /* !! Xycom 32 bit binary in / 32 bit binary out */ +#define MAX_BO_TYPES XY240_BO +MODULE_TYPES_DEF(short bo_num_cards[MAX_BO_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + ={12, 12, 4, 1, 32, 32, 2, 2}; +#endif +MODULE_TYPES_DEF(short bo_num_channels[MAX_BO_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + ={ 8, 16, 32, 32, 32, 16, 32, 32}; +#endif +MODULE_TYPES_DEF(short bo_interruptable[MAX_BO_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + ={ 0, 0, 0, 0, 1, 0, 0, 1 }; +#endif +MODULE_TYPES_DEF(short bo_bus[MAX_BO_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 4, 4, 2, 2, 2, 2, 2, 2 }; +#endif +MODULE_TYPES_DEF(unsigned short bo_addrs[MAX_BO_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 0,0,0xd800,0xc800, 0xc000, 0xc000, 0x0c00, 0xd000}; +#endif + +/* stepper motor drivers */ +#define CM57_83E 0 /* & Compumotor 57-83E motor controller */ +#define OMS_6AXIS 1 /* & OMS six axis motor controller */ +#define MAX_SM_TYPES OMS_6AXIS +MODULE_TYPES_DEF(short sm_num_cards[MAX_SM_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + ={ 8, 8 }; +#endif +MODULE_TYPES_DEF(short sm_num_channels[MAX_SM_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + = { 1, 8}; +#endif +MODULE_TYPES_DEF(short sm_interruptable[MAX_SM_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + = { 0, 0 }; +#endif +MODULE_TYPES_DEF(short sm_bus[MAX_SM_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 2, 2 }; +#endif +MODULE_TYPES_DEF(unsigned short sm_addrs[MAX_SM_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 0x8000, 0xfc00 }; +#endif + +/* waveforms */ +#define XY566WF 0 /* & Xycom 566 as a waveform */ +#define CAMAC_THING 1 /* !! CAMAC waveform digitizer */ +#define JGVTR1 2 /* & Joerger transient recorder */ +#define COMET 3 /* !! COMET transient recorder */ +#define MAX_WF_TYPES COMET +MODULE_TYPES_DEF(short wf_num_cards[MAX_WF_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + ={4, 4, 8, 4}; +#endif +MODULE_TYPES_DEF(short wf_num_channels[MAX_WF_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + ={1, 1, 1, 4}; +#endif +MODULE_TYPES_DEF(short wf_interruptable[MAX_WF_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + = {0, 0, 0, 0}; +#endif +MODULE_TYPES_DEF(short wf_bus[MAX_WF_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={2, 3, 2, 2}; +#endif +MODULE_TYPES_DEF(unsigned short wf_addrs[MAX_WF_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={0x9000, 0, 0xB000, 0xbc00}; +#endif +MODULE_TYPES_DEF(unsigned short wf_armaddrs[MAX_WF_TYPES+1]) +#ifdef MODULE_TYPES_INIT + = {0x5400, 0, 0, 0}; +#endif +MODULE_TYPES_DEF(long wf_memaddrs[MAX_WF_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={0x080000, 0, 0xb80000, 0xe0000000}; +#endif + + +/* timing cards */ +#define MZ8310 0 /* &% Mizar Timing Module */ +#define DG535 1 /* !! GPIB timing instrument */ +#define VXI_AT5_TIME 2 /* !! AT-5 VXI modules timing channels */ +#define MAX_TM_TYPES VXI_AT5_TIME +MODULE_TYPES_DEF(short tm_num_cards[MAX_TM_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + ={ 4, 1, 32 }; +#endif +MODULE_TYPES_DEF(short tm_num_channels[MAX_TM_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + ={10, 1, 10}; +#endif +MODULE_TYPES_DEF(short tm_interruptable[MAX_TM_TYPES+1] ) +#ifdef MODULE_TYPES_INIT + = { 1, 0, 1 }; +#endif +MODULE_TYPES_DEF(short tm_bus[MAX_TM_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={ 2, 5, 2 }; +#endif +MODULE_TYPES_DEF(unsigned short tm_addrs[MAX_TM_TYPES+1]) +#ifdef MODULE_TYPES_INIT + ={0xf800, 0, 0xc000 }; +#endif + +/* AT830X clock cards */ +MODULE_TYPES_DEF(long AT830X_1_addrs ) +#ifdef MODULE_TYPES_INIT + = 0x0400; +#endif +MODULE_TYPES_DEF(short AT830X_1_num_cards ) +#ifdef MODULE_TYPES_INIT + = 2; +#endif +MODULE_TYPES_DEF(long AT830X_addrs ) +#ifdef MODULE_TYPES_INIT + = 0xaa0000; +#endif +MODULE_TYPES_DEF(short AT830X_num_cards ) +#ifdef MODULE_TYPES_INIT + = 2; +#endif + +/* + * system controller cards. + * (driver looks for only one card) + */ +MODULE_TYPES_DEF(long xy010ScA16Base) +#ifdef MODULE_TYPES_INIT + = 0x0000; +#endif +/* + * limit the size of the VXI logical address space + * + * = + 0xc000 + * + * LA VME address + * 0 + * EPICS_VXI_LA_COUNT + (EPICS_VXI_LA_COUNT-1)*64 + */ +MODULE_TYPES_DEF(unsigned char EPICS_VXI_LA_COUNT) +#ifdef MODULE_TYPES_INIT + = 32; +#endif + +/* + * + * address ranges for VXI A24 and A32 devices + * + */ +MODULE_TYPES_DEF(char *EPICS_VXI_A24_BASE) +#ifdef MODULE_TYPES_INIT + = (char *) 0x900000; +#endif +MODULE_TYPES_DEF(unsigned long EPICS_VXI_A24_SIZE) +#ifdef MODULE_TYPES_INIT + = 0x100000; +#endif +MODULE_TYPES_DEF(char *EPICS_VXI_A32_BASE) +#ifdef MODULE_TYPES_INIT + = (char *) 0x90000000; +#endif +MODULE_TYPES_DEF(unsigned long EPICS_VXI_A32_SIZE) +#ifdef MODULE_TYPES_INIT + = 0x10000000; +#endif + + +/****************************************************************************** + * + * Interrupt vector locations used by the MV167 CPU board. + * These are defined in mv167.h + * + * PCC2_INT_VEC_BASE 0x40 PCC interrupt vector base number + * any multiple of 0x10 + * UTIL_INT_VEC_BASE0 0x50 VMEchip2 utility interrupt + * vector base number + * any multiple of 0x10 + * UTIL_INT_VEC_BASE1 0x60 VMEchip2 utility interrupt + * vector base number + * any multiple of 0x10 + * + * INT_VEC_CD2400_A 0x90 int vec for channel A + * INT_VEC_CD2400_B 0x94 int vec for channel B + * INT_VEC_CD2400_C 0x98 int vec for channel C + * INT_VEC_CD2400_D 0x9c int vec for channel D + * + * LANC_IRQ_LEVEL 3 LNANC IRQ level + * MPCC_IRQ_LEVEL 4 serial comm IRQ level + * SYS_CLK_LEVEL 6 interrupt level for sysClk + * AUX_CLK_LEVEL 5 interrupt level for auxClk + * SCSI_IRQ_LEVEL 2 scsi interrupt level + * + ******************************************************************************/ + +/* interrupt vector allocation - one for each XY566 DIL card */ +MODULE_TYPES_DEF(int AI566_VNUM) +#ifdef MODULE_TYPES_INIT + =0xf8; /* Xycom 566 Differential Latched */ +#endif + +/* interrupt vector allocation - one for each DVX card */ +MODULE_TYPES_DEF(int DVX_IVEC0) +#ifdef MODULE_TYPES_INIT + =0xd0; +#endif + +/* stepper motor interrupt vector - one for each motor */ +MODULE_TYPES_DEF(int MD_INT_BASE) +#ifdef MODULE_TYPES_INIT + =0xf0; /* base of the motor int vector */ +#endif + +/* I reserve from here up to num_cards * 4 interrupting chans/card - joh */ +MODULE_TYPES_DEF(int MZ8310_INT_VEC_BASE) +#ifdef MODULE_TYPES_INIT + =0xe8; +#endif + +/* Allen-Bradley Serial Driver - MAX_AB_LINKS number of vectors */ +MODULE_TYPES_DEF(int AB_VEC_BASE) +#ifdef MODULE_TYPES_INIT + =0x60; +#endif + +/* only one interrupt vector allocated for all Joerger VTR1 boards joh */ +MODULE_TYPES_DEF(int JGVTR1_INT_VEC) +#ifdef MODULE_TYPES_INIT + =0xe0; +#endif + +/* AT830X_1 cards have 1 intr vector for each AT830X_1_num_cards (presently 2) */ +MODULE_TYPES_DEF(int AT830X_1_IVEC0) +#ifdef MODULE_TYPES_INIT + =0xd4; +#endif + +/* AT830X cards have 1 intr vector for each AT830X_num_cards (presently 2) */ +MODULE_TYPES_DEF(int AT830X_IVEC0) +#ifdef MODULE_TYPES_INIT + =0xd6; +#endif + +/* AT8 fast protect interrupt vector base */ +MODULE_TYPES_DEF(int AT8FP_IVEC_BASE) +#ifdef MODULE_TYPES_INIT + =0xa2; +#endif + + +MODULE_TYPES_DEF(int AT8FPM_IVEC_BASE ) +#ifdef MODULE_TYPES_INIT + =0xaa; +#endif + + +/****************************************************************************** + * + * Addresses and IRQ information used by the XVME402 bitbus cards. + * + ******************************************************************************/ +MODULE_TYPES_DEF(unsigned short BB_SHORT_OFF ) +#ifdef MODULE_TYPES_INIT + = 0x1800; /* the first address of link 0's region */ +#endif +#define BB_NUM_LINKS 4 /* max number of BB ports allowed */ +MODULE_TYPES_DEF(int BB_IVEC_BASE ) +#ifdef MODULE_TYPES_INIT + = 0xa0; /* vectored interrupts (2 used for each link) */ +#endif +MODULE_TYPES_DEF(int BB_IRQ_LEVEL ) +#ifdef MODULE_TYPES_INIT + = 5; /* IRQ level */ +#endif + +/****************************************************************************** + * + * Information for the PEP modular Bitbus boards. + * + ******************************************************************************/ +MODULE_TYPES_DEF(unsigned short PEP_BB_SHORT_OFF ) +#ifdef MODULE_TYPES_INIT + = 0x1c00; +#endif +MODULE_TYPES_DEF(int PEP_BB_IVEC_BASE ) +#ifdef MODULE_TYPES_INIT + = 0xe8; +#endif + +/****************************************************************************** + * + * Addresses and IRQ information used by the NI1014 and NI1014D bitbus cards. + * + ******************************************************************************/ +MODULE_TYPES_DEF(unsigned short NIGPIB_SHORT_OFF) +#ifdef MODULE_TYPES_INIT + = 0x5000;/* First address of link 0's region */ +#endif + /* Each link uses 0x0200 bytes */ +#define NIGPIB_NUM_LINKS 4 /* Max number of NI GPIB ports allowed */ +MODULE_TYPES_DEF(int NIGPIB_IVEC_BASE ) +#ifdef MODULE_TYPES_INIT + = 100; /* Vectored interrupts (2 used for each link) */ +#endif +MODULE_TYPES_DEF(int NIGPIB_IRQ_LEVEL ) +#ifdef MODULE_TYPES_INIT + =5; /* IRQ level */ +#endif + +#if 0 /* JRW */ +#define NI1014_LINK_NUM_BASE 0 +#endif + +/* + * nothing after this endif + */ +#endif /*INCLmodule_typesh*/