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159 Commits

Author SHA1 Message Date
Erik Fröjdh
62488a8ce6 WIP 2025-10-29 09:19:28 +01:00
Erik Fröjdh
d3dc92b18b Using find_package(Threads REQUIRED) instead of linking pthread directly (#1324)
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* Linking to Threads::Threads instead of pthread directly 
* moved rt linking to slsSupportObject and only enable for linux
2025-10-27 16:30:40 +01:00
Erik Fröjdh
1d66f1d26d Experimental support for using the client on macOS (Darwin) (#1321)
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* shorter SHM names on macOS
* fix segfault on macOS when string is empty
* apple version of read exe path
* ifdef for linux specific API
* fixed test for shm and udp socket
* updated release notes
2025-10-22 15:19:36 +02:00
Erik Fröjdh
9d40220274 Disable building of shared libraries by default (#1320)
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* Disable building of shared libraries by default
2025-10-21 18:09:42 +02:00
Erik Fröjdh
41989836e7 added the deploy workflows for conda (#1301)
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2025-10-21 11:42:36 +02:00
Erik Fröjdh
db91f06c02 added option to use system zmq (#1318)
* added option to use system zmq
* added notes in release.txt
2025-10-21 11:15:51 +02:00
5041fd7fef Dev/xilinx set power (#1316)
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* ctb updates not in release notes

* xilinx power similar to ctb,except no vchip
2025-10-16 13:57:11 +02:00
Martin Mueller
d2560aa7f1 Merge pull request #1315 from slsdetectorgroup/bug/only_plot_one_adc
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2025-10-15 10:00:13 +02:00
13e648ce42 updated Release Notes 2025-10-14 19:37:31 +02:00
f9fdcca028 used incorrect indexing 2025-10-14 19:02:45 +02:00
3684f29e1a dev/xilinx_fifo_fix transceiver (#1313)
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* xilinx ctb: clean fifos in a stop command for transceivers, else always running

* refactor
2025-09-30 16:42:29 +02:00
9b411ffa25 Dev/dev doc (#1311)
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* changing title of page and heading

* fix the release in logo nav

* fixed index page
2025-09-25 13:31:29 +02:00
965f8ab9f2 xilinx: using kHz, mult factor is 1E-6 converting ns to kHz (previously MHz->1E-6) (#1309)
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2025-09-24 11:40:10 +02:00
Martin Mueller
2d8f93a426 ctb: add patternstart command, xilinx: fix frequency (#1307)
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* add patternstart command for CTB, block end of execution udp packets if pattern was started by patternstart command

* update docs

* Dhanya's comments

* more Dhanya comments

* refactored

* fixed tests for startpatttern, also clkfrequency not properly used in server

* xilinx: fixed setfrequency, tick clock (with sync clock), clkfrequency set from getfrequency to get the exact value

* xilinx freq in kHz, updated default values and prints

---------

Co-authored-by: Martin Mueller <martin.mueller@psi.ch>
Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
2025-09-23 12:13:46 +02:00
Martin Mueller
e7a91d38f2 Pattern unification & Matterhorn Changes (#1303)
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* update ctb regDefs, included fill level of adc, transceiver and DBit fifos, added enable registers for cont. readout

* fix fifo fill level range bug

* updated ctb RegDefs, increased size of fifo fill level register

* added register to read the firmware git hash

* ctb: added altchip_id read register

* start with unification of pattern machinery for xctb, ctb, mythen

* udate addrs for d-server internal matterhorn startup

* update xctb reg defs

* move pattern loopdef start

* added zero trimbits to matterhorn config

* Revert "added zero trimbits to matterhorn config"

This reverts commit 7c347badd5.

* added adjustable clocks on Xilinx-CTB

* added support for fractional dividers of runclk

* XCTB: make frequencies adjustable from python gui

* update docs

* added support for patternstart command to XCTB

* XCTB: map pattern_ram directly into memory, removed rw strobe

* refactor Mythen pattern control addresses

* test altera ctb with common addresses, removed ifdefs

* change ordering of regdefs

* updated python help for dbitclk, adcclk and runclk (khz)

* xilinx: moved the wait for firmware to measure the actual frequency to the server side and removed it in the pyctbgui side

* will not be anymore in developer branch

* make format (exception RegisterDefs.h), rewrite XILINX PLL to have less consstants in the code

* bug: mixing && for &

---------

Co-authored-by: Martin Mueller <martin.mueller@psi.ch>
Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
2025-09-17 17:28:17 +02:00
6e006665ef added check if reciever is running (#1201)
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* added check if reciever is running

* added some tests

* uups dummy test - deleted test file

* changed test

* stopped receiver

* some tests dont run

* added some more tests as they also affect fifo structure

* fixed tests to work with test_simualtor for all cmdcall tests

* minor

---------

Co-authored-by: mazzol_a <mazzol_a@pc17378.psi.ch>
Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
2025-09-12 16:13:28 +02:00
26846f7c33 updated release notes ref (#1299)
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2025-09-10 10:52:21 +02:00
5eb8fa07db reverted back that vthreshold dacs in m3 have min and max as 200 and 2400 (#1295)
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2025-09-09 17:36:46 +02:00
3387e22796 updated versioning in developer (#1293) 2025-09-09 17:26:18 +02:00
be3749f493 Dev/doc cmake (#1290)
* more detail documentation in installation

* more detail documentation in installation

* added links to api examples
2025-09-09 17:25:53 +02:00
c39bd98f2d change dac max values for vth values for m3 in client side (set module (#1291) 2025-09-09 15:38:36 +02:00
028bae82e9 Dev/verify shm 2 (#1292)
* userdetails refinedg

* fixed caller test
2025-09-09 15:35:14 +02:00
ddc44e1065 Merge pull request #1287 from slsdetectorgroup/dev/fix_m3_tests
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dev/fix_m3_tests
2025-09-08 15:14:43 +02:00
284472b48f testing clkdiv one must ensure the exptime delay etc all are reset to the exact values for tests 2025-09-08 10:12:36 +02:00
6e3acbdf79 Dev/fix actual tests (#1285)
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- fix acquire fail in tests (adcreg test)
- roi tests fail after overlapping invalid test and acquire after
- print udp dest mac in server properly
- fixed udp dst list get (server was not sending entry proper size to match proper struct size in client)
- updated server binaries and updated hard links in serverBin
- added documentation regarding gui:  zmqport and zmqip in terms of gui, rx_zmqstream
- removed print - probably ended there for debuggung

---------

Co-authored-by: Alice <alice.mazzoleni@psi.ch>
2025-09-04 10:44:32 +02:00
5b069d85a8 Dev/shm fix remove (#1279)
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* one doesnt need to open shared memory to call removesharedmemory, and calling hasMemoryvalid without opening will cause segfault (not used now, but could in the future)

* fix test on shm
2025-08-25 16:20:19 +02:00
9af571ea0e added image source files from draw.io to create the images (#1281)
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2025-08-25 11:11:57 +02:00
fff5fa73be Dev/verify shm (#1276)
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* removed verify, update, fixed getUser to be a free function, generated commands, python bindings yet to do

* python bindings

* fixed tests

* minor

* minor

* format
2025-08-23 10:23:27 +02:00
15cbaa509e Dev/shm free obsolete (#1274)
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* freeing obsolete shm withoua a 'isValid' should access raw pointers. Need to move this all into the shm class

* fixed obsolete shm free issue

* minor

* ensuring the test works platform independent for size of int
2025-08-21 14:32:15 +02:00
72056ff813 Dev/doc architecture commands (#1272)
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* wip for sw architecture

* wip:intro

* wip client wip

* documentation on architecutre is done. commands left

* wip. clientto module done

* almost done

* about 2nd port

* done

* review changes

* review fixes

* minor
2025-08-21 11:41:54 +02:00
776338a3d4 Dev/doc c standard (#1268)
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* updated c++11 to c++17

* more about c++11 and updating readme

* updated documentation for receiver arguments and also making receiver constructor explicit

* minor fix for rxr err message

* fixed doc about gcc version
2025-08-13 15:53:07 +02:00
89fe2a6329 fixed multi receiver and frames sync help throw of bad variant access (#1266)
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2025-08-12 11:40:16 +02:00
6b763797df fixed no interpolation mode for moench (#1263)
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Co-authored-by: Anna Bergamaschi <anna.bergamaschi@psi.ch>
2025-08-08 12:27:47 +02:00
92991de5a8 updating versions (#1258)
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2025-08-07 10:28:22 +02:00
efe6124675 Merge pull request #1257 from slsdetectorgroup/dev/fix_more_tests
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fix tests
2025-08-06 16:24:30 +02:00
292e057004 fix roi test 2025-08-05 16:54:35 +02:00
f468c20c57 Merge pull request #1256 from slsdetectorgroup/dev/tests_settingsdir_path
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dev/tests settingsdir relative path
2025-08-05 12:51:26 +02:00
975caaf813 removed relative path compared to where executable run in test script for settingsdir 2025-08-05 12:34:05 +02:00
db4a8b9db7 Merge pull request #1255 from slsdetectorgroup/dev/fix_tests
Dev/fix tests
2025-08-05 12:22:36 +02:00
595bf38605 made markers argument in ParseArguments a boolean instead of an int 2025-08-05 11:49:53 +02:00
d83e9385ed updated error message 2025-08-05 11:31:16 +02:00
8ca251bbb7 Merge branch 'developer' into dev/fix_tests 2025-08-05 11:30:09 +02:00
f594826e95 python accessing freed shared memory object (#1253)
* added a 'isValid' member in shared memory (also updated shm version) with default true, any access to shared memory() checks also for validity. any free will set this to false and then unmap shm. Any access to shm will then check validity in python.

* fixed tests for shm

* added tests in python as well

---------

Co-authored-by: Alice <alice.mazzoleni@psi.ch>
2025-08-05 11:26:49 +02:00
071b142b10 fixed ctb dbit clock changing period in tests as it was setting run clock instead
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2025-08-04 14:11:51 +02:00
956103bbd4 fixed imagesize ctb issue (out values not transferred, setting any dbit values was not recalculatign image size in generaldata) 2025-08-04 12:12:30 +02:00
f714aa22c5 Merge pull request #1250 from slsdetectorgroup/dev/doc_data_format
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Dev/doc data format
2025-07-30 17:55:09 +02:00
dff2be6cdc fixed merge conflict 2025-07-30 17:26:38 +02:00
35a7458657 detail explanation of eiger 2025-07-30 16:20:57 +02:00
6e92acceb2 minor
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2025-07-29 23:44:25 +02:00
69dc463b56 replacing commands with links 2025-07-29 23:32:54 +02:00
953e29a383 remove arguments info 2025-07-29 23:14:51 +02:00
3faa7097d3 more info 2025-07-29 23:10:10 +02:00
1eb401d65f added quad and updated about 1gbe/10gbe 2025-07-29 22:52:48 +02:00
6389692c16 Merge pull request #1252 from slsdetectorgroup/dev/python_expose_free
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dev/python_expose_free
2025-07-29 14:56:21 +02:00
d64ae91453 minimum change
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2025-07-29 14:33:32 +02:00
c8fc7fd6c1 free shm exposed in python as free function and detector function 2025-07-29 11:57:02 +02:00
21da221417 done
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2025-07-29 01:07:41 +02:00
aa20ceaac1 added moench
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2025-07-28 13:08:39 +02:00
6bebafa25a eiger doc done 2025-07-28 12:05:11 +02:00
ebabd37622 eiger basic mod
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2025-07-27 19:06:07 +02:00
55b62f4654 added dataformat for jungfrau 2025-07-27 15:29:30 +02:00
912cf0e671 remanants of PR
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2025-07-25 15:46:01 +02:00
ea01457e1d ifcfg scripts still work on rhel8, just not preferred 2025-07-25 15:44:25 +02:00
fc5d870583 troubleshooting doc: permanent changes for 10g pc tuning (#1247)
* doc: added inst on how to set persistentn NIC changes after reboot for each ethernet interface such as rx 4096, rx-usecs, adaptive-rx and gro etc.

* added permanent ethtool settings also for fedora or modern rhel
2025-07-25 15:43:25 +02:00
f74bc36984 added permanent ethtool settings also for fedora or modern rhel 2025-07-25 15:34:31 +02:00
92648bf5bb doc: added inst on how to set persistentn NIC changes after reboot for each ethernet interface such as rx 4096, rx-usecs, adaptive-rx and gro etc. 2025-07-25 12:21:41 +02:00
ee27f0bc1b readoutspeed in rx master file and other master file inconsistencies (#1245)
readout speed added to json and h5 master files.
Also fixed master file inconsistencies

Sserver binaries
- update server binaries because readoutspeed needs to be sent to receiver with rx_hostname command

API
- added const to Detector class set/getburstmode

Python
- updated python bindings (burstmode const and roi arguments)

Cmd generation
- added pragma once in Caller.in.h as Caller is included in test files

m3: num channels due to #counters < 3
* workaround for m3 for messed up num channels (client always assumes all counters enabled and adds them to num channels), fix for hdf5

g2: exptime master file inconsistency
- exptime didnt match because of round of when setting burst mode (sets to a different clk divider)
- so updating actual time for all timers (exptime, period, subexptime etc, )  in Module class, get timer values from detector when setting it and then send to receiver to write in master file

ctb image size incorrect:
-  write actual size into master file and not the reserved size (digital reduces depending on dbit list and dbit offset)
- added a calculate ctb image size free function in generalData.h that is used there as well as for the tests.


master file inconsistencies
- refactored master attributes writing using templates
-    names changed to keep it consistent between json and hdf5 master file (Version, Pixels, Exposure Times, GateDelays, Acquisition Period, etc.)
-  datatypes changed to keep it simple where possible: imageSize, dynamicRange, tengiga, quad, readnrows, analog, analogsamples, digital, digitalsamples, dbitreorder, dbitoffset, transceivermask, transeiver, transceiversamples, countermask, gates =>int
- replacing "toString" with arrays, objects etc for eg for scan, rois, etc.
- json header always written (empty dataset or empty brackets)
- hdf5 needs const char* so have to convert strings to it, but taking care that strings exist prior to push_back
- master attributes (redundant string literals->error prone

tests for master file
- suppressed deprecated functions in rapidjson warnings just for the tests
- added slsREceiverSoftware/src to allow access to receiver_defs.h to test binary/hdf5 version
- refactored acquire tests by moving all the acquire tests from individual detector type files to a single one=test-Caller-acquire.cpp
- set some default settings (loadBasicSettings) for a basic acquire at load config part for the test_simulator python scripts. so minimum number of settings for detector to be set for any acquire tests.
- added tests to test master files for json and hdf5= test-Caller-master-attributes.cpp
- added option to add '-m' markers for tests using test_simulator python script
2025-07-25 11:45:26 +02:00
047793766a Merge pull request #1167 from slsdetectorgroup/dev/multirxr_proper_cleanup_on_ctrlc
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Dev/multirxr proper cleanup on ctrl + c and versioning
2025-07-11 11:12:23 +02:00
d91585a39f Merge branch 'developer' into dev/multirxr_proper_cleanup_on_ctrlc 2025-07-11 10:56:00 +02:00
09709f0f96 moving set signal handler to network utils 2025-07-11 10:52:08 +02:00
2698087efa fixed validation in network_utils, added a tests to throw for port 65535 in test mode (option on for sls_use_tests), multi:parent process checks child process exit status to send sigint to others 2025-07-11 10:38:00 +02:00
1bf3d5e67a check status of child exiting and use that to send sigint to all the child processes from the parent
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2025-07-10 12:36:45 +02:00
fa508e0376 Merge pull request #1242 from slsdetectorgroup/dev/roi_per_port
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Roi per port
2025-07-10 11:29:01 +02:00
af51776eef minor test typo
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2025-07-09 17:20:46 +02:00
ef8d8a5fd2 raising a SIGINT when the child thread has an exception so that the parent thread can exit all the threads and clean up gracefully 2025-07-09 17:19:54 +02:00
d8ee0c2279 moved optstring and long options to the constructor 2025-07-09 15:02:12 +02:00
e1f8c4012f typo 2025-07-09 14:40:02 +02:00
d210b0956e hdf5 definitions in test when not compiled with hdf5
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2025-07-09 11:18:13 +02:00
3426ca9d32 Formatting 2025-07-09 10:44:23 +02:00
6b79fcc552 fixed help, -t for multi should not be supported as it never had it 2025-07-09 10:29:53 +02:00
e0aadbcc0f remove testing code, minor 2025-07-09 10:22:31 +02:00
767555c5cc unnecessary capture
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2025-07-08 17:58:38 +02:00
45f2dce3fc constexpr and checking if options object type is same 2025-07-08 17:55:49 +02:00
f0c6575a60 getuid issue on github workflow 2025-07-08 17:40:07 +02:00
2926904cf7 cleaning up properly , semaphore leaks, child process/thread throwing handled 2025-07-08 17:25:23 +02:00
fb4a25ecee fixed tests
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2025-07-08 15:20:28 +02:00
318b19ad79 wip test
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2025-07-07 17:36:40 +02:00
9a37cee4e9 made Commadnlineoptions into a class
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2025-07-07 14:52:01 +02:00
d18ea00b85 works, need to add tests 2025-07-07 12:20:40 +02:00
4ff29161d4 wip 2025-07-07 00:11:01 +02:00
e0810d973d refactored to take out repetitive code, need to adjust for slsMulti and slsFrameSync 2025-07-04 17:26:41 +02:00
1caf88858b minor comment
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2025-07-03 12:09:39 +02:00
396ef0a298 specified number of receiver error message
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2025-07-03 12:01:51 +02:00
c3012ec06c merge fix from developer 2025-07-03 11:59:35 +02:00
34002f5be0 command line help
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2025-07-03 11:51:01 +02:00
b1c6b4b078 pybind only 1 function for getRxROI 2025-07-03 11:42:24 +02:00
f9d41f1d66 to avoid confusion, moved default initialized, single sized declared vector of roi to be created at setDetectorType 2025-07-03 10:58:44 +02:00
94a9476550 formattin
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2025-07-02 19:44:44 +02:00
313fc75950 wip refactoring 2025-07-02 19:44:30 +02:00
66ee7954db refactoring wip 2025-07-02 19:38:42 +02:00
67042e8315 refactorign 2025-07-02 18:11:19 +02:00
3bc594862c fix merge formatting and refactoring
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2025-07-02 14:10:02 +02:00
6c4c60ca71 refactoring 2025-07-02 14:08:00 +02:00
92fd3f0609 modified comments about ctb and xilinx not using roi
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2025-07-01 17:34:40 +02:00
929e441dc6 refactor command line parsing of roi 2025-07-01 17:31:49 +02:00
a28c78c47f refactor cmd line 2025-07-01 17:13:59 +02:00
f8a06d78f3 refactor cmd parsing (detid can be parsed directly) 2025-07-01 17:00:59 +02:00
274a338520 redundant getRxROI in Detector class for multi level and module level 2025-07-01 16:58:27 +02:00
36ed20117d minor 2025-07-01 15:33:30 +02:00
cd06ea1e31 comment 2025-07-01 15:07:52 +02:00
98d0612314 doesnt happen anymore 2025-07-01 15:03:33 +02:00
e274524c55 minor 2025-07-01 14:55:40 +02:00
f42609b66f minor fixes in command line and help
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2025-07-01 12:30:41 +02:00
5def4bdfc4 cmd generation and formatting
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2025-06-30 17:31:22 +02:00
da3037a8ea updated master file versions 2025-06-30 16:38:54 +02:00
ba02094c4e updated python bindings 2025-06-30 14:43:17 +02:00
5d31d86b83 format
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2025-06-30 12:32:05 +02:00
cbd0aed8e5 gui shows roi now 2025-06-30 12:03:39 +02:00
b775dd0efa get rx_roi from metadata from rxr, cant reconstruct. fixed clear roi should give 1 roi min
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2025-06-29 18:56:07 +02:00
72bf1fa257 check master file creation as well in rx_roi tests 2025-06-29 17:09:30 +02:00
8e20d08af2 rois test work on 1d as well 2025-06-29 15:13:51 +02:00
856ca1e558 1d fixes
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2025-06-29 01:06:34 +02:00
25e4070168 wip to fix tests
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2025-06-27 17:37:15 +02:00
ca3311da4c works for all rois 2025-06-27 17:17:19 +02:00
3d4eaec178 wip, works for a single roi 2025-06-27 16:04:30 +02:00
91f33edcf8 works for complete roi 2025-06-27 15:18:05 +02:00
707bf023c6 wip, fails with master and virtual
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2025-06-25 16:42:33 +02:00
23f8981346 fix for eiger, added python test for testig roi in different module and detector type configurations 2025-06-25 13:41:47 +02:00
8f0c946393 wip: to map roi to virutal
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2025-06-24 17:30:59 +02:00
24fcfb3f9d fix for empty roi vectors (which shouldnt be) as you cant know if its all or not in roi 2025-06-24 17:05:40 +02:00
7258adfe15 wip 2025-06-24 14:29:19 +02:00
28792ea7e7 switched to vector instead of std::array<ROI, 2>>, which prints extra [-1, -1] when theres only 1 udp interface
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2025-06-24 09:39:28 +02:00
686eebd69b works for eiger as well 2025-06-23 21:31:52 +02:00
83482c8285 fixed rx_roi for multi modules jungfrau , tests for eiger, multi modules jungfrau in x and 2 interfaces 2025-06-23 20:01:32 +02:00
953c3f1587 minor
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2025-06-20 17:35:04 +02:00
230d43d1fe all tests pased 2025-06-20 17:34:26 +02:00
24f878a17b rois shoudl work. left to implement tests for individual rois, create multiple datasets (1 for each roi) in the virutal data file. currently virutal dataset with roi is not implemented and a warning is given instead. wonder why since the inviduviaual roi files are clipped 2025-06-20 17:20:19 +02:00
aac3f8904b can get individual rois, but not connected to command yet
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2025-06-18 17:55:20 +02:00
8dd9165078 first level test
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2025-06-18 13:56:14 +02:00
982383980f wip
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2025-06-17 17:15:12 +02:00
56aa96e9b5 wip to parse vector of rois at command line
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2025-06-17 00:00:50 +02:00
06f06cfbf4 wip 2025-06-16 22:13:35 +02:00
e97eae88bc Merge branch 'developer' into dev/roi_per_port 2025-06-16 22:12:02 +02:00
925176b661 formatting
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2025-06-16 22:10:44 +02:00
e4f329466c wip 2025-06-16 17:25:21 +02:00
d19fe8b66a Merge pull request #1239 from slsdetectorgroup/dev/wheels
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added workflow for python wheels
2025-06-13 17:13:07 +02:00
froejdh_e
f4345a91a1 added workflow for python wheels 2025-06-13 16:13:17 +02:00
ec67617e5c Dev/update test framesynchronizer (#1221)
* raise an exception if the pull socket python script had errors at startup (for eg if pyzmq was not installed)

* minor changes that got lost in the merge of automate_version_part 2 PR

---------

Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
2025-06-13 14:20:01 +02:00
Erik Fröjdh
bab6a5e9e1 added docs for SLSDETNAME (#1228)
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* added docs for SLSDETNAME

* clarification on hostname

* added examples on module index

* fixes

* fixed typo
2025-06-05 14:01:08 +02:00
Erik Fröjdh
f84454fbc1 tests for bool in ToString/StringTo (#1230)
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- Added tests for ToString/StringTo<bool>
- Added overload for ToString of bool (previously went through int)
2025-06-03 08:36:29 +02:00
ae19c1b102 commenting out the example in receiver data call back changing size as it affects users using debugging mode to print out headers
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Native CMake Build / Configure and build using cmake (push) Failing after 12s
2025-04-10 15:40:51 +02:00
6e6b1b64e4 Merge branch 'developer' into dev/multirxr_proper_cleanup_on_ctrlc 2025-04-10 15:39:53 +02:00
9d0ae22981 removed exit() in most places.. should just return EXIT_SUCCESS or failure instead of exiting, which was why the unique pointer needed a release (in this case, we removed pointer for consistency)
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CMake / Configure and build using cmake (push) Failing after 8s
2025-03-27 16:25:35 +01:00
ec3cfc1138 some checks for old command line style
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2025-03-21 10:24:24 +01:00
8ec0d37cc6 missed minor 2025-03-21 00:46:59 +01:00
c1406efec6 updated for framesynchronizer and added versions too 2025-03-21 00:43:14 +01:00
7844216812 proper clean up and versioning of command line arguments for receiver and multi receiver 2025-03-21 00:27:40 +01:00
89726ab3ff missed to commit 2025-03-20 13:42:38 +01:00
f313f602ba multireceiverapp: changed from pointer to destruct properly (or could have used reset() before exit but kept this for consistency with slsReceiver and slsFrameSynchronizer, added --version/ -v for slsMultiReciever and slsFramesynchronizer (in 10, could be done properly, got rid of unnecessary break after an exit in multireceiverapp, removed outdated f: command line option in slsReceiver used previously for config files, updated version print out to print binary in slsReceiver version command 2025-03-20 13:42:33 +01:00
205 changed files with 12460 additions and 5420 deletions

View File

@@ -21,9 +21,9 @@ jobs:
- name: Build library
run: |
mkdir build && cd build
cmake .. -DSLS_USE_PYTHON=ON -DSLS_USE_TESTS=ON
cmake .. -DSLS_USE_PYTHON=ON -DSLS_USE_TESTS=ON -DSLS_USE_SIMULATOR=ON
make -j 2
- name: C++ unit tests
working-directory: ${{gitea.workspace}}/build
run: ctest
run: ctest -j1 --rerun-failed --output-on-failure

View File

@@ -19,9 +19,9 @@ jobs:
- name: Build library
run: |
mkdir build && cd build
cmake .. -DSLS_USE_PYTHON=ON -DSLS_USE_TESTS=ON
cmake .. -DSLS_USE_PYTHON=ON -DSLS_USE_TESTS=ON -DSLS_USE_SIMULATOR=ON
make -j 2
- name: C++ unit tests
working-directory: ${{gitea.workspace}}/build
run: ctest
run: ctest -j1 --rerun-failed --output-on-failure

64
.github/workflows/build_wheel.yml vendored Normal file
View File

@@ -0,0 +1,64 @@
name: Build wheel
on:
workflow_dispatch:
pull_request:
push:
branches:
- main
release:
types:
- published
jobs:
build_wheels:
name: Build wheels on ${{ matrix.os }}
runs-on: ${{ matrix.os }}
strategy:
matrix:
os: [ubuntu-latest,]
steps:
- uses: actions/checkout@v4
- name: Build wheels
run: pipx run cibuildwheel==2.23.0
- uses: actions/upload-artifact@v4
with:
name: cibw-wheels-${{ matrix.os }}-${{ strategy.job-index }}
path: ./wheelhouse/*.whl
build_sdist:
name: Build source distribution
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v4
- name: Build sdist
run: pipx run build --sdist
- uses: actions/upload-artifact@v4
with:
name: cibw-sdist
path: dist/*.tar.gz
upload_pypi:
needs: [build_wheels, build_sdist]
runs-on: ubuntu-latest
environment: pypi
permissions:
id-token: write
if: github.event_name == 'release' && github.event.action == 'published'
# or, alternatively, upload to PyPI on every tag starting with 'v' (remove on: release above to use this)
# if: github.event_name == 'push' && startsWith(github.ref, 'refs/tags/v')
steps:
- uses: actions/download-artifact@v4
with:
# unpacks all CIBW artifacts into dist/
pattern: cibw-*
path: dist
merge-multiple: true
- uses: pypa/gh-action-pypi-publish@release/v1

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@@ -37,7 +37,7 @@ jobs:
- name: C++ unit tests
working-directory: ${{github.workspace}}/build
run: ctest -C ${{env.BUILD_TYPE}} -j1
run: ctest -C ${{env.BUILD_TYPE}} -j1 --rerun-failed --output-on-failure
- name: Python unit tests
working-directory: ${{github.workspace}}/build/bin

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@@ -0,0 +1,47 @@
name: Build and deploy slsdetlib
on:
release:
types:
- published
jobs:
build:
strategy:
fail-fast: false
matrix:
platform: [ubuntu-latest, ] # macos-12, windows-2019]
python-version: ["3.12",]
runs-on: ${{ matrix.platform }}
# The setup-miniconda action needs this to activate miniconda
defaults:
run:
shell: "bash -l {0}"
steps:
- uses: actions/checkout@v4
- name: Get conda
uses: conda-incubator/setup-miniconda@v3.0.4
with:
python-version: ${{ matrix.python-version }}
channels: conda-forge
- name: Prepare
run: conda install conda-build conda-verify pytest anaconda-client
- name: Enable upload
run: conda config --set anaconda_upload yes
- name: Build
env:
CONDA_TOKEN: ${{ secrets.CONDA_TOKEN }}
run: conda build conda-recipes/main-library --user slsdetectorgroup --token ${CONDA_TOKEN} --output-folder build_output
- name: Upload all Conda to github as artifacts
uses: actions/upload-artifact@v4
with:
name: conda-packages
path: build_output/** # Uploads all packages

View File

@@ -0,0 +1,47 @@
name: deploy slsdet
on:
release:
types:
- published
jobs:
build:
strategy:
fail-fast: false
matrix:
platform: [ubuntu-latest, ] # macos-12, windows-2019]
python-version: ["3.12",]
runs-on: ${{ matrix.platform }}
# The setup-miniconda action needs this to activate miniconda
defaults:
run:
shell: "bash -l {0}"
steps:
- uses: actions/checkout@v4
- name: Get conda
uses: conda-incubator/setup-miniconda@v3.0.4
with:
python-version: ${{ matrix.python-version }}
channels: conda-forge
- name: Prepare
run: conda install conda-build conda-verify pytest anaconda-client
- name: Enable upload
run: conda config --set anaconda_upload yes
- name: Build
env:
CONDA_TOKEN: ${{ secrets.CONDA_TOKEN }}
run: conda build conda-recipes/python-client --user slsdetectorgroup --token ${CONDA_TOKEN} --output-folder build_output
- name: Upload all Conda packages
uses: actions/upload-artifact@v4
with:
name: conda-packages
path: build_output/** # Uploads all packages

View File

@@ -24,6 +24,16 @@ include(cmake/SlsAddFlag.cmake)
include(cmake/helpers.cmake)
find_package(Threads REQUIRED)
# POSIX threads are required for the moment but we use CMake to find them
# Once migrated to std::thread this can be removed
if(NOT CMAKE_USE_PTHREADS_INIT)
message(FATAL_ERROR "A POSIX threads (pthread) implementation is required, but was not found.")
endif()
option(SLS_USE_SYSTEM_ZMQ "Use system installed libzmq" OFF)
# Using FetchContent to get libzmq
include(FetchContent)
@@ -50,51 +60,111 @@ if(NOT PATCH_EXECUTABLE)
message(FATAL_ERROR "The 'patch' tool is required for patching lib zeromq. Please install it.")
endif()
if(SLS_FETCH_ZMQ_FROM_GITHUB)
# Opt in to pull down a zmq version from github instead of
# using the bundled version
FetchContent_Declare(
libzmq
GIT_REPOSITORY https://github.com/zeromq/libzmq.git
GIT_TAG v${SLS_LIBZMQ_VERSION}
PATCH_COMMAND ${CMAKE_COMMAND} -E chdir <SOURCE_DIR> patch -p1 < ${CMAKE_CURRENT_SOURCE_DIR}/libs/libzmq/libzmq_cmake_version.patch
UPDATE_DISCONNECTED 1
)
if(SLS_USE_SYSTEM_ZMQ)
# find_package(ZeroMQ REQUIRED)
# 1) Try a CMake package config if available (vcpkg, Homebrew, source builds)
# Many installs export either ZeroMQ::libzmq or libzmq.
find_package(ZeroMQ QUIET CONFIG)
set(ZEROMQ_TARGET "")
if (TARGET ZeroMQ::libzmq)
set(ZEROMQ_TARGET ZeroMQ::libzmq)
message(STATUS "Found target: ${ZEROMQ_TARGET} version: ${ZeroMQ_VERSION}")
elseif (TARGET libzmq)
set(ZEROMQ_TARGET libzmq)
message(STATUS "Found target: ${ZEROMQ_TARGET} version: ${ZeroMQ_VERSION}")
elseif (TARGET ZeroMQ::ZeroMQ) # rare older naming
set(ZEROMQ_TARGET ZeroMQ::ZeroMQ)
message(STATUS "Found target: ${ZEROMQ_TARGET} version: ${ZeroMQ_VERSION}")
endif()
# 2) Fallback: use pkg-config hints + manual find_* to create an imported target
if (NOT ZEROMQ_TARGET)
find_package(PkgConfig QUIET)
if (PkgConfig_FOUND)
pkg_check_modules(PC_ZeroMQ QUIET libzmq)
endif()
find_path(ZEROMQ_INCLUDE_DIR
NAMES zmq.h
HINTS ${PC_ZeroMQ_INCLUDE_DIRS}
)
find_library(ZEROMQ_LIBRARY
NAMES zmq libzmq
HINTS ${PC_ZeroMQ_LIBRARY_DIRS}
)
if (ZEROMQ_INCLUDE_DIR AND ZEROMQ_LIBRARY)
add_library(libzmq UNKNOWN IMPORTED)
set_target_properties(libzmq PROPERTIES
IMPORTED_LOCATION "${ZEROMQ_LIBRARY}"
INTERFACE_INCLUDE_DIRECTORIES "${ZEROMQ_INCLUDE_DIR}"
)
set(ZEROMQ_TARGET libzmq)
endif()
message(STATUS "ZeroMQ version (pkg-config): ${PC_ZeroMQ_VERSION}")
endif()
# 3) Error out if still not found, with a helpful message
if (NOT ZEROMQ_TARGET)
message(FATAL_ERROR "ZeroMQ (libzmq) not found. Please install ZeroMQ development files.")
endif()
# Use it
# target_link_libraries(your_target PRIVATE ${ZEROMQ_TARGET})
message(STATUS "Using system installed libzmq: ${ZeroMQ_LIBRARIES}")
message(STATUS "ZeroMQ target: ${ZEROMQ_TARGET}")
message(STATUS "ZeroMQ include dirs: ${ZeroMQ_INCLUDE_DIRS}")
else()
# Standard behaviour use libzmq included in this repo (libs/libzmq)
FetchContent_Declare(
libzmq
URL ${CMAKE_CURRENT_SOURCE_DIR}/libs/libzmq/libzmq-${SLS_LIBZMQ_VERSION}.tar.gz
URL_HASH MD5=cc20b769ac10afa352e5ed2769bb23b3
PATCH_COMMAND ${CMAKE_COMMAND} -E chdir <SOURCE_DIR> patch -p1 < ${CMAKE_CURRENT_SOURCE_DIR}/libs/libzmq/libzmq_cmake_version.patch
UPDATE_DISCONNECTED 1
)
if(SLS_FETCH_ZMQ_FROM_GITHUB)
# Opt in to pull down a zmq version from github instead of
# using the bundled version
FetchContent_Declare(
libzmq
GIT_REPOSITORY https://github.com/zeromq/libzmq.git
GIT_TAG v${SLS_LIBZMQ_VERSION}
PATCH_COMMAND ${CMAKE_COMMAND} -E chdir <SOURCE_DIR> patch -p1 < ${CMAKE_CURRENT_SOURCE_DIR}/libs/libzmq/libzmq_cmake_version.patch
UPDATE_DISCONNECTED 1
)
else()
# Standard behaviour use libzmq included in this repo (libs/libzmq)
FetchContent_Declare(
libzmq
URL ${CMAKE_CURRENT_SOURCE_DIR}/libs/libzmq/libzmq-${SLS_LIBZMQ_VERSION}.tar.gz
URL_HASH MD5=cc20b769ac10afa352e5ed2769bb23b3
PATCH_COMMAND ${CMAKE_COMMAND} -E chdir <SOURCE_DIR> patch -p1 < ${CMAKE_CURRENT_SOURCE_DIR}/libs/libzmq/libzmq_cmake_version.patch
UPDATE_DISCONNECTED 1
)
endif()
# Disable unwanted options from libzmq
set(BUILD_TESTS OFF CACHE BOOL "Switch off libzmq test build")
set(BUILD_SHARED OFF CACHE BOOL "Switch off libzmq shared libs")
set(WITH_PERF_TOOL OFF CACHE BOOL "")
set(ENABLE_CPACK OFF CACHE BOOL "")
set(ENABLE_CLANG OFF CACHE BOOL "")
set(ENABLE_CURVE OFF CACHE BOOL "")
set(ENABLE_DRAFTS OFF CACHE BOOL "")
set(ENABLE_PRECOMPILED OFF CACHE BOOL "")
set(WITH_DOC OFF CACHE BOOL "")
set(WITH_DOCS OFF CACHE BOOL "")
# Using GetProperties and Populate to be able to exclude zmq
# from install (not possible with FetchContent_MakeAvailable(libzmq))
FetchContent_GetProperties(libzmq)
if(NOT libzmq_POPULATED)
FetchContent_Populate(libzmq)
add_subdirectory(${libzmq_SOURCE_DIR} ${libzmq_BINARY_DIR} EXCLUDE_FROM_ALL)
endif()
endif()
# Disable unwanted options from libzmq
set(BUILD_TESTS OFF CACHE BOOL "Switch off libzmq test build")
set(BUILD_SHARED OFF CACHE BOOL "Switch off libzmq shared libs")
set(WITH_PERF_TOOL OFF CACHE BOOL "")
set(ENABLE_CPACK OFF CACHE BOOL "")
set(ENABLE_CLANG OFF CACHE BOOL "")
set(ENABLE_CURVE OFF CACHE BOOL "")
set(ENABLE_DRAFTS OFF CACHE BOOL "")
set(ENABLE_PRECOMPILED OFF CACHE BOOL "")
set(WITH_DOC OFF CACHE BOOL "")
set(WITH_DOCS OFF CACHE BOOL "")
# Using GetProperties and Populate to be able to exclude zmq
# from install (not possible with FetchContent_MakeAvailable(libzmq))
FetchContent_GetProperties(libzmq)
if(NOT libzmq_POPULATED)
FetchContent_Populate(libzmq)
add_subdirectory(${libzmq_SOURCE_DIR} ${libzmq_BINARY_DIR} EXCLUDE_FROM_ALL)
endif()
include(GNUInstallDirs)
# If conda build, always set lib dir to 'lib'
@@ -122,7 +192,7 @@ endif()
option(SLS_USE_HDF5 "HDF5 File format" OFF)
option(SLS_BUILD_SHARED_LIBRARIES "Build shared libaries" ON)
option(SLS_BUILD_SHARED_LIBRARIES "Build shared libaries" OFF)
option(SLS_USE_TEXTCLIENT "Text Client" ON)
option(SLS_USE_DETECTOR "Detector libs" ON)
option(SLS_USE_RECEIVER "Receiver" ON)
@@ -271,6 +341,9 @@ if (NOT TARGET slsProjectCSettings)
-Wno-format-truncation
)
sls_disable_c_warning("-Wstringop-truncation")
target_link_libraries(slsProjectCSettings INTERFACE
Threads::Threads
)
endif()

View File

@@ -1,24 +1,33 @@
## Dependencies
Before building from source make sure that you have the [software wiki](https://slsdetectorgroup.github.io/devdoc/dependencies.html) installed. If installing using conda, conda will manage the dependencies. Avoid also installing packages with pip.
Before building from source make sure that you have the [dependencies](https://slsdetectorgroup.github.io/devdoc/dependencies.html) installed. If installing using conda, conda will manage the dependencies. Avoid also installing dependency packages with pip.
## Documentaion
Detailed documentation including installation can be found in the [software wiki](https://slsdetectorgroup.github.io/devdoc/index.html).
Different releases can be found on the [official site](https://www.psi.ch/en/lxn/software-releases).
List of releases can be found on the [official site](https://www.psi.ch/en/lxn/software-releases).
Firmware compatiblity can be found in [firmware page](https://github.com/slsdetectorgroup/slsDetectorFirmware)
## Installation
### 1. Install binaries using conda
The slsDetectorPackage provides core detector software implemented in C++, along with Python bindings packaged as the slsdet Python extension module. Choose the option that best fits your environment and use case.
1. **Install pre-built binaries using conda (Recommended)**: Install pre-built binaries for the C++ client, receiver, GUI and the Python API (`slsdet`), simplifying setup across platforms.
2. **Pip**: Install only the Python extension module, either by downloading the pre-built library from PyPI or by building the extension locally from source. Available only from v9.2.0 onwards.
3. **Build from source**: Compile the entire package yourself, including both the C++ core and the Python bindings, for maximum control and customization. However, make sure that you have the dependencies installed. If installing using conda, conda will manage the dependencies. Avoid installing packages with pip and conda simultaneously.
### 1. Install pre-built binaries using conda (Recommended)
Conda is not only useful to manage python environments but can also
be used as a user space package manager. Dates in the tag (for eg. 2020.07.23.dev0)
are from the developer branch. Please use released tags for stability.
We have three different packages available:
* **slsdetlib** shared libraries and command line utilities
* **slsdetlib** Shared libraries and command line utilities
* **slsdetgui** GUI
* **slsdet** Python bindings
* **moenchzmq** Moench
```
#Add channels for dependencies and our library
@@ -44,11 +53,26 @@ conda search slsdetlib
conda search slsdet
# gui
conda search slsdetgui
# moench
conda search moenchzmq
```
## 2. Build from source
## 2. Pip
The Python extension module `slsdet` can be installed using pip. This is available from v9.2.0 onwards.
### 2.1 Download Source Code from github
```
#Install the Python extension module from PyPI
pip install slsdet
# or install the python extension locally from source
git clone https://github.com/slsdetectorgroup/slsDetectorPackage.git --branch 9.2.0
cd slsDetectorPackage
pip install .
```
## 3. Build from source
### 3.1. Download Source Code from github
```
git clone https://github.com/slsdetectorgroup/slsDetectorPackage.git --branch 7.0.0
```
@@ -56,10 +80,11 @@ git clone https://github.com/slsdetectorgroup/slsDetectorPackage.git --branch 7.
> **Note:** For v6.x.x of slsDetectorPackage and older, refer [pybind11 notes on cloning](#Pybind-and-Zeromq).
### 2.2 Build from source
### 3.2. Build from source
One can either build using cmake or use the in-built cmk.sh script.
### Build using CMake
### 3.2.1. Build using CMake
```
# outside slsDetecorPackage folder
@@ -99,7 +124,7 @@ ccmake ..
> **Note:** For v7.x.x of slsDetectorPackage and older, refer [zeromq notes for cmake option to hint library location](#Pybind-and-Zeromq).
### Build using in-built cmk.sh script
### 3.2.2. Build using in-built cmk.sh script
```
The binaries are generated in slsDetectorPackage/build/bin directory.
@@ -144,9 +169,9 @@ Usage: $0 [-b] [-c] [-d <HDF5 directory>] [-e] [-g] [-h] [-i]
> **Note:** For v7.x.x of slsDetectorPackage and older, refer [zeromq notes for cmk script option to hint library location](#Pybind-and-Zeromq).
### Build on old distributions
### 3.3. Build on old distributions using conda
If your linux distribution doesn't come with a C++11 compiler (gcc>4.8) then
If your linux distribution doesn't come with a C++17 compiler (gcc>8) then
it's possible to install a newer gcc using conda and build the slsDetectorPackage
using this compiler
@@ -164,7 +189,7 @@ make -j12
> **Note:** For v7.x.x of slsDetectorPackage and older, refer [zeromq notes for dependencies for conda](#Pybind-and-Zeromq).
### Build slsDetectorGui (Qt5)
### 3.4. Build slsDetectorGui (Qt5)
1. Using pre-built binary on conda
```
@@ -215,7 +240,7 @@ cd slsDetectorPackage
> **Note:** For v7.x.x of slsDetectorPackage and older, refer [zeromq notes for dependencies for conda](#Pybind-and-Zeromq).
### Build documentation from package
### 3.5. Build documentation from package
The documentation for the slsDetectorPackage is build using a combination
of Doxygen, Sphinx and Breathe. The easiest way to install the dependencies
is to use conda
@@ -236,7 +261,7 @@ make rst # rst only, saves time in case the API did not change
## Pybind and Zeromq
## 4. Pybind and Zeromq
### Pybind11 for Python
**v8.0.0+**:
@@ -278,4 +303,5 @@ zeromq-devel must be installed and one can hint its location using
## Support
dhanya.thattil@psi.ch
erik.frojdh@psi.ch
erik.frojdh@psi.ch
alice.mazzoleni@psi.ch

View File

@@ -23,23 +23,27 @@ This document describes the differences between vx.x.x and vx.0.2
1 New, Changed or Resolved Features
=====================================
Building shared libraries is disabled by default. If you need to link
against any of the libSls*.so libraries, you can enable this by passing
-DSLS_BUILD_SHARED_LIBRARIES=ON to CMake.
Added SLS_USE_SYSTEM_ZMQ option (default OFF) to use the libzmq of the host
instead of the one included in our repo.
Experimental support for building the detector client (including python bindings) on macOS
2 On-board Detector Server Compatibility
==========================================
Eiger 9.0.0
Jungfrau 9.0.0
Mythen3 9.0.0
Gotthard2 9.0.0
Moench 9.0.0
Eiger 10.0.0
Jungfrau 10.0.0
Mythen3 10.0.0
Gotthard2 10.0.0
Moench 10.0.0
On-board Detector Server Upgrade
@@ -62,17 +66,16 @@ This document describes the differences between vx.x.x and vx.0.2
3 Firmware Requirements
========================
Eiger 02.10.2023 (v32) (updated in 7.0.3)
Jungfrau 20.09.2023 (v1.5, HW v1.0) (updated in 8.0.0)
21.09.2023 (v2.5, HW v2.0) (updated in 8.0.0)
Jungfrau 09.02.2025 (v1.6, HW v1.0) (updated in 9.1.0)
08.02.2025 (v2.6, HW v2.0) (updated in 9.1.0)
Mythen3 11.10.2024 (v1.5) (updated in 9.0.0)
Mythen3 13.11.2024 (v2.0) (updated in 9.0.0)
Gotthard2 03.10.2024 (v1.0) (updated in 9.0.0)
Moench 26.10.2023 (v2.0) (updated in 9.0.0)
Moench 26.10.2023 (v2.0) (updated in 8.0.2)
Detector Upgrade
@@ -148,7 +151,7 @@ This document describes the differences between vx.x.x and vx.0.2
Quick Start Guide:
https://slsdetectorgroup.github.io/devdoc/quick_start_guide.html
Firmware Upgrade:
https://slsdetectorgroup.github.io/devdoc/firmware.html
@@ -161,6 +164,15 @@ This document describes the differences between vx.x.x and vx.0.2
Consuming slsDetectorPackage:
https://slsdetectorgroup.github.io/devdoc/consuming.html
Software Architecture
https://slsdetectorgroup.github.io/devdoc/softwarearchitecture.html
Set up commands in config file
https://slsdetectorgroup.github.io/devdoc/configcommands.html
Image Size and Output Characteristics
https://slsdetectorgroup.github.io/devdoc/dataformat.html
API Examples:
https://github.com/slsdetectorgroup/api-examples
@@ -187,6 +199,14 @@ This document describes the differences between vx.x.x and vx.0.2
https://slsdetectorgroup.github.io/devdoc/udpheader.html
https://slsdetectorgroup.github.io/devdoc/udpdetspec.html
Output Data:
https://slsdetectorgroup.github.io/devdoc/dataformat.html
https://slsdetectorgroup.github.io/devdoc/fileformat.html
https://slsdetectorgroup.github.io/devdoc/slsreceiverheaderformat.html
https://slsdetectorgroup.github.io/devdoc/masterfileattributes.html
https://slsdetectorgroup.github.io/devdoc/binaryfileformat.html
https://slsdetectorgroup.github.io/devdoc/hdf5fileformat.html
slsReceiver Zmq Format:
https://slsdetectorgroup.github.io/devdoc/slsreceiver.html#zmq-json-header-format
@@ -206,3 +226,4 @@ This document describes the differences between vx.x.x and vx.0.2
dhanya.thattil@psi.ch
erik.frojdh@psi.ch
alice.mazzoleni@psi.ch

View File

@@ -19,6 +19,7 @@ cmake .. -G Ninja \
-DSLS_USE_PYTHON=OFF \
-DCMAKE_BUILD_TYPE=Release \
-DSLS_USE_HDF5=OFF \
-DSLS_USE_SYSTEM_ZMQ=ON \
NCORES=$(getconf _NPROCESSORS_ONLN)
echo "Building using: ${NCORES} cores"

View File

@@ -29,6 +29,7 @@ requirements:
- libtiff
- zlib
- expat
- zeromq
run:
- libstdcxx-ng

View File

@@ -42,6 +42,7 @@ set(SPHINX_SOURCE_FILES
src/pyexamples.rst
src/pyPatternGenerator.rst
src/servers.rst
src/multidet.rst
src/receiver_api.rst
src/result.rst
src/type_traits.rst
@@ -66,6 +67,9 @@ set(SPHINX_SOURCE_FILES
src/binaryfileformat.rst
src/hdf5fileformat.rst
src/zmqjsonheaderformat.rst
src/dataformat.rst
src/softwarearchitecture.rst
src/configcommands.rst
)
foreach(filename ${SPHINX_SOURCE_FILES})
@@ -83,11 +87,16 @@ configure_file(
"${SPHINX_BUILD}/gen_server_doc.py"
@ONLY)
configure_file(
configure_file(
"${CMAKE_CURRENT_SOURCE_DIR}/static/extra.css"
"${SPHINX_BUILD}/static/css/extra.css"
@ONLY)
file(COPY ${CMAKE_CURRENT_SOURCE_DIR}/src/images
DESTINATION ${SPHINX_BUILD}/src)
add_custom_target(server_rst python gen_server_doc.py)
add_custom_target(docs

View File

@@ -20,7 +20,7 @@ print(sys.path)
# -- Project information -----------------------------------------------------
project = 'slsDetectorPackage'
project = 'slsDetectorPackage @PROJECT_VERSION@'
copyright = '2020, PSD Detector Group'
author = 'PSD Detector Group'
version = '@PROJECT_VERSION@'

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,787 @@
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@@ -1,3 +1,5 @@
.. _binary file format:
Binary File Format
====================
@@ -31,6 +33,7 @@ Data File
* Each frame includes a :ref:`**sls_receiver_header** <sls receiver header format>` structure, followed by the actual frame data.
* More details on :ref:`slsReceiverHeader<sls receiver header format>` and the actual image data is described in the :ref:`Detector Image Size and Format <data format>` section.
.. _json master file examples:

View File

@@ -6,6 +6,8 @@ Usage
The syntax is *'[detector index]-[module index]:[command]'*, where the indices are by default '0', when not specified.
.. _cl-module-index-label:
Module index
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Modules are indexed based on their order in the hostname command. They are used to configure a specific module within a detector and are followed by a ':' in syntax.

242
docs/src/configcommands.rst Normal file
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@@ -0,0 +1,242 @@
.. _setup commands:
Setup Commands
================================
Introduction
-------------
To connect to any device, one needs a unique combination of **IP address** (which identifies the device) and **port number** (which specifies the service).
This package typically deals with two types of network interfaces:
* **1 GbE public interface** - Accessible from anywhere on the network. Connectivity can be verified by pinging this interface from any PC.
* **10 GbE private interface** - Dedicated to high-speed data transfer with a specific PC. In addition to the 1 GbE public interface (MTU 1500), the device may include one or more private 10 GbE interfaces (MTU 9000), which are not accessible from other machines.
Client to Module
-----------------
.. figure:: images/Client_module_commands.png
:target: _images/Client_module_commands.png
:width: 700px
:align: center
:alt: Client Module Commands
Client Module TCP Commands
The client configures and controls modules via the 1 GbE public TCP interface.
* Should be able to ping the module's hostname from any PC on the network.
* If one cannot ping, ensure that it is powered on.
* If the command cannot connect to the port (`hostname command <commandline.html#term-hostname>`_ failed), the onboard servers may not have started yet.
Each physical module has its own unique IP address. As the IPs are already different, all modules can share the same default ports:
* 1952 - Default Module TCP Control Port
* 1953 - Default Module TCP Stop port
.. code-block:: bash
# Therefore, one can use
hostname bchip100+bchip101+
# instead of
hostname bchip100:1952+bchip101:1954+
**Simulators**, however, usually run on the same PC. See `virtual servers <https://slsdetectorgroup.github.io/devdoc/virtualserver.html>`_ for more details. In that case, each instance must use a different port. By incrementing port numbers, you can also use the virtual command for convenience.
.. code-block:: bash
# Therefore, one can use
virtual 2 1952
# instead of
hostname localhost:1952+localhost:1954+
Client to Receiver
--------------------
.. figure:: images/Client_receiver_commands.png
:target: _images/Client_receiver_commands.png
:align: center
:alt: Client Receiver Commands
Client Receiver TCP Commands
Each module has a receiver, which can be either local or remote.
The client can configure and control receivers via the 1 GbE public TCP interface:
* Should be able to ping the receiver's hostname from any PC on the network.
* If one cannot ping, ensure that it is powered on.
* If the command cannot connect to the port (`rx_hostname command <commandline.html#term-rx_hostname-hostname-or-ip-address>`_ failed), the receivers may not have started yet.
Since multiple receiver processes typically run on the same PC, they share the same IP. Here, each receiver process must use a different TCP port for a unique connection.
* 1954 - Default Receiver TCP port
Configuring the receiver with the command `rx_hostname command <commandline.html#term-rx_hostname-hostname-or-ip-address>`_, sets up a receiver for every module in shared memory automatically ie. every module's receiver TCP port will automatically increment in shared memory. The starting port is defined by the command `rx_tcpport <commandline.html#term-rx_tcpport-port>`_ with the default being 1954.
A multi-module command (without colon or module index) sets incremental ports starting from the specified port number.
.. code-block:: bash
hostname bchip100+bchip101+bchip102+bchip103+
rx_tcport 2000 # sets the receiver port to 2000, 2001, 2002, 2003
For example, using default TCP ports (1954, 1955):
.. code-block:: bash
hostname bchip100+bchip101+
rx_hostname localhost
# Equivalent to:
rx_hostname localhost:1954+localhost:1955+
# or set to another set of ports (automatically incremented)
rx_tcpport 1984
rx_hostname localhost
# instead of
rx_hostname localhost:1984+localhost:1985+
Module to Receiver
-------------------
.. figure:: images/Module_receiver_commands.png
:target: _images/Module_receiver_commands.png
:align: center
:alt: Module Receiver Commands
Module Receiver UDP Commands
**10GbE Interface**
The module typically sends images to the receiver via a 10 GbE private interface on the receiver PC, which has an MTU of 9000 to support jumbo packets. The private interface is not reachable from other machines, so it cannot be pinged from anywhere.
**Multiple UDP Packets**
Images are split into UDP packets for transmission. Unlike TCP, UDP is connectionless and does not guarantee delivery. Therefore, the receiver PC must be tuned for reliable reception. See `Troubleshooting <https://slsdetectorgroup.github.io/devdoc/troubleshooting.html>`_.
**UDP Configuration**
Unlike TCP, the module (hardware) requires explicit configuration for sending images via UDP, including:
* Source and destination IPs
* Source and destination MAC addresses
* Source and destination ports
**UDP Destination**
Info on where to send the image from the module to.
**UDP Desination IP** - The IP of the receiver PC's 10 GbE interface, usually found via ``ifconfig``. Command: `udp_dstip <commandline.html#term-udp_dstip-x.x.x.x-or-auto>`_. For 1GbE interface and for this command, one can use 'auto' as an argument, which will pick up the IP from the `rx_hostname command <commandline.html#term-rx_hostname-hostname-or-ip-address>`_.
**UDP desintation MAC** - Also obtained from the interface using ``ifconfig``. For built-in receivers, the module configures this automatically from the ``UDP destination IP``. For custom receivers, it must be explicitly provided. Command: `udp_dstmac <commandline.html#term-udp_dstmac-x-x-x-x-x-x>`_
**UDP destination port** - Ensure uniqueness if multiple users share the interface. Command: `udp_dstport <commandline.html#term-udp_dstport-n>`_
* 50001 - Default Receiver UDP port
**UDP Source**
As it is a one-way communication (module to receiver with no reply or acknowledgements), info on the source of the image is more for debugging purposes and prevent packet rejection.
**UDP source IP** - Must be on the same subnet as the destination IP (same first three octets) to prevent packet rejection by the receiver interface. For 1GbE interface and for this command (except for Eiger), one can use ``auto`` as an argument, which will pick up the IP from the `hostname command <commandline.html#term-hostname>`_. Command: `udp_srcip <commandline.html#term-udp_srcip-x.x.x.x-or-auto>`_
.. code-block:: bash
# 10 GbE interface
hostname bchip100
udp_dstip 10.0.2.1
udp_srcip 10.0.2.19
rx_hostname localhost
# 1 GbE interface
hostname bchip100
rx_hostname localhost
udp_dstip auto # this command uses IP from rx_hostname. So, it comes after.
udp_srcip auto # this command uses IP from hostname
**UDP source MAC** - By default, it is set to ``aa:bb:cc:dd:xx:yy`` where ``xx`` and ``yy`` are module row and column indices to differentiate the modules while debugging. Command: `udp_srcmac <commandline.html#term-udp_srcmac-x-x-x-x-x-x>`_
**UDP source port** - This is hardcoded in every module to the same value in the detector server and cannot be changed.
Note: If there is a second UDP port on the module, use 'udp_dstport2' or 'udp_dstip2'etc. See `here <https://slsdetectorgroup.github.io/devdoc/dataformat.html>`_ for more detector specific info.
Receiver to GUI
-----------------
.. figure:: images/Receiver_gui_commands.png
:target: _images/Receiver_gui_commands.png
:align: center
:alt: Receiver GUI Commands
Receiver GUI Commands
Enabling the GUI automatically streams images from the receiver via ZMQ sockets. Even without the GUI, streaming can be activated explicitly using the command `rx_zmqstream <commandline.html#term-rx_zmqstream-0-1>`_. ZMQ streaming uses TCP/IP, so the ports must be configured appropriately.
**Receiver ZMQ Port** - Port from which the receiver streams ZMQ packets. Command: `rx_zmqport <commandline.html#term-rx_zmqport-port>`_
* 30001 - Default Receiver ZMQ Port (stream out from)
**Client ZMQ Port** - Port that the client ZMQ socket listens to. Command: `zmqport <commandline.html#term-zmqport-port>`_
* 30001 - Default Client ZMQ Port (listens to)
**Client ZMQ IP** - IP address the client ZMQ socket listens to. Command: `zmqip <commandline.html#term-zmqip-x.x.x.x>`_. By default, this is set to the IP of ``rx_hostname``, but can be set to any IP address that the client can reach.
* Default: Receivers hostname (rx_hostname)
.. note ::
``zmqport`` and ``zmqip`` need to be set up in shared memory before starting up the Gui. If the Gui is already running, change it in the Advanced Tab directly in the Gui.
``rx_zmqstream`` is set to 1 when the GUI is started, but has to be manually set back to 0 to disable zmq streaming in the receiver for better performance when not using the Gui.
The GUI hwm (high water mark, which is like a measurement of the number of enqueued zmq packets) values are set to a low number (from library default of possibly 1000 to 2) to reduce the zmq buffer to display only some of the images. Resetting it back to -1 or 1000 should only matter if one plans to not use the Gui and still zmq stream without wanting to drop zmq images (eg. for external processing chain).
Receiver to External Processing
--------------------------------
.. figure:: images/Receiver_external_process_commands.png
:target: _images/Receiver_external_process_commands.png
:align: center
:alt: Click to zoom
Receiver External Process Commands
Images from the receiver can also be streamed to an external processing chain for further processing or storage. In this setup:
* The external processor listens to the ZMQ ports and IPs that the receiver streams from.
* The client ZMQ sockets now listen to the ports and IPs that the external processor streams from instead of the receiver.
**Receiver ZMQ Port** - Port from which the receiver streams ZMQ packets. Command: `rx_zmqport <commandline.html#term-rx_zmqport-port>`_
* 30001 - Default Receiver ZMQ Port (stream out from)
**Client ZMQ Port** - Port that the client ZMQ socket listens to. Command: `zmqport <commandline.html#term-zmqport-port>`_. In this set up, it should listen to the zmq port that the external process is streaming out from.
* 30001 - Default Client ZMQ Port (listens to)
**Client ZMQ IP** - IP address the client ZMQ socket listens to. Command: `zmqip <commandline.html#term-zmqip-x.x.x.x>`_. By default, this is set to the IP of ``rx_hostname``, but in this set up, it should listen to the zmq IP that the external process is streaming out from.
* Default: Receivers hostname (rx_hostname)

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docs/src/dataformat.rst Normal file
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@@ -0,0 +1,330 @@
.. _data format:
Detector Image Size and Format
================================
Each UDP port creates its own output file, which contains the data of the image transmitted over that port. More on number of files and naming for each file in the `File format <fileformat.html>`_ section.
Jungfrau
-------------
Single Port Configuration
^^^^^^^^^^^^^^^^^^^^^^^^^^
.. image:: images/Jungfrau_module.png
:target: _images/Jungfrau_module.png
:width: 650px
:align: center
:alt: Jungfrau Module Single Port Configuration
By default, only the outer 10GbE interface is enabled, transmitting the full image over a single UDP port. This results in one file per module containing the complete image.
Total image size = 524,288 bytes
- 8 chips (2 x 4 grid)
- 256 x 256 pixels (chip size)
- 2 bytes (pixel width)
Double Port Configuration
^^^^^^^^^^^^^^^^^^^^^^^^^^
.. image:: images/Jungfrau_two_port.png
:target: _images/Jungfrau_two_port.png
:width: 500px
:align: center
:alt: Jungfrau Module Two Port Configuration
If both interfaces are enabled using the `numinterfaces <commandline.html#term-numinterfaces-1-2>`_ command on compatible hardware and firmware, the image splits into top and bottom halves sent over two UDP ports:
- The top half transmits via the inner interface (`udp_dstport2 <commandline.html#term-udp_dstport2-n>`_ and `udp_dstip2 <commandline.html#term-udp_dstip2-x.x.x.x-or-auto>`_).
- The bottom half uses the outer interface(`udp_dstport <commandline.html#term-udp_dstport-n>`_ and `udp_dstip <commandline.html#term-udp_dstip-x.x.x.x-or-auto>`_).
The number of files per module equals the active UDP ports—two files per module when both interfaces are used.
Image size per UDP port or File = 262,144 bytes
- **Complete Image size / 2**
Read Partial Rows
^^^^^^^^^^^^^^^^^^
.. image:: images/Jungfrau_read_rows.png
:target: _images/Jungfrau_read_rows.png
:width: 550px
:align: center
:alt: Jungfrau Module Read Partial Rows Configuration
The number of image rows per port can be adjusted using the `readnrows <commandline.html#term-readnrows>`_ command. By default, 512 rows are read, but a smaller value centers the readout vertically (e.g., 8 rows reads 4 above and 4 below the center). Increasing the value symmetrically expands the region toward the top and bottom. Permissible values are multiples of 8.
Total image size = 32,768 bytes
- 8 chips (2 x 4 grid)
- **8** x 256 pixels (chip size: **8 rows**)
- 2 bytes (pixel width)
Note: Still in prototype stage, writes complete image (padded or not depending on `rx_padding <commandline.html#term-rx_padding-0-1>`_ parameter) to file. Only the summary written to console in the receiver handles the `readnrows <commandline.html#term-readnrows>`_ to calculate to calculate complete images received. Only reduces network load, not file size. Use `rx_roi <commandline.html#term-rx_roi-xmin-xmax-ymin-ymax>`_ for file size.
Moench
-------------
Single Port Configuration
^^^^^^^^^^^^^^^^^^^^^^^^^^
.. image:: images/Moench_module.png
:target: _images/Moench_module.png
:width: 550px
:align: center
:alt: Moench Module Single Port Configuration
By default, only the outer 10GbE interface is enabled, transmitting the full image over a single UDP port. This results in one file per module containing the complete image.
Total image size = 320,000 bytes
- 400 x 400 pixels (chip size)
- 2 bytes (pixel width)
Double Port Configuration
^^^^^^^^^^^^^^^^^^^^^^^^^^
.. image:: images/Moench_two_port.png
:target: _images/Moench_two_port.png
:width: 400px
:align: center
:alt: Moench Module Two Port Configuration
If both interfaces are enabled using the `numinterfaces <commandline.html#term-numinterfaces-1-2>`_ command on compatible hardware and firmware, the image splits into top and bottom halves sent over two UDP ports:
- The top half transmits via the inner interface (`udp_dstport2 <commandline.html#term-udp_dstport2-n>`_ and `udp_dstip2 <commandline.html#term-udp_dstip2-x.x.x.x-or-auto>`_).
- The bottom half uses the outer interface(`udp_dstport <commandline.html#term-udp_dstport-n>`_ and `udp_dstip <commandline.html#term-udp_dstip-x.x.x.x-or-auto>`_).
The number of files per module equals the active UDP ports—two files per module when both interfaces are used.
Image size per UDP port or File = 160,000 bytes
- **Complete Image size / 2**
Read Partial Rows
^^^^^^^^^^^^^^^^^^
.. image:: images/Moench_read_rows.png
:target: _images/Moench_read_rows.png
:width: 400px
:align: center
:alt: Moench Module Read Partial Rows Configuration
The number of image rows per port can be adjusted using the `readnrows <commandline.html#term-readnrows>`_ command. By default, 400 rows are read, but a smaller value centers the readout vertically (e.g., 16 rows reads 8 above and 8 below the center). Increasing the value symmetrically expands the region toward the top and bottom. Permissible values are multiples of 16.
Total image size = 12,800 bytes
- **16** x 400 pixels (chip size: **16 rows**)
- 2 bytes (pixel width)
Note: Still in prototype stage, writes complete image (padded or not depending on `rx_padding <commandline.html#term-rx_padding-0-1>`_ parameter) to file. Only the summary written to console in the receiver handles the read n rows to calculate complete images received. Only reduces network load, not file size. Use `rx_roi <commandline.html#term-rx_roi-xmin-xmax-ymin-ymax>`_ for file size.
Eiger
-------------
Default Configuration
^^^^^^^^^^^^^^^^^^^^^^^^^^
.. image:: images/Eiger_module.png
:target: _images/Eiger_module.png
:width: 350px
:align: center
:alt: Eiger Module Default Configuration
Each Eiger module has two independent identical readout systems (other than firmware), each with its own control port and `hostname <commandline.html#term-hostname>`_ to be configured with. They are referred to as the 'top' and 'bottom' half modules. The bottom half module is flipped vertically.
Each half module has 2 parallel UDP ports for 2 chips each. The left UDP port is configured with `udp_dstport <commandline.html#term-udp_dstport-n>`_, while the right UDP port is configured with `udp_dstport2 <commandline.html#term-udp_dstport2-n>`_. This is vice versa for the bottom half module.
Image size per UDP port or File = 262,144 bytes
- 2 chips (1 x 2 grid)
- 256 x 256 pixels (chip size)
- 2 bytes (default pixel width)
The myth, the legend, the bottom ports: Demystifying them
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
.. figure:: images/Eiger_bottom_1.png
:target: _images/Eiger_bottom_1.png
:width: 350px
:align: center
:alt: Eiger Bottom as Firmware gets it
How the firmware gets the images
.. figure:: images/Eiger_bottom_2.png
:target: _images/Eiger_bottom_2.png
:width: 350px
:align: center
:alt: Eiger Bottom after the firmware flips it horizontally
After the firmware flips it horizontally
.. figure:: images/Eiger_bottom_3.png
:target: _images/Eiger_bottom_3.png
:width: 350px
:align: center
:alt: After the software swaps the udp ports
After the software swaps the udp ports
.. figure:: images/Eiger_bottom_4.png
:target: _images/Eiger_bottom_4.png
:width: 400px
:align: center
:alt: After the gui has flipped the bottom vertically
After the gui has flipped the bottom vertically
Note: The same process happens for the bottom 2 udp ports of the quad.
Pixel width
^^^^^^^^^^^^^
The pixel width can be configured to 4, 8, 16 (default) or 32 bits using the command `dr <commandline.html#term-dr-value>`_. This affects image size per UDP port or file.
Flip rows
^^^^^^^^^^
One can use the command `fliprows <commandline.html#term-fliprows-0-1>`_ to flip the rows vertically for the bottom or top half module. It is sent out to the reciever, but does not flip rows in the output file itself, but rather streams out this info via the json header and thus instructs the GUI to display them correctly.
1GbE/ 10GbE Interfaces
^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Both UDP ports `udp_dstport <commandline.html#term-udp_dstport-n>`_ and `udp_dstport2 <commandline.html#term-udp_dstport2-n>`_ are used in Eiger as shows in the figure. Both of them can be set to use either the 1GbE or the 10GbE interface for data. The 1GbE interface is used also for control and configuration. For data, the 1GbE interface is enabled by default. It can be disabled by enabling the `tengiga <commandline.html#term-tengiga-0-1>`_ command and updating both the `udp_dstport <commandline.html#term-udp_dstport-n>`_ , `udp_dstport2 <commandline.html#term-udp_dstport2-n>`_ , `udp_dstip <commandline.html#term-udp_dstip-x.x.x.x-or-auto>`_ commands to match the 1GbE or 10GbE interface. This setting only affects packetsize and number of packets, but does not affect the total image size.
Reducing network load
^^^^^^^^^^^^^^^^^^^^^^
**Activate**: By default, the `hostname <commandline.html#term-hostname>`_ command activates the respective half module it connects to, enabling all UDP ports. To deactivate an entire half module (i.e., both UDP ports), use the `activate <commandline.html#term-activate-0-1>`_ command. This disables both UDP ports for that half module, so no data is transmitted from it — only half of the module is read out. To specify which half module to activate or deactivate, use the module index (for Eiger, each half module has its own module index).
**Datastream**: The `datastream <commandline.html#term-datastream-left-right-0-1>`_ command with arguments to specify which port can be used to disable the data streaming from one or both the two UDP ports in a half module. This allows for more flexible configurations, such as reading only two chips or one UDP port of a half module. To specify which half module to activate or deactivate, use the module index (for Eiger, each half module has its own module index).
Note: Only the activated ports will write data as it does not make sense to write an empty file.
**Read Partial Rows**: The number of image rows per port can be adjusted using the `readnrows <commandline.html#term-readnrows>`_ command. By default, 256 rows are read, but a smaller value centers the readout vertically (e.g., 8 rows reads 4 above and 4 below the center). Increasing the value symmetrically expands the region toward the top and bottom. Permissible values depend on dynamic range and 10GbE enable.
.. image:: images/Eiger_read_rows.png
:target: _images/Eiger_read_rows.png
:width: 400px
:align: center
:alt: Eiger Module Read Partial Rows Configuration
Total image size per UDP Port = 8,192 bytes
- 2 chips (1 x 2 grid)
- **8** x 256 pixels (chip size: **8 rows**)
- 2 bytes (default pixel width)
Note: Still in prototype stage, writes complete image (padded or not depending on `rx_padding <commandline.html#term-rx_padding-0-1>`_ parameter) to file. Only the summary written to console in the receiver handles the `readnrows <commandline.html#term-readnrows>`_ to calculate complete images received. Only reduces network load, not file size. Use `rx_roi <commandline.html#term-rx_roi-xmin-xmax-ymin-ymax>`_ for file size.
Quad
^^^^^^
The Eiger quad is a special hardware configuration that uses only the top half-module to create a quad layout. In this setup, the second half of the top module—normally associated with the right-side UDP port—is used to represent the inverted bottom half of the quad.
As with any standard half-module, it includes one control TCP port (with a hostname) and two UDP data ports (top and bottom). When the quad option is enabled, the firmware automatically flips the second UDP port vertically.
In this configuration, the fliprows command cannot be used to flip the entire half-module. Instead, the receiver automatically includes row-flipping information only for the second UDP port in the JSON header, so the GUI can apply the correct orientation during display
.. image:: images/Eiger_quad.png
:target: _images/Eiger_quad.png
:width: 300px
:align: center
:alt: Eiger Quad Configuration
Image size per UDP port = same as a normal Eiger UDP port
Mythen3
-------------
Default Configuration
^^^^^^^^^^^^^^^^^^^^^^^^^^
.. image:: images/Mythen3_module.png
:target: _images/Mythen3_module.png
:align: center
:alt: Mythen3 Module Default Configuration
Each Mythen3 module is a 1D detector with 10 chips, each with 128 channels. Each channel has 3 counters that are enabled by default.
Image size = 15,360 bytes
- 10 chips (1 x 10 grid)
- 128 channels
- 3 counters
- 4 bytes (default pixel width)
Counters
^^^^^^^^^^^
If all 3 counters are enabeld, the frame size for each channel is multiplied by 3. The counters are stored consecutively per channel. One can disable one or more of the counters using the `counters <commandline.html#term-counters-i0-i1-i2-...>`_ command. The frame size will then be reduced accordingly.
Image size = 10,240 bytes
- 10 chips (1 x 10 grid)
- 128 channels
- 2 counters (0, 1 enabled)
- 4 bytes (default pixel width)
Pixel width
^^^^^^^^^^^^^
The pixel width can be configured to 8, 16 or 32 (default) bits using the command `dr <commandline.html#term-dr-value>`_. 32 bits is actually 24 bits in the chip. This setting does affect image size.
1GbE/ 10GbE Interfaces
^^^^^^^^^^^^^^^^^^^^^^^^^^^^
The UDP port can be set to use either the 1GbE or the 10GbE interface for data. The 1GbE interface is used also for control and configuration. For data, the 10GbE interface is enabled by default. It can be disabled by using the `tengiga <commandline.html#term-tengiga-0-1>`_ command and updating the `udp_dstport <commandline.html#term-udp_dstport-n>`_ and `udp_dstip <commandline.html#term-udp_dstip-x.x.x.x-or-auto>`_ commands to match the 1GbE or 10GbE interface. This setting only affects packetsize and number of packets, but does not affect the total image size.
Gotthard2
-------------
Default Configuration
^^^^^^^^^^^^^^^^^^^^^^^^^^
.. image:: images/Gotthard2_module.png
:target: _images/Gotthard2_module.png
:align: center
:alt: Gotthard2 Module Default Configuration
Each Gotthard2 module is a 1D detector with 10 chips, each with 128 channels.
Image size = 2,560 bytes
- 10 chips (1 x 10 grid)
- 128 channels
- 2 bytes (pixel width)
Veto Info
^^^^^^^^^^^
One can enable veto data in the chip of the Gotthard2 module using the `veto <commandline.html#term-veto-0-1>`_ command. By default, this is disabled. This does not affect the image size as veto information is not sent out through the same 10GbE interface.
One can either stream out the veto info through the low latency link (2.5 gbps) or for debugging purposes through another 10GbE interface.
For debugging purposes, the veto info can be enabled using the `numinterfaces <commandline.html#term-numinterfaces-1-2>`_ command and the following parameters are updated: `udp_dstport2 <commandline.html#term-udp_dstport2-n>`_ and `udp_dstip2 <commandline.html#term-udp_dstip2-x.x.x.x-or-auto>`_. The veto data from this port is of course written to a separate file and is not combined in the virtual HDF5 file mapping (complete image mapped).

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@@ -14,7 +14,12 @@ the shared libraries these are needed:
* Linux, preferably recent kernel (currently no cross platform support)
* CMake >= 3.14
* C++11 compatible compiler. (We test with gcc and clang)
* C++17 compatible compiler. (We test with gcc and clang)
.. note ::
For v9.x.x of slsDetectorPackage and older, C++11 compatible compiler.
-----------------------
Python bindings

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@@ -1,3 +1,5 @@
.. _file format:
File format
================================
@@ -60,3 +62,14 @@ There are 2 file formats supported by the receiver:
The default is binary. HDF5 can be enabled by compiling the package with HDF5 option enabled. The file format is set using the command `fformat <commandline.html#term-fformat-binary-hdf5>`_.
Content
--------
| `Master File`: Contains the metadata of the acquisition. The content is described in :ref:`master file attributes <master file attributes>`.
| `Data File`: Contains the metadata for each image (:ref:`slsReceiverHeader<sls receiver header format>`) and the `data of the image` transmitted over that port. The image data is described in :ref:`Detector Image Size and Format <data format>` section.
| More content and examples are found in the :ref:`HDF5 file format <hdf5 file format>` and :ref:`Binary file format <binary file format>` sections.

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@@ -1,3 +1,5 @@
.. _firmware upgrade:
Firmware Upgrade
=================

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@@ -1,4 +1,4 @@
.. _hdf5 file format:
HDF5 File Format
================================
@@ -76,6 +76,8 @@ Data File
* File Name: [fpath]/[fname]_dx_fy_[findex].h5 :ref:`Details here<file name format>`
* More details on :ref:`slsReceiverHeader<sls receiver header format>` and the actual image data is described in the :ref:`Detector Image Size and Format <data format>` section.
Virtual Data File
------------------

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@@ -3,13 +3,13 @@
You can adapt this file completely to your liking, but it should at least
contain the root `toctree` directive.
Welcome to slsDetectorPackage's documentation!
slsDetectorPackage
==============================================
.. note ::
This is the documentation for the latest development version of slsDetectorPackage.
For further documentation, visit the official page: https://www.psi.ch/en/detectors/documentation
For further detector specific documentation, visit `this page <https://www.psi.ch/en/detectors/documentation>`__.
.. toctree::
:maxdepth: 3
@@ -18,6 +18,17 @@ Welcome to slsDetectorPackage's documentation!
installation
dependencies
consuming
.. toctree::
:caption: how to
:maxdepth: 2
softwarearchitecture
configcommands
quick_start_guide
dataformat
multidet
.. toctree::
:caption: C++ API
@@ -28,6 +39,9 @@ Welcome to slsDetectorPackage's documentation!
receiver_api
examples
.. toctree::
:caption: Python API
:maxdepth: 2
@@ -44,7 +58,7 @@ Welcome to slsDetectorPackage's documentation!
:maxdepth: 1
commandline
quick_start_guide
.. toctree::
:caption: Developer
@@ -91,6 +105,7 @@ Welcome to slsDetectorPackage's documentation!
fileformat
slsreceiverheaderformat
dataformat
masterfileattributes
binaryfileformat
hdf5fileformat

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@@ -123,22 +123,45 @@ One can either build using cmake or use the in-built cmk.sh script.
3.2.1. Build using CMake
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
.. code-block:: bash
# outside slsDetecorPackage folder
mkdir build && cd build
# configure & generate Makefiles using cmake
# by listing all your options (alternately use ccmake described below)
# cmake3 for some systems
cmake ../slsDetectorPackage -DCMAKE_INSTALL_PREFIX=/your/install/path
# configure & generate Makefiles using cmake by listing all your options
# (alternately use ccmake described below)
# cmake3 instead of cmake for some systems
# eg. enable gui option (without conda)
cmake ../slsDetectorPacakge -DSLS_USE_GUI=ON
# eg. enable python from virtual env, hdf5 and simulator options
cmake ../slsDetectorPackage -DSLS_USE_PYTHON=ON -DPython_FIND_VIRTUALENV=ONLY -DSLS_USE_HDF5=ON -DSLS_USE_SIMULATOR=ON
# compiled to the build/bin directory
make -j12 #or whatever number of cores you are using to build
To install in a clean custom directory and to use the slsDetectorPackage
libraries and headers in your project, specify the install directory
(eg. /your/install/path).
.. code-block:: bash
# outside slsDetecorPackage folder
mkdir build && cd build
# configure & generate Makefiles
cmake ../slsDetectorPackage -DCMAKE_INSTALL_PREFIX=/your/install/path
# compile
make -j12
# install headers and libs in /your/install/path directory
make install
.. note ::
Please refer to `api examples <https://github.com/slsdetectorgroup/api-examples>`__
on how to compile your project using the installed headers and libs.
Instead of the cmake command, one can use ccmake to get a list of options to configure and generate Makefiles at ease.
@@ -220,7 +243,7 @@ Example cmake options Comment
3.3. Build on old distributions using conda
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
If your linux distribution doesn't come with a C++11 compiler (gcc>4.8) then
If your linux distribution doesn't come with a C++17 compiler (gcc>8) then
it's possible to install a newer gcc using conda and build the slsDetectorPackage
using this compiler

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@@ -0,0 +1,230 @@
.. _using multiple detectors:
Using multiple detectors
==========================
The slsDetectorPackage supports using several detectors on the same computer.
This can either be two users, that need to use the same computer without interfering
with each other, or the same user that wants to use multiple detectors at the same time.
The detectors in turn can consist of multiple modules. For example, a 9M Jungfrau detector
consists of 18 modules which typically are addressed at once as a single detector.
.. note ::
To address a single module of a multi-module detector you can use the module index.
- Command line: :ref:`cl-module-index-label`
- Python: :ref:`py-module-index-label`
Coming back to multiple detectors we have two tools to our disposal:
#. Detector index
#. The SLSDETNAME environment variable
They can be used together or separately depending on the use case.
Detector index
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
When configuring a detector you can specify a detector index. The default is 0.
**Command line**
.. code-block:: bash
# Given that we have two detectors (my-det and my-det2) that we want to use,
# we can configure them with different indices.
# Configure the first detector with index 0
$ sls_detector_put hostname my-det
# Set number of frames for detector 0 to 10
$ sls_detector_put frames 10
#
#Configure the second detector with index 1 (notice the 1- before hostname)
$ sls_detector_put 1-hostname my-det2
# Further configuration
...
# Set number of frames for detector 1 to 19
$ sls_detector_put 1-frames 19
# Note that if we call sls_detector_get without specifying the index,
# it will return the configuration of detector 0
$ sls_detector_get frames
10
The detector index is added to the name of the shared memory segment, so in this case
the shared memory segments would be:
.. code-block:: bash
#First detector
/dev/shm/slsDetectorPackage_detector_0
/dev/shm/slsDetectorPackage_detector_0_module_0
#Second detector
/dev/shm/slsDetectorPackage_detector_1
/dev/shm/slsDetectorPackage_detector_1_module_0
**Python**
The main difference between the command line and the Python API is that you set the index
when you create the detector object and you don't have to repeat it for every call.
The C++ API works int the same way.
.. code-block:: python
from slsdet import Detector
# The same can be achieved in Python by creating a detector object with an index.
# Again we have two detectors (my-det and my-det2) that we want to use:
# Configure detector with index 0
d = Detector()
# If the detector has already been configured and has a shared memory
# segment, you can omit setting the hostname again
d.hostname = 'my-det'
#Further configuration
...
# Configure a second detector with index 1
d2 = Detector(1)
d2.hostname = 'my-det2'
d.frames = 10
d2.frames = 19
$SLSDETNAME
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
To avoid interfering with other users on shared PCs it is best to always set the SLSDETNAME environmental variable.
Imagining a fictive user: Anna, we can set SLSDETNAME from the shell before configuring the detector:
**Command line**
.. code-block:: bash
# Set the SLSDETNAME variable
$ export SLSDETNAME=Anna
# You can check that it is set
$ echo $SLSDETNAME
Anna
# Now configures a detector with index 0 and prefixed with the name Anna
# /dev/shm/slsDetectorPackage_detector_0_Anna
$ sls_detector_put hostname my-det
.. tip ::
Set SLSDETNAME in your .bashrc in order to not forget it when opening a new terminal.
**Python**
With python the best way is to set the SLSDETNAME from the command line before starting the python interpreter.
Bash:
.. code-block:: bash
$ export SLSDETNAME=Anna
Python:
.. code-block:: python
from slsdet import Detector
# Now configures a detector with index 0 and prefixed with the name Anna
# /dev/shm/slsDetectorPackage_detector_0_Anna
d = Detector()
d.hostname = 'my-det'
You can also set SLSDETNAME from within the Python interpreter, but you have to be aware that it will only
affect the current process and not the whole shell session.
.. code-block:: python
import os
os.environ['SLSDETNAME'] = 'Anna'
# You can check that it is set
print(os.environ['SLSDETNAME']) # Output: Anna
#Now SLSDETNAME is set to Anna but as soon as you exit the python interpreter
# it will not be set anymore
.. note ::
Python has two ways of reading environment variables: `**os.environ**` as shown above which throws a
KeyError if the variable is not set and `os.getenv('SLSDETNAME')` which returns None if the variable is not set.
For more details see the official python documentation on: https://docs.python.org/3/library/os.html#os.environ
Checking for other detectors
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
If using shared accounts on a shared computer (which you anyway should not do), it is good practice to check
if there are other detectors configured by other users before configuring your own detector.
You can do this by listing the files in the shared memory directory `/dev/shm/` that start with `sls`. In this
example we can see that two single module detectors are configured one with index 0 and one with index 1.
SLSDETNAME is set to `Anna` so it makes sense to assume that she is the user that configured these detectors.
.. code-block:: bash
# List the files in /dev/shm that starts with sls
$ ls /dev/shm/sls*
/dev/shm/slsDetectorPackage_detector_0_Anna
/dev/shm/slsDetectorPackage_detector_0_module_0_Anna
/dev/shm/slsDetectorPackage_detector_1_Anna
/dev/shm/slsDetectorPackage_detector_1_module_0_Anna
We also provide a command: user, which gets information about the shared memory segment that
the client points to without doing any changes.
.. code-block:: bash
#in this case 3 simulated Mythen3 modules
$ sls_detector_get user
user
Hostname: localhost+localhost+localhost+
Type: Mythen3
PID: 1226078
User: l_msdetect
Date: Mon Jun 2 05:46:20 PM CEST 2025
Other considerations
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
The shared memory is not the only way to interfere with other users. You also need to make sure that you are not
using the same:
* rx_tcpport
* Unique combination of udp_dstip and udp_dstport
* rx_zmqport
* zmqport
.. attention ::
The computer that you are using need to have enough resources to run multiple detectors at the same time.
This includes CPU and network bandwidth. Please coordinate with the other users!

View File

@@ -28,7 +28,7 @@ This instructs the firmware to execute the commands from address 0 to 4 (includi
.. code-block::
start [Ctb, Xilinx_Ctb]
patternstart [Mythen3]
patternstart [Mythen3, Ctb, Xilinx_Ctb]
The maximal number of patword addresses is 8192. However, it is possible to extend the length of the pattern sequence using loops and wait commands. Loops can be configured with the following commands:
@@ -70,11 +70,11 @@ The mappings of bit positions in the pattern word to signals/pads of the FPGA ar
.. table::
+----+---+------+----+----------+-------------------+----------------+
| 63 | 62| 61-57| 56 | 55-48 | 47-32 | 31-0 |
+----+---+------+----+----------+-------------------+----------------+
| A | D| --- | T | EXTIO | DO, stream source | DIO |
+----+---+------+----+----------+-------------------+----------------+
+----+---+------+----+----------+----------+----------------+
| 63 | 62| 61-57| 56 | 55-48 | 47-32 | 31-0 |
+----+---+------+----+----------+----------+----------------+
| A | D| --- | T | EXTIO | DO | DIO |
+----+---+------+----+----------+----------+----------------+
DIO: Driving the 32 FPGA pins corresponding to the lowest 32 bits of the patioctrl command. If bits in patioctrl are 0, the same bit positions in DIO will switch to input pins and connect to dbit sampling. Additionally, some of these 32 bits have an automatic override by detector-specific statemachines which is active whenever one of these statemachines is running (currently bits 7,8,11,14 and 20).
@@ -119,4 +119,12 @@ DIO: Driving the 32 FPGA pins corresponding to the lowest 32 bits of the patioct
| SR_MODE | clk | EN | PULSE | RD | CHSIN | ANAMode | TBLOAD |
+---------+-----+-------+-------+----+-------+---------+--------+
For Mythen3 the pattern word only connects to output pins of the FPGA when the pattern is running. Afterwards the signals will switch back to other logic in the FPGA. Both CTB's hold the last executed pattern word until a new pattern is started.
For Mythen3 the pattern word only connects to output pins of the FPGA when the pattern is running. Afterwards the signals will switch back to other logic in the FPGA. Both CTB's hold the last executed pattern word until a new pattern is started.
**Relation of received data to pattern execution**
In the default configuration the Ctb will send out udp packets to the sls_receiver for every end of a pattern execution. This behavior can be changed using STREAMING_CTRL_REG, where one can configure a bit position in the 64-bit pattern word to trigger udp packets. This allows to send more than one packet per pattern or also no packets at all.
The "patternstart" command on the ctb exectues the pattern. As long as streaming_ctrl_reg is disabeld, every pattern execution using this command will not send UDP packets.
For Mythen3 the sending of udp packets is not connected to pattern execution.

View File

@@ -123,6 +123,47 @@ in a large detector.
# Set exposure time for module 1, 5 and 7
d.setExptime(0.1, [1,5,7])
.. _py-module-index-label:
----------------------------------
Accessing individual modules
----------------------------------
Using the C++ like API you can access individual modules in a large detector
by passing in the module index as an argument to the function.
::
# Read the UDP destination port for all modules
>>> d.getDestinationUDPPort()
[50001, 50002, 50003]
# Read it for module 0 and 1
>>> d.getDestinationUDPPort([0, 1])
[50001, 50002]
>>> d.setDestinationUDPPort(50010, 1)
>>> d.getDestinationUDPPort()
[50001, 50010, 50003]
From the more pythonic API there is no way to read from only one module but you can read
and then use list slicing to get the values for the modules you are interested in.
::
>>> d.udp_dstport
[50001, 50010, 50003]
>>> d.udp_dstport[0]
50001
#For some but not all properties you can also pass in a dictionary with module index as key
>>> ip = IpAddr('127.0.0.1')
>>> d.udp_dstip = {1:ip}
--------------------
Finding functions
--------------------

View File

@@ -19,14 +19,14 @@ For a Single Module
slsReceiver
# custom port 2012
slsReceiver -t2012
slsReceiver -p 2012
For Multiple Modules
.. code-block:: bash
# slsMultiReceiver [starting port] [number of receivers] [print each frame header for debugging]
slsMultiReceiver 2012 2 0
# slsMultiReceiver [-p: starting port, -n: number of receivers]
slsMultiReceiver -p 2012 -n 2
Client
@@ -131,6 +131,27 @@ For Multiple Modules
.. note ::
The **hostname** and **detsize** command in a multi module system can affect the row and column values in the udp/zmq header. The modules are stacked row by row until they reach the y-axis limit set by detsize (if specified). Then, stacking continues in the next column and so on.
Data
-----
Check out the :ref:`UDP header section<detector udp header>` for details on output UDP header data format.`
Check out the :ref:`Detector image size and format section<data format>` for details on output data format.
Receiver
---------
When using `slsReceiver`, `slsMultiReceiver` or `slsFrameSynchronizer`, check out the following sections:
- :ref:`File format<file format>`
- :ref:`slsReceiver header format<sls receiver header format>`
- :ref:`Master file attributes<master file attributes>`
Gui
----

View File

@@ -1,3 +1,5 @@
.. _detector_servers:
Getting Started
===============

View File

@@ -38,18 +38,41 @@ There are three main receiver types. How to start them is described :ref:`below<
+----------------------+--------------------+-----------------------------------------+--------------------------------+
.. _Starting up the Receiver:
Starting up the Receiver
-------------------------
.. code-block:: bash
Usage: slsReceiver Options:
-v, --version : Version.
-p, --port : TCP port to communicate with client for configuration. Non-zero and 16 bit.
-u, --uid : Set effective user id if receiver started with privileges.
Usage: slsMultiReceiver Options:
-v, --version : Version.
-n, --num-receivers : Number of receivers.
-p, --port : TCP port to communicate with client for configuration. Non-zero and 16 bit.
-c, --callback : Enable dummy callbacks for debugging. Disabled by default.
-u, --uid : Set effective user id if receiver started with privileges.
Usage: slsFrameSynchronizer Options:
-v, --version : Version.
-n, --num-receivers : Number of receivers.
-p, --port : TCP port to communicate with client for configuration. Non-zero and 16 bit.
-c, --print-headers : Print callback headers for debugging. Disabled by default.
-u, --uid : Set effective user id if receiver started with privileges.
For a Single Module
.. code-block:: bash
slsReceiver # default port 1954
slsReceiver -t2012 # custom port 2012
slsReceiver -p 2012 # custom port 2012
For Multiple Modules
@@ -59,13 +82,13 @@ For Multiple Modules
# option 1 (one for each module)
slsReceiver
slsReceiver -t1955
slsReceiver -p 1955
# option 2
slsMultiReceiver 2012 2
slsMultiReceiver -p 2012 -n 2
# option 3
slsFrameSynchronizer 2012 2
slsFrameSynchronizer -p 2012 -n 2

View File

@@ -0,0 +1,147 @@
.. _software architecture:
Software Architecture
================================
Introduction
------------------------------------
.. figure:: images/System_communication_architecture.png
:target: _images/System_communication_architecture.png
:width: 700px
:align: center
:alt: System communication architecture
Software Communication Architecture
**Detector**
A detector can consist of a single module or multiple modules combined.
**Module**
Each module sends its data via UDP over distinct ports. Since UDP does not provide acknowledgements, data is transmitted as fast as possible, which can lead to packet loss if the network is not properly configured, among other causes. A single image streamed out could be split into multiple UDP packets and each module can have one or two UDP ports to transmit in parallel different physical sections of the image.
**Receiver**
UDP data is received by one or more receivers—either built-in or custom. In the diagram above, there is one built-in receiver per module (1:1). For example, a detector with two modules (two hostnames) will have two built-in receivers. Each receiver could listen to one or two UDP ports (depending on the module it listens to). For each UDP port, the receiver reassembles these packets into sub-images and optionally saved to file.
**ZMQ**
Each UDP port in the receiver can also stream out independently sub-images via ZMQ (core: TCP/IP).
* Directly to the GUI for display.
* To an external processing chain for post-processing and optional storage, which can in turn stream the processed data back to the GUI.
**Client**
A single client can configure and control individual modules and receivers, or multiple of them in parallel. This communication is handled over TCP/IP, ensuring acknowledgements.
It can also listen to multiple ZMQ sockets from the Receiver(s) or the external processing chain to assemble the full image for GUI display or Client call backs.
Next, each component is examined in detail.
Module
-------
.. figure:: images/Module_architecture.png
:target: _images/Module_architecture.png
:width: 700px
:align: center
:alt: Module architecture
Module Architecture
**Detector Server**
The module contains an onboard CPU (type depends on the detector — e.g., Nios for Mythen3, Blackfin for Jungfrau). The detector server and detector configuration files are stored here, with the server compiled in C using the CPU-specific compiler. Running the binary starts a Control Server and a Stop Server. Client control/configuration requests go to the Control Server via the TCP control port, while stop/status requests go to the Stop Server via the TCP stop port as the Control Server may be busy with an acquisition. For more details see :ref:`detector server <detector_servers>` and :ref:`detector simulators<Virtual Detector Servers>` to play around with.
**Firmware**
The module also includes an FPGA with VHDL firmware (file format depends on the detector — e.g., Mythen3 uses .rbf, Jungfrau uses .pof). Client requests trigger register read/write operations in the FPGA, which manages chip readout and processing. Data from the chips is sent through a UDP generator in the FPGA and output as UDP packets via the UDP port. A single image may be split across multiple packets. A module could have 1 or 2 UDP ports to transmit in parallel different physical sections of the image.
Upgrade
^^^^^^^^
.. figure:: images/Soft_upgrade_components.png
:target: _images/Soft_upgrade_components.png
:width: 700px
:align: center
:alt: Software Upgrade Components
Software Upgrade Components
There are mainly three components to the soft upgrade:
* Detector Server upgrade: The server running on the module.
* Firmware upgrade: The VHDL code running on the FPGA.
* slsDetectorPackage upgrade: The client code running on the host PC to control the module(s) and receiver(s) if any.
Please use the `update command <commandline.html#term-update>`_ when updating both the server and firmware simulataneously and `programfpga command <commandline.html#term-programfpga-fname.pof-fname.rbf-full-path-opitonal-force-delete-normal-file>`_ when only updating the firmware. See :ref:`firmware upgrade <firmware upgrade>` for details.
When only updating the detector server, use the `updatedetectorserver command <commandline.html#term-updatedetectorserver-server_name-with-full-path>`_ command. See :ref:`detector server upgrade <Detector Server Upgrade>` for details.
.. note::
**Compatibility**
When updating anything on the module via the client (server or firmware), the server and client will have to be compatible (same major version). If not, the client and server will not communicate properly.
Since they are ideally compatible before the upgrade, upgrade the server and firmware first, then the slsDetectorPackage.
Receiver
--------
.. figure:: images/Receiver_architecture.png
:target: _images/Receiver_architecture.png
:align: center
:alt: Receiver Architecture
Receiver Architecture
The receiver mainly consists of:
* A TCP server that listens to client TCP requests for configuration and control.
* One or 2 listeners that listen to a UDP port each, reassembling the UDP packets into sub-images in memory.
* One or 2 data processors that processes the sub-images with optional callbacks for online processing and file writing.
* One or 2 data streamers that stream the processed sub-images to the GUI or external processing chain via ZMQ.
Few characteristics of the receiver:
* It can be run on the same host as the client or on a different host.
* There is a receiver process for every module and a file for every UDP port.
* Each receiver process is independent and asynchronized for performance. So are the UDP ports.
Client
--------
.. figure:: images/Client_architecture.png
:target: _images/Client_architecture.png
:align: center
:alt: Client Architecture
Client Architecture
Users can control the detector and receivers through four interfaces:
* their C++ API,
* their Python API,
* the command-line interface, or
* the Qt-based GUI.
Regardless of the interface, each ultimately invokes our Detector class—either directly (CLI and GUI) or through our C++/Python libraries (when using their APIs). The Detector class then calls the appropriate module functions, either for a specific module or in parallel for all modules. Each module object sends requests over TCP to its corresponding module and, if needed, to the receiver.
**Shared Memory**
As the command-line interface is supported, shared memory is used to store essential information such as the module hostname and TCP port, or the receiver hostname and TCP port. This ensures the system knows which components to communicate with, without requiring the user to re-enter this information for every command-line call.
.. note::
Only the client maintains shared memory. Care must be taken when multiple users operate from the same PC. See :ref:`multi detector and user section <using multiple detectors>` for more details.

View File

@@ -202,6 +202,56 @@ Receiver PC Tuning Options
ethtool -K xth1 gro
* **permanent ethtool settings**
There are two main methods.
1. ``systemd service`` (recommended for Fedora and modern RHEL)
This is the preferred method on systems using systemd and NetworkManager, such as Fedora and RHEL 8+.
Create a systemd service template:
.. code-block:: ini
# /etc/systemd/system/ethtool@.service
[Unit]
Description=Set RX buffer size with ethtool
After=network-online.target
Wants=network-online.target
[Service]
ExecStart=/usr/sbin/ethtool -G %i rx 8192
Type=oneshot
[Install]
WantedBy=multi-user.target
Enable the service for a specific interface:
.. code-block:: bash
sudo systemctl enable ethtool@xth1.service
This ensures the setting is applied at every boot once the network is online.
2. ``ETHTOOL_OPTS in ifcfg scripts`` (legacy method for RHEL 7 and earlier)
This method applies only to systems using the legacy network-scripts backend, typically RHEL 7 and earlier.
.. code-block:: bash
# edit the corresponding ``ifcfg-*`` file
# file: /etc/sysconfig/network-scripts/ifcfg-eth0
# add or modify the following line:
ETHTOOL_OPTS="-K ${DEVICE} gro on; -G ${DEVICE} rx 4096; -L ${DEVICE} combined 4; -C ${DEVICE} rx-usecs 100; -C ${DEVICE} adaptive-rx on"
# restart the interface
ifdown eth0 && ifup eth0
#. Disable power saving in CPU frequency scaling and set system to performance
* Check current policy (default might be powersave or schedutil)
.. code-block:: bash

View File

@@ -99,6 +99,7 @@ Detector Enum
MYTHEN3 6
GOTTHARD2 7
================ ========
* deprecated since v10.0.0

View File

@@ -154,6 +154,8 @@ class AdcTab(QtWidgets.QWidget):
self.mainWindow.analogPlots[i].setData(waveform)
plotName = getattr(self.view, f"labelADC{i}").text()
waveforms[plotName] = waveform
elif checkBoxEn.isChecked():
idx += 1
return waveforms
@recordOrApplyPedestal

View File

@@ -50,20 +50,20 @@ class AcquisitionTab(QtWidgets.QWidget):
self.plotTab = self.mainWindow.plotTab
self.toggleStartButton(False)
if self.det.type == detectorType.XILINX_CHIPTESTBOARD:
self.view.labelRunF.setDisabled(True)
self.view.labelADCF.setDisabled(True)
self.view.labelADCPhase.setDisabled(True)
self.view.labelADCPipeline.setDisabled(True)
self.view.labelDBITF.setDisabled(True)
self.view.labelDBITPhase.setDisabled(True)
self.view.labelDBITPipeline.setDisabled(True)
self.view.spinBoxRunF.setDisabled(True)
self.view.spinBoxADCF.setDisabled(True)
self.view.spinBoxADCPhase.setDisabled(True)
self.view.spinBoxADCPipeline.setDisabled(True)
self.view.spinBoxDBITF.setDisabled(True)
self.view.spinBoxDBITPhase.setDisabled(True)
self.view.spinBoxDBITPipeline.setDisabled(True)
self.view.labelRunF.setText("Run Clock Frequency (kHz):")
self.view.labelDBITF.setText("DBIT Clock Frequency (kHz):")
self.view.labelADCF.setText("ADC Clock Frequency (kHz):")
self.view.spinBoxRunF.setMaximum(250000)
self.view.spinBoxDBITF.setMaximum(250000)
self.view.spinBoxADCF.setMaximum(250000)
def connect_ui(self):
# For Acquistions Tab
@@ -72,12 +72,13 @@ class AcquisitionTab(QtWidgets.QWidget):
self.view.spinBoxAnalog.editingFinished.connect(self.setAnalog)
self.view.spinBoxDigital.editingFinished.connect(self.setDigital)
if self.det.type == detectorType.CHIPTESTBOARD:
if self.det.type in [detectorType.CHIPTESTBOARD, detectorType.XILINX_CHIPTESTBOARD]:
self.view.spinBoxRunF.editingFinished.connect(self.setRunFrequency)
self.view.spinBoxADCF.editingFinished.connect(self.setADCFrequency)
self.view.spinBoxDBITF.editingFinished.connect(self.setDBITFrequency)
if self.det.type == detectorType.CHIPTESTBOARD:
self.view.spinBoxADCPhase.editingFinished.connect(self.setADCPhase)
self.view.spinBoxADCPipeline.editingFinished.connect(self.setADCPipeline)
self.view.spinBoxDBITF.editingFinished.connect(self.setDBITFrequency)
self.view.spinBoxDBITPhase.editingFinished.connect(self.setDBITPhase)
self.view.spinBoxDBITPipeline.editingFinished.connect(self.setDBITPipeline)
@@ -98,12 +99,13 @@ class AcquisitionTab(QtWidgets.QWidget):
self.getAnalog()
self.getDigital()
if self.det.type == detectorType.CHIPTESTBOARD:
if self.det.type in [detectorType.CHIPTESTBOARD, detectorType.XILINX_CHIPTESTBOARD]:
self.getRunFrequency()
self.getADCFrequency()
self.getDBITFrequency()
if self.det.type == detectorType.CHIPTESTBOARD:
self.getADCPhase()
self.getADCPipeline()
self.getDBITFrequency()
self.getDBITPhase()
self.getDBITPipeline()

View File

@@ -13,13 +13,17 @@ import subprocess
import argparse
import sys
import time
import ctypes.util, re # to check libclang version
from pathlib import Path
from parse import system_include_paths, clang_format_version
REDC = "\033[91m"
GREENC = "\033[92m"
YELLOWC = "\033[93m"
ENDC = "\033[0m"
def yellow(msg):
return f"{YELLOWC}{msg}{ENDC}"
def red(msg):
return f"{REDC}{msg}{ENDC}"
@@ -29,6 +33,50 @@ def green(msg):
return f"{GREENC}{msg}{ENDC}"
QUALIFY_KINDS = {
cindex.CursorKind.NAMESPACE,
cindex.CursorKind.CLASS_DECL,
cindex.CursorKind.STRUCT_DECL,
cindex.CursorKind.CLASS_TEMPLATE,
cindex.CursorKind.ENUM_DECL,
cindex.CursorKind.UNION_DECL,
cindex.CursorKind.TYPE_ALIAS_DECL,
}
def qualified_name(cur: cindex.Cursor, include_leaf: bool = True) -> str:
"""
Build a fully-qualified name by following semantic_parent up to the TU.
If include_leaf is False, returns just the enclosing scope (namespaces, classes).
"""
parts = []
c = cur if include_leaf else cur.semantic_parent
while c and c.kind != cindex.CursorKind.TRANSLATION_UNIT:
name = c.spelling or c.displayname # displayname helps for anonymous namespaces
if name and (c.kind in QUALIFY_KINDS or c is cur):
parts.append(name)
c = c.semantic_parent
return "::".join(reversed(parts))
def check_libclang_version(required="12"):
# Use already-loaded libclang, or let cindex resolve it
lib = ctypes.CDLL(cindex.Config.library_file or ctypes.util.find_library("clang"))
# Get version string
lib.clang_getClangVersion.restype = ctypes.c_void_p
version_ptr = lib.clang_getClangVersion()
version_str = ctypes.cast(version_ptr, ctypes.c_char_p).value.decode()
# Parse and check version
match = re.search(r"version\s+(\d+)", version_str)
if not match or match.group(1) != required:
msg = red(f"libclang version {match.group(1) if match else '?'} found, but version {required} required. Bye!")
print(msg)
sys.exit(1)
msg = green(f"Found libclang version {required}")
print(msg)
def check_clang_format_version(required_version):
if (ver := clang_format_version()) != required_version:
msg = red(
@@ -53,8 +101,8 @@ def check_for_compile_commands_json(path):
print(msg)
default_build_path = "/home/l_frojdh/sls/build/"
fpath = "../../slsDetectorSoftware/src/Detector.cpp"
default_build_path = Path("../../build/")
fpath = Path("../../slsDetectorSoftware/src/Detector.cpp")
m = []
@@ -64,25 +112,14 @@ ag2 = []
cn = []
def get_arguments(node):
args = [a.type.spelling for a in node.get_arguments()]
args = [
"py::arg() = Positions{}" if item == "sls::Positions" else "py::arg()"
for item in args
]
args = ", ".join(args)
if args:
args = f", {args}"
return args
def get_arguments_with_default(node):
args = []
for arg in node.get_arguments():
tokens = [t.spelling for t in arg.get_tokens()]
# print(tokens)
if "=" in tokens:
if arg.type.spelling == "sls::Positions": # TODO! automate
# if arg.type.spelling == "sls::Positions": # TODO! automate+
if arg.type.spelling == "Positions": # TODO! automate
args.append("py::arg() = Positions{}")
else:
args.append("py::arg()" + "".join(tokens[tokens.index("=") :]))
@@ -120,6 +157,24 @@ def time_return_lambda(node, args):
def visit(node):
loc = node.location
# skip if ndoe is outside project directory
if loc.file and not str(loc.file).startswith(str(cargs.build_path.parent)):
return
'''
# to see which file was causing the error (not in Detector.h, so skipping others in the above code)
try:
kind = node.kind
except ValueError as e:
loc = node.location
file_name = loc.file.name if loc.file else "<unknown file>"
msg = yellow(f"\nWarning: skipping node with unknown CursorKind id {node._kind_id} at {file_name}:{loc.line}:{loc.column}")
print(msg)
return
'''
if node.kind == cindex.CursorKind.CLASS_DECL:
if node.displayname == "Detector":
for child in node.get_children():
@@ -133,6 +188,10 @@ def visit(node):
m.append(child)
args = get_arguments_with_default(child)
fs = get_fdec(child)
qualified_class = qualified_name(child.semantic_parent) # "ns1::ns2::Detector"
# lines.append(
# f'CppDetectorApi.def("{child.spelling}", {fs} &{qualified_class}::{child.spelling}{args});'
# )
lines.append(
f'CppDetectorApi.def("{child.spelling}",{fs} &Detector::{child.spelling}{args});'
)
@@ -161,7 +220,11 @@ if __name__ == "__main__":
)
cargs = parser.parse_args()
check_clang_format_version(12)
# check_libclang_version("12")
# check_clang_format_version(12)
cargs.build_path = cargs.build_path.resolve()
print(f'Using build path: {cargs.build_path}')
check_for_compile_commands_json(cargs.build_path)
print("Parsing functions in Detector.h - ", end="", flush=True)
@@ -170,11 +233,17 @@ if __name__ == "__main__":
db = cindex.CompilationDatabase.fromDirectory(cargs.build_path)
index = cindex.Index.create()
args = db.getCompileCommands(fpath)
args = list(iter(args).__next__().arguments)[0:-1]
args = args + "-x c++ --std=c++11".split()
# print('\n\nUsing compile commands:', args)
# args = args + "-x c++ --std=c++17".split()
syspath = system_include_paths("clang++")
incargs = ["-I" + inc for inc in syspath]
args = args + incargs
args = [arg for arg in args if arg.startswith("-I") or arg.startswith("-D")]
# args = incargs
# print(f"\n\nUsing compile args: {' '.join(args)}")
tu = index.parse(fpath, args=args)
visit(tu.cursor)
print(green("OK"))
@@ -199,5 +268,5 @@ if __name__ == "__main__":
subprocess.run(["clang-format", "../src/detector.cpp", "-i"])
print(green(" OK"))
print("Changes since last commit:")
subprocess.run(["git", "diff", "../src/detector.cpp"])
# print("Changes since last commit:")
# subprocess.run(["git", "diff", "../src/detector.cpp"])

View File

@@ -79,4 +79,10 @@ def system_include_paths(compiler, cpp=True):
line = line.strip()
paths.append(line)
paths = [p.decode('utf-8') for p in paths]
# Only keep include paths from the conda prefix
# remove anything pointing to gcc
prefix = os.environ['CONDA_PREFIX']
paths = [p for p in paths if prefix in p]
paths = [p for p in paths if 'gcc' not in p]
return paths

View File

@@ -15,6 +15,8 @@ from .gaincaps import Mythen3GainCapsWrapper
from .PatternGenerator import PatternGenerator
from . import _slsdet
from ._slsdet import freeSharedMemory, getUserDetails
xy = _slsdet.xy
defs = _slsdet.slsDetectorDefs

View File

@@ -15,7 +15,7 @@ defs = slsDetectorDefs
from .utils import element_if_equal, all_equal, get_set_bits, list_to_bitmask
from .utils import Geometry, to_geo, element, reduce_time, is_iterable, hostname_list
from ._slsdet import xy
from ._slsdet import xy, freeSharedMemory, getUserDetails
from .gaincaps import Mythen3GainCapsWrapper
from . import utils as ut
from .proxy import JsonProxy, SlowAdcProxy, ClkDivProxy, MaxPhaseProxy, ClkFreqProxy, PatLoopProxy, PatNLoopProxy, PatWaitProxy, PatWaitTimeProxy
@@ -90,7 +90,7 @@ class Detector(CppDetectorApi):
def free(self):
"""Free detector shared memory"""
self.freeSharedMemory()
freeSharedMemory(self.getShmId())
@property
def config(self):
@@ -1537,7 +1537,7 @@ class Detector(CppDetectorApi):
"""
Retrieve user details from shared memory (hostname, type, PID, User, Date)
"""
return self.getUserDetails()
return getUserDetails(self.getShmId())
@property
@element
@@ -2184,6 +2184,7 @@ class Detector(CppDetectorApi):
:setter: It loads trim files from settingspath.\n [Mythen3] An energy of -1 will pick up values from detector.
"""
if self.type == detectorType.MYTHEN3:
return self.getAllThresholdEnergy()
return self.getThresholdEnergy()
@@ -3304,7 +3305,11 @@ class Detector(CppDetectorApi):
@property
@element
def runclk(self):
"""[Ctb] Run clock in MHz."""
"""
[Ctb] Sets Run clock frequency in MHz. \n
[Xilinx Ctb] Sets Run clock frequency in kHz.
"""
return self.getRUNClock()
@runclk.setter
@@ -3385,7 +3390,11 @@ class Detector(CppDetectorApi):
@property
@element
def dbitclk(self):
"""[Ctb] Clock for latching the digital bits in MHz."""
"""
[Ctb] Sets clock for latching the digital bits in MHz. \n
[Xilinx Ctb] clock for latching the digital bits in kHz.
"""
return self.getDBITClock()
@dbitclk.setter
@@ -3512,7 +3521,11 @@ class Detector(CppDetectorApi):
@property
@element
def adcclk(self):
"""[Ctb] Sets ADC clock frequency in MHz. """
"""
[Ctb] Sets ADC clock frequency in MHz. \n
[Xilinx Ctb] Sets ADC clock frequency in kHz.
"""
return self.getADCClock()
@adcclk.setter

View File

@@ -281,6 +281,6 @@ def hostname_list(args):
def validate_port(value):
if value <= 0 or value > 65535:
raise ValueError("port must be in range 1 - 65535")
if value < 1024 or value > 65535:
raise ValueError("port must be in range 1024 - 65535")

File diff suppressed because it is too large Load Diff

View File

@@ -12,13 +12,11 @@
#include <chrono>
namespace py = pybind11;
void init_det(py::module &m) {
using sls::defs;
using sls::Detector;
using sls::ns;
using sls::Positions;
using sls::Result;
using namespace sls; //TODO! qualify arguments and return types to avoid this
m.def("freeSharedMemory", (void (*)(const int, const int)) &sls::freeSharedMemory, py::arg() = 0, py::arg() = -1);
m.def("getUserDetails", (std::string (*)(const int)) &sls::getUserDetails, py::arg() = 0);
py::class_<Detector> CppDetectorApi(m, "CppDetectorApi");
CppDetectorApi.def(py::init<int>());

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@@ -3,8 +3,6 @@
add_executable(using_logger using_logger.cpp)
target_link_libraries(using_logger
slsSupportShared
pthread
rt
)
set_target_properties(using_logger PROPERTIES

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@@ -1 +0,0 @@
../slsDetectorServers/ctbDetectorServer/bin/ctbDetectorServer_developer

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@@ -1 +0,0 @@
../slsDetectorServers/eigerDetectorServer/bin/eigerDetectorServer_developer

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@@ -1 +0,0 @@
../slsDetectorServers/gotthard2DetectorServer/bin/gotthard2DetectorServer_developer

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@@ -1 +0,0 @@
../slsDetectorServers/gotthardDetectorServer/bin/gotthardDetectorServer_developer

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@@ -1 +0,0 @@
../slsDetectorServers/jungfrauDetectorServer/bin/jungfrauDetectorServer_developer

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@@ -1 +0,0 @@
../slsDetectorServers/moenchDetectorServer/bin/moenchDetectorServer_developer

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@@ -1 +0,0 @@
../slsDetectorServers/mythen3DetectorServer/bin/mythen3DetectorServer_developer

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@@ -1 +0,0 @@
../slsDetectorServers/xilinx_ctbDetectorServer/bin/xilinx_ctbDetectorServer_developer

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@@ -76,11 +76,8 @@ foreach(exe ${JUNGFRAU_EXECUTABLES})
target_link_libraries(${exe}
PUBLIC
slsSupportStatic
pthread
tiffio
fmt::fmt
#-L/usr/lib64/
#-lm -lstdc++ -lrt
PRIVATE
slsProjectWarnings

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@@ -48,8 +48,9 @@ add_executable(moench03Interpolation moench03Interpolation.cpp)
#no compile defs
list(APPEND MOENCH_EXECUTABLES moench03Interpolation)
add_executable(moench03NoInterpolation moench03NoInterpolation.cpp)
add_executable(moench03NoInterpolation moench03Interpolation.cpp)
#no compile defs
target_compile_definitions(moench03NoInterpolation PRIVATE NOINTERPOLATION)
list(APPEND MOENCH_EXECUTABLES moench03NoInterpolation)
@@ -68,7 +69,6 @@ foreach(exe ${MOENCH_EXECUTABLES})
PUBLIC
slsSupportStatic
${ZeroMQ_LIBRARIES}
pthread
tiffio
PRIVATE
@@ -87,4 +87,4 @@ foreach(exe ${MOENCH_EXECUTABLES})
endforeach(exe ${MOENCH_EXECUTABLES})
install(TARGETS ${MOENCH_EXECUTABLES} DESTINATION bin)
install(TARGETS ${MOENCH_EXECUTABLES} DESTINATION bin)

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@@ -126,11 +126,11 @@ int main(int argc, char *argv[]) {
int quad;
#ifndef FF
double int_x, int_y;
int *img;
#ifndef NOINTERPOLATION
char fname[10000];
int ok;
double int_x, int_y;
int *img;
cout << "read ff " << argv[2] << endl;
sprintf(fname, "%s", argv[2]);
interp->readFlatField(fname);

View File

@@ -40,6 +40,7 @@ class qDrawPlot : public QWidget, private Ui::PlotObject {
void SetDataCallBack(bool enable);
void SetBinary(bool enable, int from = 0, int to = 0);
void StartAcquisition();
void UpdateROI();
public slots:
void SetPersistency(int val);
@@ -166,8 +167,8 @@ class qDrawPlot : public QWidget, private Ui::PlotObject {
int64_t currentFrame{0};
mutable std::mutex mPlots;
int64_t currentAcqIndex{0};
slsDetectorDefs::ROI rxRoi{};
bool isRxRoiDisplayed{false};
bool hasRoi{false};
bool roiDisplayInitialized{false};
bool isGapPixels{false};
unsigned int nPixelsX{0};
@@ -176,6 +177,7 @@ class qDrawPlot : public QWidget, private Ui::PlotObject {
uint32_t gainMask{0};
int gainOffset{0};
bool gotthard25;
std::vector<slsDetectorDefs::ROI> roi{1};
};
} // namespace sls

View File

@@ -5,6 +5,8 @@
#include "SlsQt1DZoomer.h"
#include "sls/ansi.h"
#include "sls/sls_detector_defs.h"
#include <array>
#include <qwt_plot.h>
#include <qwt_plot_curve.h>
@@ -141,8 +143,9 @@ class SlsQt1DPlot : public QwtPlot {
void SetLogX(bool yes = 1);
void SetLogY(bool yes = 1);
void EnableRoiBox(std::array<int, 4> roi);
void DisableRoiBox();
void EnableRoiBoxes(std::vector<slsDetectorDefs::ROI> roi, int ymin,
int ymax);
void DisableRoiBoxes();
private:
bool gainPlot{false};
@@ -169,6 +172,7 @@ class SlsQt1DPlot : public QwtPlot {
friend void SlsQtH1D::Attach(SlsQt1DPlot *p);
friend void SlsQtH1D::Detach(SlsQt1DPlot *p);
std::vector<std::unique_ptr<QwtPlotShapeItem>> roiBoxes{};
QwtPlotShapeItem *roiBox{nullptr};
signals:

View File

@@ -3,6 +3,8 @@
#pragma once
#include "SlsQt2DHist.h"
#include "SlsQt2DZoomer.h"
#include "sls/sls_detector_defs.h"
#include <array>
#include <qlist.h>
#include <qwt_plot.h>
@@ -71,8 +73,8 @@ class SlsQt2DPlot : public QwtPlot {
void SetLogz(bool enable, bool isMin, bool isMax, double min, double max);
void SetZRange(bool isMin, bool isMax, double min, double max);
void LogZ(bool on = 1);
void EnableRoiBox(std::array<int, 4> roi);
void DisableRoiBox();
void EnableRoiBoxes(std::vector<slsDetectorDefs::ROI> roi);
void DisableRoiBoxes();
public slots:
void showSpectrogram(bool on);
@@ -101,7 +103,7 @@ class SlsQt2DPlot : public QwtPlot {
QList<double> contourLevelsLog;
bool disableZoom{false};
int isLog;
QwtPlotShapeItem *roiBox{nullptr};
std::vector<std::unique_ptr<QwtPlotShapeItem>> roiBoxes{};
};
} // namespace sls

View File

@@ -462,24 +462,26 @@ void SlsQt1DPlot::SetLog(int axisId, bool yes) {
Update();
}
void SlsQt1DPlot::EnableRoiBox(std::array<int, 4> roi) {
if (roiBox == nullptr) {
roiBox = new QwtPlotShapeItem();
roiBox->attach(this);
roiBox->setPen(QColor(Qt::yellow), 2.0, Qt::SolidLine);
void SlsQt1DPlot::EnableRoiBoxes(std::vector<slsDetectorDefs::ROI> roi,
int ymin, int ymax) {
roiBoxes.clear();
for (auto &r : roi) {
auto box = std::make_unique<QwtPlotShapeItem>();
box->setPen(QColor(Qt::yellow), 2.0, Qt::SolidLine);
// TopLeft - BottomRight (max points are +1 on graph)
QRectF myRect(QPointF(r.xmin, ymin), QPointF(r.xmax - 1, ymax - 1));
box->setRect(myRect);
box->attach(this);
roiBoxes.push_back(std::move(box));
}
// TopLeft - BottomRight (max points are +1 on graph)
QRect myRect(QPoint(roi[0], roi[2]), QPoint(roi[1] - 1, roi[3] - 1));
roiBox->setRect(QRectF(myRect));
replot();
}
void SlsQt1DPlot::DisableRoiBox() {
if (roiBox != nullptr) {
roiBox->detach();
replot();
void SlsQt1DPlot::DisableRoiBoxes() {
for (auto &r : roiBoxes) {
r->detach();
}
replot();
}
void SlsQt1DPlot::SetZoomX(const QRectF &rect) {

View File

@@ -350,25 +350,25 @@ void SlsQt2DPlot::showSpectrogram(bool on) {
Update();
}
void SlsQt2DPlot::EnableRoiBox(std::array<int, 4> roi) {
if (roiBox == nullptr) {
roiBox = new QwtPlotShapeItem();
void SlsQt2DPlot::EnableRoiBoxes(std::vector<slsDetectorDefs::ROI> roi) {
roiBoxes.clear();
for (auto &r : roi) {
auto box = std::make_unique<QwtPlotShapeItem>();
box->setPen(QColor(Qt::yellow), 2.0, Qt::SolidLine);
// TopLeft - BottomRight (max points are +1 on graph)
QRectF myRect(QPointF(r.xmin, r.ymin), QPointF(r.xmax - 1, r.ymax - 1));
box->setRect(myRect);
box->attach(this);
roiBoxes.push_back(std::move(box));
}
roiBox->setPen(QColor(Qt::yellow), 2.0, Qt::SolidLine);
// TopLeft - BottomRight (max points are +1 on graph)
QRect myRect(QPoint(roi[0], roi[2]), QPoint(roi[1] - 1, roi[3] - 1));
roiBox->setRect(QRectF(myRect));
roiBox->attach(this);
replot();
}
void SlsQt2DPlot::DisableRoiBox() {
if (roiBox != nullptr) {
roiBox->detach();
replot();
void SlsQt2DPlot::DisableRoiBoxes() {
for (auto &r : roiBoxes) {
r->detach();
}
replot();
}
} // namespace sls

View File

@@ -539,6 +539,7 @@ void qDetectorMain::EnableTabs(bool enable) {
tabDeveloper->Refresh();
tabPlot->Refresh();
plot->UpdateROI();
plot->StartAcquisition();
} else { // to enable scan box
tabPlot->Refresh();

View File

@@ -608,7 +608,6 @@ void qDrawPlot::StartAcquisition() {
currentFrame = 0;
boxPlot->setTitle("Old Plot");
det->clearAcquiringFlag(); // (from previous exit) or if running
isRxRoiDisplayed = false;
// ensure data streaming in receiver (if plot enabled)
if (isPlot) {
@@ -632,6 +631,34 @@ void qDrawPlot::StartAcquisition() {
LOG(logDEBUG) << "End of Starting Acquisition in qDrawPlot";
}
void qDrawPlot::UpdateROI() {
try {
std::lock_guard<std::mutex> lock(mPlots);
roi = det->getRxROI();
roiDisplayInitialized = false;
// roi enabled
if (roi.size() > 1 || !roi[0].completeRoi()) {
hasRoi = true;
// update gap pixels
// hardcoded gap pixels because only for eiger and jungfrau
if (isGapPixels) {
for (auto &r : roi) {
r.xmin += ((r.xmin / 1024) * 6 + (r.xmin / 256) * 2);
r.xmax += ((r.xmax / 1024) * 6 + (r.xmax / 256) * 2);
r.ymin += ((r.ymin / 512) * 34 + (r.ymin / 256) * 2);
r.ymax += ((r.ymax / 512) * 34 + (r.ymax / 256) * 2);
}
LOG(logINFO)
<< "Roi recalculated with gap pixels: " << ToString(roi);
}
} else {
hasRoi = false;
}
LOG(logDEBUG) << "Roi: " << ToString(roi);
}
CATCH_DISPLAY("Could not get reciver ROI.", "qDrawPlot::UpdateRoi")
}
void qDrawPlot::AcquireThread() {
LOG(logDEBUG) << "Acquire Thread";
std::string mess;
@@ -709,7 +736,6 @@ void qDrawPlot::GetData(detectorData *data, uint64_t frameIndex,
<< " \t dynamic range: " << data->dynamicRange << std::endl
<< " \t file index: " << data->fileIndex << std::endl
<< " \t complete image: " << data->completeImage << std::endl
<< " \t rx Roi: " << ToString(data->rxRoi) << std::endl
<< " ]";
progress = data->progressIndex;
@@ -717,22 +743,6 @@ void qDrawPlot::GetData(detectorData *data, uint64_t frameIndex,
currentFrame = frameIndex;
LOG(logDEBUG) << "[ Progress:" << progress << "%, Frame:" << currentFrame
<< " ]";
if (!isRxRoiDisplayed) {
rxRoi.xmin = data->rxRoi[0];
rxRoi.xmax = data->rxRoi[1];
rxRoi.ymin = data->rxRoi[2];
rxRoi.ymax = data->rxRoi[3];
// only for 2d anyway
if (isGapPixels) {
rxRoi.xmin += ((rxRoi.xmin / 1024) * 6 + (rxRoi.xmin / 256) * 2);
rxRoi.xmax += ((rxRoi.xmax / 1024) * 6 + (rxRoi.xmax / 256) * 2);
rxRoi.ymin += ((rxRoi.ymin / 512) * 34 + (rxRoi.ymin / 256) * 2);
rxRoi.ymax += ((rxRoi.ymax / 512) * 34 + (rxRoi.ymax / 256) * 2);
LOG(logINFO) << "Rx_roi recalculated with gap pixels: "
<< ToString(rxRoi);
}
LOG(logDEBUG) << "Rx_roi: " << ToString(rxRoi);
}
// 1d check if npixelX has changed (m3 for different counters enabled)
if (is1d && static_cast<int>(nPixelsX) != data->nx) {
@@ -971,30 +981,27 @@ void qDrawPlot::Update1dPlot() {
xyRangeChanged = false;
}
plot1d->DisableZoom(disableZoom);
if (!isRxRoiDisplayed) {
isRxRoiDisplayed = true;
if (rxRoi.completeRoi()) {
plot1d->DisableRoiBox();
if (!roiDisplayInitialized) {
roiDisplayInitialized = true;
if (!hasRoi) {
plot1d->DisableRoiBoxes();
if (isGainDataExtracted) {
gainplot1d->DisableRoiBox();
gainplot1d->DisableRoiBoxes();
}
lblRxRoiEnabled->hide();
} else {
plot1d->EnableRoiBox(std::array<int, 4>{
rxRoi.xmin, rxRoi.xmax, (int)plot1d->GetYMinimum(),
(int)plot1d->GetYMaximum()});
plot1d->EnableRoiBoxes(roi, (int)plot1d->GetYMinimum(),
(int)plot1d->GetYMaximum());
if (isGainDataExtracted) {
gainplot1d->EnableRoiBox(
std::array<int, 4>{rxRoi.xmin, rxRoi.xmax, 0, 3});
gainplot1d->EnableRoiBoxes(roi, 0, 3);
}
lblRxRoiEnabled->show();
}
}
// ymin and ymax could change (so replot roi every time)
if (!rxRoi.completeRoi()) {
plot1d->EnableRoiBox(std::array<int, 4>{rxRoi.xmin, rxRoi.xmax,
(int)plot1d->GetYMinimum(),
(int)plot1d->GetYMaximum()});
if (hasRoi) {
plot1d->EnableRoiBoxes(roi, (int)plot1d->GetYMinimum(),
(int)plot1d->GetYMaximum());
}
}
@@ -1025,18 +1032,18 @@ void qDrawPlot::Update2dPlot() {
}
plot2d->DisableZoom(disableZoom);
plot2d->SetZRange(isZRange[0], isZRange[1], zRange[0], zRange[1]);
if (!isRxRoiDisplayed) {
isRxRoiDisplayed = true;
if (rxRoi.completeRoi()) {
plot2d->DisableRoiBox();
if (!roiDisplayInitialized) {
roiDisplayInitialized = true;
if (!hasRoi) {
plot2d->DisableRoiBoxes();
if (isGainDataExtracted) {
gainplot2d->DisableRoiBox();
gainplot2d->DisableRoiBoxes();
}
lblRxRoiEnabled->hide();
} else {
plot2d->EnableRoiBox(rxRoi.getIntArray());
plot2d->EnableRoiBoxes(roi);
if (isGainDataExtracted) {
gainplot2d->EnableRoiBox(rxRoi.getIntArray());
gainplot2d->EnableRoiBoxes(roi);
}
lblRxRoiEnabled->show();
}

View File

@@ -37,7 +37,9 @@ target_compile_definitions(ctbDetectorServer_virtual
)
target_link_libraries(ctbDetectorServer_virtual
PUBLIC pthread rt m slsProjectCSettings
PUBLIC
m
slsProjectCSettings
)
set_target_properties(ctbDetectorServer_virtual PROPERTIES

View File

@@ -5,6 +5,7 @@
/* Definitions for FPGA */
#define MEM_MAP_SHIFT 1
#define REG_OFFSET (2)
/* FPGA Version RO register */
#define FPGA_VERSION_REG (0x00 << MEM_MAP_SHIFT)
@@ -65,8 +66,8 @@
(0x000000FF << STATUS_PT_CNTRL_STTS_OFF_OFST)
#define STATUS_IDLE_MSK (0x677FF)
/* Look at me RO register TODO */
#define LOOK_AT_ME_REG (0x03 << MEM_MAP_SHIFT)
/* Register containing the git hash of the FPGA firmware */
#define FIRMWARE_GIT_HASH_REG (0x03 << MEM_MAP_SHIFT)
/* System Status RO register */
#define SYSTEM_STATUS_REG (0x04 << MEM_MAP_SHIFT)
@@ -119,7 +120,7 @@
#define MOD_SERIAL_NUMBER_VRSN_MSK (0x0000003F << MOD_SERIAL_NUMBER_VRSN_OFST)
/* API Version RO register */
#define API_VERSION_REG (0x0F << MEM_MAP_SHIFT)
#define API_VERSION_REG (0x0B << MEM_MAP_SHIFT)
#define API_VERSION_OFST (0)
#define API_VERSION_MSK (0x00FFFFFF << API_VERSION_OFST)
@@ -128,24 +129,24 @@
/* Time from Start 64 bit RO register. t = GCLK x 50 ns. Reset using
* CONTROL_CRST. TODO */
#define TIME_FROM_START_LSB_REG (0x10 << MEM_MAP_SHIFT)
#define TIME_FROM_START_MSB_REG (0x11 << MEM_MAP_SHIFT)
#define TIME_FROM_START_LSB_REG (0x97 << MEM_MAP_SHIFT)
#define TIME_FROM_START_MSB_REG (0x98 << MEM_MAP_SHIFT)
/* Delay Left 64 bit RO register. t = DLY x 50 ns. TODO */
#define DELAY_LEFT_LSB_REG (0x12 << MEM_MAP_SHIFT)
#define DELAY_LEFT_MSB_REG (0x13 << MEM_MAP_SHIFT)
#define DELAY_LEFT_LSB_REG (0x8D << MEM_MAP_SHIFT)
#define DELAY_LEFT_MSB_REG (0x8E << MEM_MAP_SHIFT)
/* Triggers Left 64 bit RO register TODO */
#define CYCLES_LEFT_LSB_REG (0x14 << MEM_MAP_SHIFT)
#define CYCLES_LEFT_MSB_REG (0x15 << MEM_MAP_SHIFT)
#define CYCLES_LEFT_LSB_REG (0x8F << MEM_MAP_SHIFT)
#define CYCLES_LEFT_MSB_REG (0x90 << MEM_MAP_SHIFT)
/* Frames Left 64 bit RO register TODO */
#define FRAMES_LEFT_LSB_REG (0x16 << MEM_MAP_SHIFT)
#define FRAMES_LEFT_MSB_REG (0x17 << MEM_MAP_SHIFT)
#define FRAMES_LEFT_LSB_REG (0x91 << MEM_MAP_SHIFT)
#define FRAMES_LEFT_MSB_REG (0x92 << MEM_MAP_SHIFT)
/* Period Left 64 bit RO register. t = T x 50 ns. TODO */
#define PERIOD_LEFT_LSB_REG (0x18 << MEM_MAP_SHIFT)
#define PERIOD_LEFT_MSB_REG (0x19 << MEM_MAP_SHIFT)
#define PERIOD_LEFT_LSB_REG (0x93 << MEM_MAP_SHIFT)
#define PERIOD_LEFT_MSB_REG (0x94 << MEM_MAP_SHIFT)
/* Exposure Time Left 64 bit RO register */
// #define EXPTIME_LEFT_LSB_REG (0x1A << MEM_MAP_SHIFT) // Not
@@ -160,34 +161,34 @@
//// Not used in FW
/* Data In 64 bit RO register TODO */
#define DATA_IN_LSB_REG (0x1E << MEM_MAP_SHIFT)
#define DATA_IN_MSB_REG (0x1F << MEM_MAP_SHIFT)
#define DATA_IN_LSB_REG (0x10 << MEM_MAP_SHIFT)
#define DATA_IN_MSB_REG (0x11 << MEM_MAP_SHIFT)
/* Pattern Out 64 bit RO register */
#define PATTERN_OUT_LSB_REG (0x20 << MEM_MAP_SHIFT)
#define PATTERN_OUT_MSB_REG (0x21 << MEM_MAP_SHIFT)
#define PATTERN_OUT_LSB_REG (0x80 << MEM_MAP_SHIFT)
#define PATTERN_OUT_MSB_REG (0x81 << MEM_MAP_SHIFT)
/* Frame number of next acquisition register (64 bit register) */
#define NEXT_FRAME_NUMB_LOCAL_LSB_REG (0x22 << MEM_MAP_SHIFT)
#define NEXT_FRAME_NUMB_LOCAL_MSB_REG (0x23 << MEM_MAP_SHIFT)
#define NEXT_FRAME_NUMB_LOCAL_LSB_REG (0x12 << MEM_MAP_SHIFT)
#define NEXT_FRAME_NUMB_LOCAL_MSB_REG (0x13 << MEM_MAP_SHIFT)
/* Frames From Start PG 64 bit RO register. Reset using CONTROL_CRST. TODO */
#define FRAMES_FROM_START_PG_LSB_REG (0x24 << MEM_MAP_SHIFT)
#define FRAMES_FROM_START_PG_MSB_REG (0x25 << MEM_MAP_SHIFT)
#define FRAMES_FROM_START_PG_LSB_REG (0x99 << MEM_MAP_SHIFT)
#define FRAMES_FROM_START_PG_MSB_REG (0x9A << MEM_MAP_SHIFT)
/* Start Frame Time (Measurement Time) 64 bit register (timestamp at a frame
* start until reset) TODO */
#define START_FRAME_TIME_LSB_REG (0x26 << MEM_MAP_SHIFT)
#define START_FRAME_TIME_MSB_REG (0x27 << MEM_MAP_SHIFT)
#define START_FRAME_TIME_LSB_REG (0x9B << MEM_MAP_SHIFT)
#define START_FRAME_TIME_MSB_REG (0x9C << MEM_MAP_SHIFT)
/* Power Status RO register */
#define POWER_STATUS_REG (0x29 << MEM_MAP_SHIFT)
#define POWER_STATUS_REG (0x18 << MEM_MAP_SHIFT)
#define POWER_STATUS_ALRT_OFST (27)
#define POWER_STATUS_ALRT_MSK (0x0000001F << POWER_STATUS_ALRT_OFST)
/* FIFO Transceiver In Status RO register */
#define FIFO_TIN_STATUS_REG (0x30 << MEM_MAP_SHIFT)
#define FIFO_TIN_STATUS_REG (0x1A << MEM_MAP_SHIFT)
#define FIFO_TIN_STATUS_FIFO_EMPTY_1_OFST (4)
#define FIFO_TIN_STATUS_FIFO_EMPTY_1_MSK (0x00000001 << FIFO_TIN_STATUS_FIFO_EMPTY_1_OFST)
#define FIFO_TIN_STATUS_FIFO_EMPTY_2_OFST (5)
@@ -198,23 +199,54 @@
#define FIFO_TIN_STATUS_FIFO_EMPTY_4_MSK (0x00000001 << FIFO_TIN_STATUS_FIFO_EMPTY_4_OFST)
#define FIFO_TIN_STATUS_FIFO_EMPTY_ALL_MSK (0x0000000F << FIFO_TIN_STATUS_FIFO_EMPTY_1_OFST)
/* FIFO Transceiver Fill level RO register */
#define FIFO_TIN_FILL_REG (0x25 << MEM_MAP_SHIFT)
#define FIFO_TIN_FILL_FIFO_1_OFST (0)
#define FIFO_TIN_FILL_FIFO_1_MSK (0x00003FFF << FIFO_TIN_FILL_FIFO__1_OFST)
#define FIFO_TIN_FILL_FIFO_2_OFST (16)
#define FIFO_TIN_FILL_FIFO_2_MSK (0x00003FFF << FIFO_TIN_FILL_FIFO__2_OFST)
/* FIFO ADC Fill level RO register */
#define FIFO_ADC_FILL_REG (0x26 << MEM_MAP_SHIFT)
#define FIFO_ADC_FILL_FIFO_OFST (0)
#define FIFO_ADC_FILL_FIFO_MSK (0x00003FFF << FIFO_ADC_FILL_FIFO_OFST)
/* Enable continuos readout register */
#define CONTINUOUS_RO_ENABLE_REG (0x27 << MEM_MAP_SHIFT)
#define CONTINUOUS_RO_ADC_ENABLE_OFST (0)
#define CONTINUOUS_RO_TIN_ENABLE_OFST (1)
#define CONTINUOUS_RO_DBIT_ENABLE_OFST (2)
#define CONTINUOUS_RO_ADC_ENABLE_MSK (0x00000001 << CONTINUOUS_RO_ADC_ENABLE_OFST)
#define CONTINUOUS_RO_TIN_ENABLE_MSK (0x00000001 << CONTINUOUS_RO_TIN_ENABLE_OFST)
#define CONTINUOUS_RO_DBIT_ENABLE_MSK (0x00000001 << CONTINUOUS_RO_DBIT_ENABLE_OFST)
#define DBIT_INJECT_COUNTER_ENA_OFST (3) // continuously injects fake-data into the dbit fifo when enabled.
#define DBIT_INJECT_COUNTER_ENA_MSK (0x00000001 << DBIT_INJECT_COUNTER_ENA_OFST)
#define DBIT_INJECT_COUNTER_CLKDIV_OFST (8) // Additional clock divider for fake-data injection
#define DBIT_INJECT_COUNTER_CLKDIV_MSK (0x000000FF << DBIT_INJECT_COUNTER_CLKDIV_OFST)
/* 64-bit FPGA chip ID. Unique for every device. read-only */
#define FPGA_chipID_0_REG (0x28 << MEM_MAP_SHIFT)
#define FPGA_chipID_1_REG (0x29 << MEM_MAP_SHIFT)
/* FIFO Transceiver In 64 bit RO register */
#define FIFO_TIN_LSB_REG (0x31 << MEM_MAP_SHIFT)
#define FIFO_TIN_MSB_REG (0x32 << MEM_MAP_SHIFT)
#define FIFO_TIN_LSB_REG (0x1B << MEM_MAP_SHIFT)
#define FIFO_TIN_MSB_REG (0x1C << MEM_MAP_SHIFT)
/* FIFO Digital In Status RO register */
#define FIFO_DIN_STATUS_REG (0x3B << MEM_MAP_SHIFT)
#define FIFO_DIN_STATUS_REG (0x1D << MEM_MAP_SHIFT)
#define FIFO_DIN_STATUS_FIFO_FILL_OFST (0)
#define FIFO_DIN_STATUS_FIFO_FILL_MSK (0x00003FFF)
#define FIFO_DIN_STATUS_FIFO_FULL_OFST (30)
#define FIFO_DIN_STATUS_FIFO_FULL_MSK (0x00000001 << FIFO_DIN_STATUS_FIFO_FULL_OFST)
#define FIFO_DIN_STATUS_FIFO_EMPTY_OFST (31)
#define FIFO_DIN_STATUS_FIFO_EMPTY_MSK (0x00000001 << FIFO_DIN_STATUS_FIFO_EMPTY_OFST)
/* FIFO Digital In 64 bit RO register */
#define FIFO_DIN_LSB_REG (0x3C << MEM_MAP_SHIFT)
#define FIFO_DIN_MSB_REG (0x3D << MEM_MAP_SHIFT)
#define FIFO_DIN_LSB_REG (0x1E << MEM_MAP_SHIFT)
#define FIFO_DIN_MSB_REG (0x1F << MEM_MAP_SHIFT)
/* SPI (Serial Peripheral Interface) DAC, HV RW register */
#define SPI_REG (0x40 << MEM_MAP_SHIFT)
#define SPI_REG (0x20 << MEM_MAP_SHIFT)
#define SPI_DAC_SRL_DGTL_OTPT_OFST (0)
#define SPI_DAC_SRL_DGTL_OTPT_MSK (0x00000001 << SPI_DAC_SRL_DGTL_OTPT_OFST)
@@ -230,7 +262,7 @@
#define SPI_HV_SRL_CS_OTPT_MSK (0x00000001 << SPI_HV_SRL_CS_OTPT_OFST)
/* ADC SPI (Serial Peripheral Interface) RW register */
#define ADC_SPI_REG (0x41 << MEM_MAP_SHIFT)
#define ADC_SPI_REG (0x21 << MEM_MAP_SHIFT)
#define ADC_SPI_SRL_CLK_OTPT_OFST (0)
#define ADC_SPI_SRL_CLK_OTPT_MSK (0x00000001 << ADC_SPI_SRL_CLK_OTPT_OFST)
@@ -240,7 +272,7 @@
#define ADC_SPI_SRL_CS_OTPT_MSK (0x0000000F << ADC_SPI_SRL_CS_OTPT_OFST)
/* ADC Offset RW register */
#define ADC_OFFSET_REG (0x42 << MEM_MAP_SHIFT)
#define ADC_OFFSET_REG (0x22 << MEM_MAP_SHIFT)
#define ADC_OFFSET_ADC_PPLN_OFST (0)
#define ADC_OFFSET_ADC_PPLN_MSK (0x000000FF << ADC_OFFSET_ADC_PPLN_OFST)
@@ -248,7 +280,7 @@
#define ADC_OFFSET_DBT_PPLN_MSK (0x000000FF << ADC_OFFSET_DBT_PPLN_OFST)
/* ADC Port Invert RW register */
#define ADC_PORT_INVERT_REG (0x43 << MEM_MAP_SHIFT)
#define ADC_PORT_INVERT_REG (0x23 << MEM_MAP_SHIFT)
#define ADC_PORT_INVERT_0_INPT_OFST (0)
#define ADC_PORT_INVERT_0_INPT_MSK (0x000000FF << ADC_PORT_INVERT_0_INPT_OFST)
@@ -260,7 +292,7 @@
#define ADC_PORT_INVERT_3_INPT_MSK (0x000000FF << ADC_PORT_INVERT_3_INPT_OFST)
/* Dummy RW register */
#define DUMMY_REG (0x44 << MEM_MAP_SHIFT)
#define DUMMY_REG (0x24 << MEM_MAP_SHIFT)
#define DUMMY_FIFO_CHNNL_SLCT_OFST (0)
#define DUMMY_FIFO_CHNNL_SLCT_MSK (0x0000003F << DUMMY_FIFO_CHNNL_SLCT_OFST)
@@ -273,46 +305,8 @@
#define DUMMY_TRNSCVR_FIFO_RD_STRBE_OFST (14)
#define DUMMY_TRNSCVR_FIFO_RD_STRBE_MSK (0x00000001 << DUMMY_TRNSCVR_FIFO_RD_STRBE_OFST)
/* Receiver IP Address RW register */
#define RX_IP_REG (0x45 << MEM_MAP_SHIFT)
/* UDP Port RW register */
#define UDP_PORT_REG (0x46 << MEM_MAP_SHIFT)
#define UDP_PORT_RX_OFST (0)
#define UDP_PORT_RX_MSK (0x0000FFFF << UDP_PORT_RX_OFST)
#define UDP_PORT_TX_OFST (16)
#define UDP_PORT_TX_MSK (0x0000FFFF << UDP_PORT_TX_OFST)
/* Receiver Mac Address 64 bit RW register */
#define RX_MAC_LSB_REG (0x47 << MEM_MAP_SHIFT)
#define RX_MAC_MSB_REG (0x48 << MEM_MAP_SHIFT)
#define RX_MAC_LSB_OFST (0)
#define RX_MAC_LSB_MSK (0xFFFFFFFF << RX_MAC_LSB_OFST)
#define RX_MAC_MSB_OFST (0)
#define RX_MAC_MSB_MSK (0x0000FFFF << RX_MAC_MSB_OFST)
/* Detector/ Transmitter Mac Address 64 bit RW register */
#define TX_MAC_LSB_REG (0x49 << MEM_MAP_SHIFT)
#define TX_MAC_MSB_REG (0x4A << MEM_MAP_SHIFT)
#define TX_MAC_LSB_OFST (0)
#define TX_MAC_LSB_MSK (0xFFFFFFFF << TX_MAC_LSB_OFST)
#define TX_MAC_MSB_OFST (0)
#define TX_MAC_MSB_MSK (0x0000FFFF << TX_MAC_MSB_OFST)
/* Detector/ Transmitter IP Address RW register */
#define TX_IP_REG (0x4B << MEM_MAP_SHIFT)
/* Detector/ Transmitter IP Checksum RW register */
#define TX_IP_CHECKSUM_REG (0x4C << MEM_MAP_SHIFT)
#define TX_IP_CHECKSUM_OFST (0)
#define TX_IP_CHECKSUM_MSK (0x0000FFFF << TX_IP_CHECKSUM_OFST)
/* Configuration RW register */
#define CONFIG_REG (0x4D << MEM_MAP_SHIFT)
#define CONFIG_REG (0x2D << MEM_MAP_SHIFT)
#define CONFIG_LED_DSBL_OFST (0)
#define CONFIG_LED_DSBL_MSK (0x00000001 << CONFIG_LED_DSBL_OFST)
@@ -327,7 +321,7 @@
#define CONFIG_GB10_SND_UDP_MSK (0x00000001 << CONFIG_GB10_SND_UDP_OFST)
/* External Signal RW register */
#define EXT_SIGNAL_REG (0x4E << MEM_MAP_SHIFT)
#define EXT_SIGNAL_REG (0x2E << MEM_MAP_SHIFT)
#define EXT_SIGNAL_OFST (0)
#define EXT_SIGNAL_MSK (0x00000001 << EXT_SIGNAL_OFST)
@@ -335,7 +329,7 @@
#define EXT_SIGNAL_TRGGR_VAL ((0x1 << EXT_SIGNAL_OFST) & EXT_SIGNAL_MSK)
/* Control RW register */
#define CONTROL_REG (0x4F << MEM_MAP_SHIFT)
#define CONTROL_REG (0x2F << MEM_MAP_SHIFT)
#define CONTROL_STRT_ACQSTN_OFST (0)
#define CONTROL_STRT_ACQSTN_MSK (0x00000001 << CONTROL_STRT_ACQSTN_OFST)
@@ -375,10 +369,10 @@
#define CONTROL_CLR_ACQSTN_FIFO_MSK (0x00000001 << CONTROL_CLR_ACQSTN_FIFO_OFST)
/* Reconfiguratble PLL Paramater RW register */
#define PLL_PARAM_REG (0x50 << MEM_MAP_SHIFT)
#define PLL_PARAM_REG (0x30 << MEM_MAP_SHIFT)
/* Reconfiguratble PLL Control RW regiser */
#define PLL_CNTRL_REG (0x51 << MEM_MAP_SHIFT)
#define PLL_CNTRL_REG (0x31 << MEM_MAP_SHIFT)
#define PLL_CNTRL_RCNFG_PRMTR_RST_OFST (0)
#define PLL_CNTRL_RCNFG_PRMTR_RST_MSK \
@@ -390,8 +384,15 @@
#define PLL_CNTRL_ADDR_OFST (16)
#define PLL_CNTRL_ADDR_MSK (0x0000003F << PLL_CNTRL_ADDR_OFST)
/* Streaming Control RW regiser */
#define STREAMING_CTRL_REG (0x3D << MEM_MAP_SHIFT)
#define STREAMING_CTRL_ENA_OFST (15)
#define STREAMING_CTRL_ENA_MSK (0x00000001 << STREAMING_CTRL_ENA_OFST)
#define STREAMING_CTRL_SELECT_OFST (0)
#define STREAMING_CTRL_SELECT_MSK (0x0000003F << STREAMING_CTRL_SELECT_OFST)
/* Pattern Control RW register */
#define PATTERN_CNTRL_REG (0x52 << MEM_MAP_SHIFT)
#define PATTERN_CNTRL_REG (0x88 << MEM_MAP_SHIFT)
#define PATTERN_CNTRL_WR_OFST (0)
#define PATTERN_CNTRL_WR_MSK (0x00000001 << PATTERN_CNTRL_WR_OFST)
@@ -401,70 +402,31 @@
#define PATTERN_CNTRL_ADDR_MSK (0x00001FFF << PATTERN_CNTRL_ADDR_OFST)
/* Pattern Limit RW regiser */
#define PATTERN_LIMIT_REG (0x53 << MEM_MAP_SHIFT)
#define PATTERN_LIMIT_REG (0x89 << MEM_MAP_SHIFT)
#define PATTERN_LIMIT_STRT_OFST (0)
#define PATTERN_LIMIT_STRT_MSK (0x00001FFF << PATTERN_LIMIT_STRT_OFST)
#define PATTERN_LIMIT_STP_OFST (16)
#define PATTERN_LIMIT_STP_MSK (0x00001FFF << PATTERN_LIMIT_STP_OFST)
/* Pattern Loop 0 Address RW regiser */
#define PATTERN_LOOP_0_ADDR_REG (0x54 << MEM_MAP_SHIFT)
/** Pattern Loop and Wait Definitions, 5 regs each */
#define PATTERN_LOOPDEF_BASE (0xA0 << MEM_MAP_SHIFT)
#define PATTERN_LOOP_ADDR_WORD_OFST (0)
#define PATTERN_LOOP_ITERATION_WORD_OFST (1)
#define PATTERN_WAIT_ADDR_WORD_OFST (2)
#define PATTERN_WAIT_TIMER_LSB_WORD_OFST (3)
#define PATTERN_WAIT_TIMER_MSB_WORD_OFST (4)
#define PATTERN_LOOPDEF_NWORDS_OFST (5)
#define PATTERN_LOOP_0_ADDR_STRT_OFST (0)
#define PATTERN_LOOP_0_ADDR_STRT_MSK \
(0x00001FFF << PATTERN_LOOP_0_ADDR_STRT_OFST)
#define PATTERN_LOOP_0_ADDR_STP_OFST (16)
#define PATTERN_LOOP_0_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_0_ADDR_STP_OFST)
/* Pattern Loop 0 Iteration RW regiser */
#define PATTERN_LOOP_0_ITERATION_REG (0x55 << MEM_MAP_SHIFT)
/* Pattern Loop 1 Address RW regiser */
#define PATTERN_LOOP_1_ADDR_REG (0x56 << MEM_MAP_SHIFT)
#define PATTERN_LOOP_1_ADDR_STRT_OFST (0)
#define PATTERN_LOOP_1_ADDR_STRT_MSK \
(0x00001FFF << PATTERN_LOOP_1_ADDR_STRT_OFST)
#define PATTERN_LOOP_1_ADDR_STP_OFST (16)
#define PATTERN_LOOP_1_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_1_ADDR_STP_OFST)
/* Pattern Loop 1 Iteration RW regiser */
#define PATTERN_LOOP_1_ITERATION_REG (0x57 << MEM_MAP_SHIFT)
/* Pattern Loop 2 Address RW regiser */
#define PATTERN_LOOP_2_ADDR_REG (0x58 << MEM_MAP_SHIFT)
#define PATTERN_LOOP_2_ADDR_STRT_OFST (0)
#define PATTERN_LOOP_2_ADDR_STRT_MSK \
(0x00001FFF << PATTERN_LOOP_2_ADDR_STRT_OFST)
#define PATTERN_LOOP_2_ADDR_STP_OFST (16)
#define PATTERN_LOOP_2_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_2_ADDR_STP_OFST)
/* Pattern Loop 2 Iteration RW regiser */
#define PATTERN_LOOP_2_ITERATION_REG (0x59 << MEM_MAP_SHIFT)
/* Pattern Wait 0 RW regiser */
#define PATTERN_WAIT_0_ADDR_REG (0x5A << MEM_MAP_SHIFT)
#define PATTERN_WAIT_0_ADDR_OFST (0)
#define PATTERN_WAIT_0_ADDR_MSK (0x00001FFF << PATTERN_WAIT_0_ADDR_OFST)
// FIXME: is mask 3FF
/* Pattern Wait 1 RW regiser */
#define PATTERN_WAIT_1_ADDR_REG (0x5B << MEM_MAP_SHIFT)
#define PATTERN_WAIT_1_ADDR_OFST (0)
#define PATTERN_WAIT_1_ADDR_MSK (0x00001FFF << PATTERN_WAIT_1_ADDR_OFST)
/* Pattern Wait 2 RW regiser */
#define PATTERN_WAIT_2_ADDR_REG (0x5C << MEM_MAP_SHIFT)
#define PATTERN_WAIT_2_ADDR_OFST (0)
#define PATTERN_WAIT_2_ADDR_MSK (0x00001FFF << PATTERN_WAIT_2_ADDR_OFST)
#define PATTERN_WAIT_ADDR_OFST (0)
#define PATTERN_WAIT_ADDR_MSK (0x00001FFF << PATTERN_WAIT_ADDR_OFST)
#define PATTERN_LOOP_ADDR_STRT_OFST (0)
#define PATTERN_LOOP_ADDR_STRT_MSK (0x00001FFF << PATTERN_LOOP_ADDR_STRT_OFST)
#define PATTERN_LOOP_ADDR_STP_OFST (16)
#define PATTERN_LOOP_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_ADDR_STP_OFST)
/* Samples RW register */
#define SAMPLES_REG (0x5D << MEM_MAP_SHIFT)
#define SAMPLES_REG (0x32 << MEM_MAP_SHIFT)
#define SAMPLES_DIGITAL_OFST (0)
#define SAMPLES_DIGITAL_MSK (0x0000FFFF << SAMPLES_DIGITAL_OFST)
@@ -472,7 +434,7 @@
#define SAMPLES_ANALOG_MSK (0x0000FFFF << SAMPLES_ANALOG_OFST)
/** Power RW register */
#define POWER_REG (0x5E << MEM_MAP_SHIFT)
#define POWER_REG (0x33 << MEM_MAP_SHIFT)
#define POWER_ENBL_VLTG_RGLTR_OFST (16)
#define POWER_ENBL_VLTG_RGLTR_MSK (0x0000001F << POWER_ENBL_VLTG_RGLTR_OFST)
@@ -480,25 +442,25 @@
#define POWER_HV_INTERNAL_SLCT_MSK (0x00000001 << POWER_HV_INTERNAL_SLCT_OFST)
/* Number of samples from transceiver RW register */
#define SAMPLES_TRANSCEIVER_REG (0x5F << MEM_MAP_SHIFT)
#define SAMPLES_TRANSCEIVER_REG (0x34 << MEM_MAP_SHIFT)
#define SAMPLES_TRANSCEIVER_OFST (0)
#define SAMPLES_TRANSCEIVER_MSK (0x0000FFFF << SAMPLES_TRANSCEIVER_OFST)
/* Delay 64 bit RW register. t = DLY x 50 ns. */
#define DELAY_LSB_REG (0x60 << MEM_MAP_SHIFT)
#define DELAY_MSB_REG (0x61 << MEM_MAP_SHIFT)
#define DELAY_LSB_REG (0x8D << MEM_MAP_SHIFT)
#define DELAY_MSB_REG (0x8E << MEM_MAP_SHIFT)
/* Triggers 64 bit RW register */
#define CYCLES_LSB_REG (0x62 << MEM_MAP_SHIFT)
#define CYCLES_MSB_REG (0x63 << MEM_MAP_SHIFT)
#define CYCLES_LSB_REG (0x8F << MEM_MAP_SHIFT)
#define CYCLES_MSB_REG (0x90 << MEM_MAP_SHIFT)
/* Frames 64 bit RW register */
#define FRAMES_LSB_REG (0x64 << MEM_MAP_SHIFT)
#define FRAMES_MSB_REG (0x65 << MEM_MAP_SHIFT)
#define FRAMES_LSB_REG (0x91 << MEM_MAP_SHIFT)
#define FRAMES_MSB_REG (0x92 << MEM_MAP_SHIFT)
/* Period 64 bit RW register */
#define PERIOD_LSB_REG (0x66 << MEM_MAP_SHIFT)
#define PERIOD_MSB_REG (0x67 << MEM_MAP_SHIFT)
#define PERIOD_LSB_REG (0x93 << MEM_MAP_SHIFT)
#define PERIOD_MSB_REG (0x94 << MEM_MAP_SHIFT)
/* Period 64 bit RW register */
// #define EXPTIME_LSB_REG (0x68 << MEM_MAP_SHIFT) //
@@ -513,33 +475,15 @@
/* Pattern IO Control 64 bit RW regiser
* Each bit configured as output(1)/ input(0) */
#define PATTERN_IO_CNTRL_LSB_REG (0x6C << MEM_MAP_SHIFT)
#define PATTERN_IO_CNTRL_MSB_REG (0x6D << MEM_MAP_SHIFT)
/* Pattern IO Clock Control 64 bit RW regiser
* When bit n enabled (1), clocked output for DIO[n] (T run clock)
* When bit n disabled (0), Dio[n] driven by its pattern output */
#define PATTERN_IO_CLK_CNTRL_LSB_REG (0x6E << MEM_MAP_SHIFT)
#define PATTERN_IO_CLK_CNTRL_MSB_REG (0x6F << MEM_MAP_SHIFT)
#define PATTERN_IO_CNTRL_LSB_REG (0x8A << MEM_MAP_SHIFT)
#define PATTERN_IO_CNTRL_MSB_REG (0x8B << MEM_MAP_SHIFT)
/* Pattern In 64 bit RW register */
#define PATTERN_IN_LSB_REG (0x70 << MEM_MAP_SHIFT)
#define PATTERN_IN_MSB_REG (0x71 << MEM_MAP_SHIFT)
/* Pattern Wait Timer 0 64 bit RW register. t = PWT1 x T run clock */
#define PATTERN_WAIT_TIMER_0_LSB_REG (0x72 << MEM_MAP_SHIFT)
#define PATTERN_WAIT_TIMER_0_MSB_REG (0x73 << MEM_MAP_SHIFT)
/* Pattern Wait Timer 1 64 bit RW register. t = PWT2 x T run clock */
#define PATTERN_WAIT_TIMER_1_LSB_REG (0x74 << MEM_MAP_SHIFT)
#define PATTERN_WAIT_TIMER_1_MSB_REG (0x75 << MEM_MAP_SHIFT)
/* Pattern Wait Timer 2 64 bit RW register. t = PWT3 x T run clock */
#define PATTERN_WAIT_TIMER_2_LSB_REG (0x76 << MEM_MAP_SHIFT)
#define PATTERN_WAIT_TIMER_2_MSB_REG (0x77 << MEM_MAP_SHIFT)
#define PATTERN_IN_LSB_REG (0x82 << MEM_MAP_SHIFT)
#define PATTERN_IN_MSB_REG (0x83 << MEM_MAP_SHIFT)
/* Readout enable RW register */
#define READOUT_10G_ENABLE_REG (0x79 << MEM_MAP_SHIFT)
#define READOUT_10G_ENABLE_REG (0x3C << MEM_MAP_SHIFT)
#define READOUT_10G_ENABLE_ANLG_OFST (0)
#define READOUT_10G_ENABLE_ANLG_MSK (0x000000FF << READOUT_10G_ENABLE_ANLG_OFST)
@@ -550,7 +494,7 @@
(0x0000000F << READOUT_10G_ENABLE_TRNSCVR_OFST)
/* Digital Bit External Trigger RW register */
#define DBIT_EXT_TRG_REG (0x7B << MEM_MAP_SHIFT)
#define DBIT_EXT_TRG_REG (0x3E << MEM_MAP_SHIFT)
#define DBIT_EXT_TRG_SRC_OFST (0)
#define DBIT_EXT_TRG_SRC_MSK (0x0000003F << DBIT_EXT_TRG_SRC_OFST)
@@ -558,7 +502,7 @@
#define DBIT_EXT_TRG_OPRTN_MD_MSK (0x00000001 << DBIT_EXT_TRG_OPRTN_MD_OFST)
/* Pin Delay 0 RW register */
#define OUTPUT_DELAY_0_REG (0x7C << MEM_MAP_SHIFT)
#define OUTPUT_DELAY_0_REG (0x3F << MEM_MAP_SHIFT)
#define OUTPUT_DELAY_0_OTPT_STTNG_STEPS (25)
#define OUTPUT_DELAY_0_OTPT_STTNG_OFST \
(0) // t = OTPT_STTNG * 25 ps, max for Cyclone V = 775 ps
@@ -574,87 +518,21 @@
/* Pin Delay 1 RW register
* Each bit configured as enable for dynamic output delay configuration */
#define PIN_DELAY_1_REG (0x7D << MEM_MAP_SHIFT)
#define PIN_DELAY_1_REG (0x40 << MEM_MAP_SHIFT)
/** Pattern Mask 64 bit RW regiser */
#define PATTERN_MASK_LSB_REG (0x80 << MEM_MAP_SHIFT)
#define PATTERN_MASK_MSB_REG (0x81 << MEM_MAP_SHIFT)
#define PATTERN_MASK_LSB_REG (0x84 << MEM_MAP_SHIFT)
#define PATTERN_MASK_MSB_REG (0x85 << MEM_MAP_SHIFT)
/** Pattern Set 64 bit RW regiser */
#define PATTERN_SET_LSB_REG (0x82 << MEM_MAP_SHIFT)
#define PATTERN_SET_MSB_REG (0x83 << MEM_MAP_SHIFT)
/* Pattern Loop 3 Address RW regiser */
#define PATTERN_LOOP_3_ADDR_REG (0x84 << MEM_MAP_SHIFT)
#define PATTERN_LOOP_3_ADDR_STRT_OFST (0)
#define PATTERN_LOOP_3_ADDR_STRT_MSK \
(0x00001FFF << PATTERN_LOOP_3_ADDR_STRT_OFST)
#define PATTERN_LOOP_3_ADDR_STP_OFST (16)
#define PATTERN_LOOP_3_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_3_ADDR_STP_OFST)
/* Pattern Loop 3 Iteration RW regiser */
#define PATTERN_LOOP_3_ITERATION_REG (0x85 << MEM_MAP_SHIFT)
/* Pattern Loop 4 Address RW regiser */
#define PATTERN_LOOP_4_ADDR_REG (0x86 << MEM_MAP_SHIFT)
#define PATTERN_LOOP_4_ADDR_STRT_OFST (0)
#define PATTERN_LOOP_4_ADDR_STRT_MSK \
(0x00001FFF << PATTERN_LOOP_4_ADDR_STRT_OFST)
#define PATTERN_LOOP_4_ADDR_STP_OFST (16)
#define PATTERN_LOOP_4_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_4_ADDR_STP_OFST)
/* Pattern Loop 4 Iteration RW regiser */
#define PATTERN_LOOP_4_ITERATION_REG (0x87 << MEM_MAP_SHIFT)
/* Pattern Loop 5 Address RW regiser */
#define PATTERN_LOOP_5_ADDR_REG (0x88 << MEM_MAP_SHIFT)
#define PATTERN_LOOP_5_ADDR_STRT_OFST (0)
#define PATTERN_LOOP_5_ADDR_STRT_MSK \
(0x00001FFF << PATTERN_LOOP_5_ADDR_STRT_OFST)
#define PATTERN_LOOP_5_ADDR_STP_OFST (16)
#define PATTERN_LOOP_5_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_5_ADDR_STP_OFST)
/* Pattern Loop 5 Iteration RW regiser */
#define PATTERN_LOOP_5_ITERATION_REG (0x89 << MEM_MAP_SHIFT)
/* Pattern Wait 3 RW regiser */
#define PATTERN_WAIT_3_ADDR_REG (0x8A << MEM_MAP_SHIFT)
#define PATTERN_WAIT_3_ADDR_OFST (0)
#define PATTERN_WAIT_3_ADDR_MSK (0x00001FFF << PATTERN_WAIT_3_ADDR_OFST)
/* Pattern Wait 4 RW regiser */
#define PATTERN_WAIT_4_ADDR_REG (0x8B << MEM_MAP_SHIFT)
#define PATTERN_WAIT_4_ADDR_OFST (0)
#define PATTERN_WAIT_4_ADDR_MSK (0x00001FFF << PATTERN_WAIT_4_ADDR_OFST)
/* Pattern Wait 5 RW regiser */
#define PATTERN_WAIT_5_ADDR_REG (0x8C << MEM_MAP_SHIFT)
#define PATTERN_WAIT_5_ADDR_OFST (0)
#define PATTERN_WAIT_5_ADDR_MSK (0x00001FFF << PATTERN_WAIT_5_ADDR_OFST)
/* Pattern Wait Timer 3 64 bit RW register. t = PWT1 x T run clock */
#define PATTERN_WAIT_TIMER_3_LSB_REG (0x8D << MEM_MAP_SHIFT)
#define PATTERN_WAIT_TIMER_3_MSB_REG (0x8E << MEM_MAP_SHIFT)
/* Pattern Wait Timer 4 64 bit RW register. t = PWT1 x T run clock */
#define PATTERN_WAIT_TIMER_4_LSB_REG (0x8F << MEM_MAP_SHIFT)
#define PATTERN_WAIT_TIMER_4_MSB_REG (0x90 << MEM_MAP_SHIFT)
/* Pattern Wait Timer 5 64 bit RW register. t = PWT1 x T run clock */
#define PATTERN_WAIT_TIMER_5_LSB_REG (0x91 << MEM_MAP_SHIFT)
#define PATTERN_WAIT_TIMER_5_MSB_REG (0x92 << MEM_MAP_SHIFT)
#define PATTERN_SET_LSB_REG (0x86 << MEM_MAP_SHIFT)
#define PATTERN_SET_MSB_REG (0x87 << MEM_MAP_SHIFT)
/* Slow ADC SPI Value RO register */
#define ADC_SLOW_DATA_REG (0x93 << MEM_MAP_SHIFT)
#define ADC_SLOW_DATA_REG (0x41 << MEM_MAP_SHIFT)
/* Slow ADC SPI Value Config register */
#define ADC_SLOW_CFG_REG (0x94 << MEM_MAP_SHIFT)
#define ADC_SLOW_CFG_REG (0x42 << MEM_MAP_SHIFT)
/** Read back CFG Register */
#define ADC_SLOW_CFG_RB_OFST (2)
#define ADC_SLOW_CFG_RB_MSK (0x00000001 << ADC_SLOW_CFG_RB_OFST)
@@ -733,7 +611,7 @@
((0x1 << ADC_SLOW_CFG_CFG_OFST) & ADC_SLOW_CFG_CFG_MSK)
/* Slow ADC SPI Value Control register */
#define ADC_SLOW_CTRL_REG (0x95 << MEM_MAP_SHIFT)
#define ADC_SLOW_CTRL_REG (0x43 << MEM_MAP_SHIFT)
#define ADC_SLOW_CTRL_STRT_OFST (0)
#define ADC_SLOW_CTRL_STRT_MSK (0x00000001 << ADC_SLOW_CTRL_STRT_OFST)

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@@ -54,6 +54,7 @@
#define DEFAULT_ADC_CLK (40) // 20
#define DEFAULT_SYNC_CLK (40) // 20
#define DEFAULT_DBIT_CLK (200)
#define NS_TO_CLK_CYCLE (1E-3) // ns to MHz
#define DEFAULT_TRANSCEIVER_MASK (0x3)
#define MAX_TRANSCEIVER_MASK (0xF)

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@@ -30,7 +30,8 @@ target_compile_definitions(eigerDetectorServer_virtual
)
target_link_libraries(eigerDetectorServer_virtual
PUBLIC pthread rt slsProjectCSettings
PUBLIC
slsProjectCSettings
)
set_target_properties(eigerDetectorServer_virtual PROPERTIES

View File

@@ -31,7 +31,8 @@ target_compile_definitions(gotthard2DetectorServer_virtual
)
target_link_libraries(gotthard2DetectorServer_virtual
PUBLIC pthread rt slsProjectCSettings
PUBLIC
slsProjectCSettings
)
set_target_properties(gotthard2DetectorServer_virtual PROPERTIES

View File

@@ -29,13 +29,18 @@ target_compile_definitions(jungfrauDetectorServer_virtual
)
target_link_libraries(jungfrauDetectorServer_virtual
PUBLIC pthread rt slsProjectCSettings
PUBLIC
slsProjectCSettings
)
set_target_properties(jungfrauDetectorServer_virtual PROPERTIES
RUNTIME_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}/bin
)
# to compile fore 32 bit on a 64 bit machine
#target_compile_options(jungfrauDetectorServer_virtual PRIVATE -m32)
#target_link_options(jungfrauDetectorServer_virtual PRIVATE -m32)
install(TARGETS jungfrauDetectorServer_virtual
EXPORT "${TARGETS_EXPORT_NAME}"
RUNTIME DESTINATION ${CMAKE_INSTALL_BINDIR}

View File

@@ -29,7 +29,8 @@ target_compile_definitions(moenchDetectorServer_virtual
)
target_link_libraries(moenchDetectorServer_virtual
PUBLIC pthread rt slsProjectCSettings
PUBLIC
slsProjectCSettings
)
set_target_properties(moenchDetectorServer_virtual PROPERTIES

View File

@@ -33,7 +33,8 @@ target_compile_definitions(mythen3DetectorServer_virtual
)
target_link_libraries(mythen3DetectorServer_virtual
PUBLIC pthread rt slsProjectCSettings
PUBLIC
slsProjectCSettings
)
set_target_properties(mythen3DetectorServer_virtual PROPERTIES

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