 maliakal_d
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e3f151851c
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bug fix: internal hv used ofst instead of msk, insignificant bug though, would have worked
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2019-07-23 14:13:41 +02:00 |
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maliakal_d
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d3879bb834
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WIP
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2019-07-15 15:47:05 +02:00 |
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maliakal_d
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e16b857ba2
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ctb server: hv select is actually internal hv select
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2019-07-02 10:15:25 +02:00 |
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maliakal_d
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4b69c01357
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ctb server: sync clk get added
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2019-06-19 16:55:24 +02:00 |
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maliakal_d
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6e14a2efe2
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ctb fix: reset pll reset also adc and dbit phase (fixed), also required adcs to be configured again(due to adc clock being stopped temporarily
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2019-06-17 17:24:59 +02:00 |
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maliakal_d
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39be0770e3
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ctb server fixed to have 180 adc output phase
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2019-06-14 16:43:56 +02:00 |
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maliakal_d
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a6144f658e
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ctb client and server bug fix: dac didnt compute indices correctly and set dac was not printing in server
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2019-06-04 18:11:31 +02:00 |
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maliakal_d
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3aea917175
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updated binaries for the extsig api change
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2019-06-04 12:18:06 +02:00 |
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maliakal_d
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17f745b45d
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ctb server: simulator effects, increased fpga reset time from 1 to 2 seconds
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2019-06-03 17:22:59 +02:00 |
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maliakal_d
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938e1e87ff
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bugfix: vref adc voltage
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2019-05-28 12:31:19 +02:00 |
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maliakal_d
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f90d8c6aff
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ctb server: added adcvpp option to get and in mv
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2019-05-14 18:38:30 +02:00 |
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maliakal_d
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741ee3b44c
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ctb server bug fix: udp ip not reset before overwriting (smaller size creates problems)
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2019-05-14 17:08:07 +02:00 |
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maliakal_d
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0904d1db29
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updated ctb binary
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2019-05-03 20:46:08 +02:00 |
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maliakal_d
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e14519c236
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slsReceiver: removed special receiver config, added rx_dbitlist, rx_dbitoffset to put bits together in file, connected adcinvert, extsamplingsrc and extsampling properly to the detector, added tests
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2019-05-03 20:37:40 +02:00 |
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maliakal_d
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2f3b0e0b06
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ctb:separated analog and digital samples in server and send analog and digital data packed separately per frame to reciever
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2019-04-30 18:55:32 +02:00 |
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maliakal_d
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61a939ef53
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ctb: removed setroi, instead using adcenablemask
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2019-04-26 16:53:23 +02:00 |
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maliakal_d
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4e3baf41cb
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ctb server: introducing 1 us delay between rd strobe and fifo read due to different clocks
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2019-04-23 14:35:07 +02:00 |
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maliakal_d
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3d40fb2d2c
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ctb address check, integration test added for ctb pattern
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2019-04-18 17:18:01 +02:00 |
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maliakal_d
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266520741a
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ctb patterns interface rewritten
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2019-04-18 15:29:43 +02:00 |
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maliakal_d
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89a06f099c
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merging refactor (replacing)
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2019-04-12 10:53:09 +02:00 |
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