8948 Commits

Author SHA1 Message Date
d003a6d8e0
2. Dev/add jf pedestal feature (#807) 2023-09-29 11:25:58 +02:00
72bec5d62e
1. Dev/update python bindings for port pr (#813)
* updated python bindings for port update from int to uint16_t

* user friendly error message for exception when python arg does not match uint16_t for ports
2023-09-29 11:12:02 +02:00
88c39ba702
removing the misleading word 'Simulating' when programmig fpga (#815) 2023-09-28 16:21:31 +02:00
9834b07b47
Dev/fix port size (#805)
* port datatype changing from int to uint16_t
* throwing for -1 given for uint16_t ports
2023-09-28 09:36:39 +02:00
77d13f0794 updated all servers as my3 was not updated and had api issues 2023-08-29 11:11:19 +02:00
dd1690d7a1
typo for slow adc list (#794) 2023-08-17 12:28:58 +02:00
1873cc9310
Moench dacs defaults (#788)
* merge fix from 7.0.2: new jungfrau fw versions, incremented binary, hdf5 and json versions

* moench: changed dac names and default values to old moench values

* moench: remove interface clk polarity at start up

* moench: default speed is half speed, default values for adc offset and adc phase for different speeds (only half speed confirmed), adc vref voltage to 2.0 like G1

* moench: connected adc pipeline to client

* moench: receiver- default frames per file is 100k and discard partial frames as default

* moench binary in

* using tostring in gui for dacs

* moved frame discard policy as a parameter to be configured with a default depending on detector

* moench: 300 degrees for adc phase in full speed
2023-07-31 14:02:30 +02:00
Erik Fröjdh
565858b6c6
Explicit constructors for exceptions (#791)
* silence warnings

* making constructors explicit to avoid unintended conversions

* changed struct to class since we already have public:

---------

Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
2023-07-26 16:35:52 +02:00
Erik Fröjdh
7383b13f16
silence warnings (#790) 2023-07-26 15:54:51 +02:00
d5ce03918c
ctb: allowing adc enable for 10g to be 0, romode changing bit from disable analog to enable analog, removing matterhorn specific (#789) 2023-07-25 10:33:18 +02:00
c9dfa408db
Fix strixel mapping and interpolation (#787) 2023-07-20 16:49:31 +02:00
36a9bafbde
merge fix from 7.0.2: new jungfrau fw versions, incremented binary, hdf5 and json versions (#786) 2023-07-20 09:30:42 +02:00
15643c2320
adding 7.0.2 to pmodules (#784) 2023-07-20 09:02:50 +02:00
71489b7106
2. Set row col (#779)
* set row and column
2023-07-18 15:51:22 +02:00
7394833710 fixing python get slow adc names typo 2023-07-18 14:41:22 +02:00
Erik Fröjdh
9c50a3ee1e
Internalpybind (#782)
* using fetchcontent to get zmq

* local copy of libzmq

* added guard for policy setting

* removed the need to export by using build interface

* moved pybind11 to FetchContent

* removed zmq hint from cmk script

* Fixed comments

---------
authored-by: froejdh_e <erik.frojdh@psi.ch>
2023-07-17 14:38:39 +02:00
Erik Fröjdh
fd79d59f4e
Internal zmq using FetchContent (#780)
* using fetchcontent to get zmq
* local copy of libzmq
* added guard for policy setting
* removed the need to export by using build interface
* removed zmq hint from cmk script
---------

Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
Co-authored-by: froejdh_e <erik.frojdh@psi.ch>
2023-07-17 14:20:22 +02:00
c628ae2192
1. Ctb transceiver ro (#773)
*  transceiverenable, tsamples, romode for tranceiver and digital_transceiver

* 202 spec instr only for transceiver mode

* removed check for empty in trans readout and clean memory before reading from fifo

* ctb read fifo strobe for all after reading all channels, adding 1us after selecting channel, changing fw date

* updated 10gb transceiver enable

----
* added transceiver (tsamples, romode(transceiver, digital_transceiver), transceiverenable (mask)

* clean memory before reading from fifo (for analog and digital as well)

* read fifo then read strobe (also corresp fw) fixes number of reads (also for analg and digital)-> increases all pipelines by 1

* fixed bug in rearranging digital data in receiver

* fixed bug in streaming size of data after rearranging

* fixed bug in setbit, clearbit,and getbit

* status checks fifo before returning idle (transmitting if data in fifo if transceiver more enabled)

* soem matterhorn specifics that will need to be put into pattern in a month or two. this is temporary.

* NOTE: breaking api. rxParameters struct has transceiverenabel and tsamples given from det to receiver
2023-07-14 16:29:21 +02:00
a56be25500
Pmodules (#777)
* Add pmodules build files for PSI

* Modified gitignore to accept build-file

* Fix error of not building virtual servers

* make everything stable
2023-07-14 16:11:14 +02:00
d74661a375 updated fw versions for moench 2023-07-10 16:15:28 +02:00
054e733cd5
Voltage and slow adc naming (#772)
* voltages in python 

* added voltage values in cmd line, added voltagelist in detector class

* voltage values in python

* slow adc list
2023-07-10 16:10:23 +02:00
fe4db54eb6
moench settings (#774)
* moench settings

* default value for asic ctrl reg for moench
2023-07-10 15:21:48 +02:00
5be503c1bd
moench speeds (#776)
* added other speeds and updated readoutspeedlist, test, gui
2023-07-10 15:09:51 +02:00
58cdb5bd20
added patfname command to save the file the last pttern was loaded from (#770)
* added patfname command to save the file the last pttern was loaded from
2023-06-22 09:08:48 +02:00
e18c191247
Added pyat files as input, auto legend bug without wait and loop fixed (#769) 2023-06-20 12:28:14 +02:00
1a338346d5
2. Ctb fname voltage (#768)
* power and sense returning dac indices instead of int in Detector class

* power -> voltage, sense -> slowadc
2023-06-19 16:05:30 +02:00
d3d98db7e9
1. Ctb powerindices (#767)
* power and sense returning dac indices instead of int in Detector class
2023-06-19 15:19:50 +02:00
3f9ec695db
2. Patioctrl uint64 t (#766)
* when dbit list is enabled, the size of data in zmq stream is changed to only the digital bits enabled size. now fixed to also include analog size

* allowing to set 0xffffffffffffffff to pat io control. prevously was used to do a get. fixed also for pat bit mask and pat mask
2023-06-15 09:30:52 +02:00
6f50707cfb
when dbit list is enabled, the size of data in zmq stream is changed to only the digital bits enabled size. now fixed to also include analog size (#764)
Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
2023-06-15 09:19:01 +02:00
a5f26252b8
ctb v_limit dac tristate (#761)
* ctb: allowing dac to tristate (-100) even if v_limit is set

* binary in

* formatting
2023-06-15 08:42:42 +02:00
d032f43f11 fixing tests to work and powername change bug fix from before 2023-06-14 17:19:37 +02:00
0d53f83a2f backward compatibility of alias file 2023-06-14 11:40:30 +02:00
a7dcfe4b31
Ctb sense power signal names (#759)
*  adc names

* added python functions in src

*  signal, power, sense names

* fix tests
2023-06-07 17:06:41 +02:00
b9a346a396
ctb adc names (#757)
* first draft of adc names

* fixed tests

* formatting

* added python functions in src

---------

Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
2023-05-31 21:07:07 +02:00
225e5490d2 formatting 2023-05-30 15:46:30 +02:00
95d89522d8 formatting 2023-05-25 12:10:46 +02:00
6fcb880538
Merge fix from 7.0.2 (#756)
- start acq list: mixup with master pos #743 : fix that only master starts second and not all (for start acq), typo with pos and masters list
- synced master status running when setting to slave  #747: synced master status running when setting to slave
2023-05-25 11:20:41 +02:00
65b8c9c5c1
Moench rw3 (#745)
* moench, removed chip version, filter resistor, filter cells, currentsoures, gain mode, setttings(modes), dbitphase, maxdbitphase, autocompdisable, comparatordisabletime, made acq start and stop a pulse, removed unused registers

* added parallel command

* remove gain plot for moench

* moench: updated adc invert val

* moench: update adcoffset to 0xf and adcphase to 140 degrees

* removed sync clock in moench

* updated min fw version

* removing config file in moench server
2023-05-25 11:00:23 +02:00
0a7fd0a51a
set bit and clear bit only verifies that bit (#746) 2023-05-25 10:35:17 +02:00
6834294437
2. Fix ctb ro to receiver (#755)
* fix for incorrect readout mode from detector to updating receiver (rx_hostname command)
2023-05-25 08:55:36 +02:00
afee45790f
1. allow 1gbe non blocking acquire by creating another thread (#753)
* allow 1gbe non blocking acquire by creating another thread

* removed unnnecessary print out in ctb
2023-05-24 13:39:40 +02:00
f0c789dc91
Revert "Ctb: allow adc mask enable to be 0 for 1 and 10GbE", and better error message (#751)
* Revert "Ctb: allow adc mask enable to be 0 for 1 and 10GbE (#750)"

This reverts commit a0f250a4876937ebb2a96c8948fdea380625a86e.

* better error message about setting adc mask to 0. Cannot set it to 0 due to ram allocation
2023-05-22 12:26:07 +02:00
a0f250a487
Ctb: allow adc mask enable to be 0 for 1 and 10GbE (#750)
* ctb: allow adc mask enable to be 0 for 1 and 10GbE
2023-05-22 11:26:57 +02:00
fb25a01db5
Automate virtual test (#714)
* using argparse for parsing command line arguments

* added command line option to specify which servers to run

---------

Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
2023-05-11 12:15:22 +02:00
da4dd0df7e
Formatting (#742) 2023-05-11 10:17:24 +02:00
4c6be26846
Jf rawdataprocess txtfile (#732)
* Fix ROI mapping

* Formatting

* Minor edit

* intial draft of cmake for jungfrau executables Makefile.rawdataprocess

* added the cmake file

* missed Makefile

* added libfmt

* Fix some compiler warnings

* Fix some compiler warnings

* Create filename usining fmt::format

* Rewrite command line parsing with std::string and fmt::format

* Fix file reading

* Fix root string extraction

* Fix ifstream file reading

* Clean up comments

* Add version of rawdataprocess with bash wildcards

* Add version of rawdataprocess that reads inputs from txt-file, still buggy

* intermediate

* fix file loop

* fix const

* Circumevent bug with stuck threads

* Fix mutex bug

* cleanup

---------

Co-authored-by: vhinger182 <hinger_v@hv_home_lt1.localdomain>
Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
2023-05-08 16:30:37 +02:00
74acbb15f5
enable fix g0 when in expert mode (when gain mode enabled and not just visible) (#736) (#741) 2023-05-08 16:13:09 +02:00
d65825e9ef
Rx roi zmq (#726) (#740)
adding rx_roi also in the zmq header for external guis to put the "yellow box".. sending full roi instead of -1, and sending for each zmq port. "(multiple yellow boxes)".
2023-05-08 16:03:48 +02:00
e757e25fa1
merge fix #721 PR (sync 7.0.2.rc) to developer (#739)
* merge fix from #721 PR (sync) 7.0.2.rc -> developer
* row and column for jungfrau mixed up

* multi module jungfrau sync must do slaves first then master for start acquisition and send software trigger, and master first and then slaves for stopacquisition

* non blocking to slaves first and only then blocking/nonblocking to the master for sending software trigger(jungfrau multi mod sync)

* fixed get/set timing jungfrau when sync enabled, getsync during blocking acquire (for trigger or stop) will get stuck as it should ask the stop server

* switching between 1 and 2 interfaces did not set gui/client zmq port properly. Resulted in dummy streaming forever. fixed

* formatting, refactoring: const & for positions, multi mod M3 stop first master first

* adding missing cstdint for gcc 13

* Refactoring handle sync out, handling synchronization also for softwaretrigger for m3, for start/sync/stop for g2/g1

---------

Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>

* fixed row and col for moench 2 interfaces

* fix moench getTiming and also allow moench to handle sync

---------

Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
2023-05-08 15:58:19 +02:00
Erik Fröjdh
14ec4cf1da
added missing initialization of pthread_mutex (#728)
* added missing initialization of pthread_mutex

* fixed cut and past error
2023-05-05 14:45:56 +02:00