Dhanya Thattil
1fb90ab98c
M3threshold ( #475 )
...
* vicin default changed to 800, only setting vthx directly allows to set dac even if counter disabled, else disable counter, setallthresholdenergy if an energy is -1, get module value, fix that reg was repaced by isettings
* vth3 disabled for interpolation enable, interpolation disable sets counter mask to what it was before (updating old mask whn setting counter mask except for setting all counters for interpolation enable) and enabling vth3 if counter was enabled
* refactor and test for previous commit
* pump probe only has vth2 enabled, handles both pump probe mode and interpolation mode as well
* wip
* refactored pump probe and interpolation and added to setmodule
* check dacs and trimbits out of range for setmodule (not just threshold)
* binaries in
* m3: pump probe and interpolation mutually exclusive
* minor
2022-06-07 16:55:33 +02:00
Dhanya Thattil
25b5b02302
m3 and g2: change in system clock (clkdiv2) should also change the time settings(exptime, period, gate delay etc.), g2: sys freq same irrespective of external or internal timing source ( #470 )
2022-06-02 11:02:10 +02:00
Dhanya Thattil
365ac835eb
Get trimbits ( #462 )
...
* added the possibility to save settings file for m3 and eiger
* added save trimbits to gui
* update release notes
* python wip
* moved location of trimbits save option in gui
* python works
* updating getModule with all its parameters in the server side
* updating binaries
2022-05-24 11:08:08 +02:00
Dhanya Thattil
73a45e1b5c
nCe made high before programming blackfin to ensure seamless programming ( #460 )
2022-05-18 12:17:44 +02:00
Dhanya Thattil
52882cba20
M3: polarity, interpolation, pump probe ( #421 )
...
* wip, adding m3 functions: polarity, inerpolation, pumpprobe
* added interpol, polarity, pump probe, analog pulsing, digital pulsing
* tests
* binaries in
* update release
* added python polarity enum
* fixed python and minor readability in mythen3.c
* binarie sin
* added all the m3 funcs also in list.c and enablingall counters for enabling interpolation
* binarie sin
2022-04-08 15:18:01 +02:00
150d27cf95
removed copydetectorserver
2022-04-05 14:11:04 +02:00
9d2d8fe1d7
resolve for doubel slashes, wip
2022-04-04 11:17:41 +02:00
8b1851e652
wip, copy server delete old name
2022-04-01 17:52:27 +02:00
1e564a1b33
binaries in. fixed
2022-03-24 12:33:19 +01:00
0f4bcf3a9d
test if special file when updating kernel(solution: reboot only), --force-delete-normal-file used to force delete bfin fpga drive if normal file and create proper device tree
2022-03-22 16:44:12 +01:00
39d3ee2b15
merge fix
2022-03-17 08:41:49 +01:00
34588356e8
added top
2022-02-28 17:05:24 +01:00
261ac78743
wip
2022-02-28 14:49:02 +01:00
5566cfd24f
configuing master from command lineg
2022-02-25 16:03:11 +01:00
219318a52e
wip, removed extra virutal server binaries for eiger, --ignore-config for command line
2022-02-23 17:31:46 +01:00
2b2533f465
allowing setmaster for eiger
2022-02-22 15:23:04 +01:00
0fb6c8b823
updating dr 12 in server, changing signature to get fail for getdynamicrange
2022-02-18 10:32:07 +01:00
8995d3db8d
setting next frame number also for udp 1g itnerface
2022-01-28 11:44:12 +01:00
5a69c60205
added nextframenumber for moench, ctb (also for virtual servers)
2022-01-28 11:32:27 +01:00
1e309b67ef
server side done
2022-01-06 09:20:29 +01:00
e9caa53af0
minor text fix + macro define in the right place
2021-11-24 11:32:19 +01:00
f39f93b2c8
adding the check for copydetector server and updatemode (also for any kind of updatedetectorserver, programfpga and updatekernel)
2021-11-23 16:25:28 +01:00
ed2e6e4e28
print error
2021-11-23 15:45:01 +01:00
a101e18d60
fix to ensure updatekernel does not work with Amd blackfin flash and a kernel older than the current one
2021-11-23 15:23:16 +01:00
904af4de06
fix to allowing update mode functions in update mode and removing exception about set_position for hostname in update mode
2021-11-16 09:55:29 +01:00
eb69d7cb69
update mode added. need to fix why udpatemode get and set not in allowed functions
2021-11-12 17:18:26 +01:00
0ffd30e147
works virutally for virtual servers
2021-11-12 15:18:42 +01:00
eda66e63a5
allowed functions in update mode
2021-11-11 19:08:05 +01:00
c532ecc2e8
moved movefile and writefile to common and avoiding need to send different named files for nios
2021-11-11 10:43:17 +01:00
85d350b48b
blackfin server is not in memory
2021-11-11 10:06:47 +01:00
169361d459
blackfin requires a few writes
2021-11-10 18:54:02 +01:00
32d664a77d
actually writing the server binary from memory to file before linking, sycing, permissions etc
2021-11-10 17:48:18 +01:00
15aa42d328
wip
2021-11-10 10:58:29 +01:00
64a25a242b
server side fixed
2021-11-08 17:24:51 +01:00
6462a7162e
wip
2021-11-05 17:01:45 +01:00
d438b53c68
wip
2021-11-04 19:18:10 +01:00
6e49b77b08
updating kernel like program fpga, execute command to print which module failed, unlinking temporary file while programming bug fix
2021-11-03 17:17:24 +01:00
eff64f99f2
addd kernel version
2021-11-03 11:46:46 +01:00
340d708b12
updated m3 kernel version
2021-11-02 17:07:55 +01:00
3f517420af
updated kernel date for gotthard2, checking kernel code similar for blackfin and nios, need to add date for m3
2021-11-02 16:59:54 +01:00
45b3514118
moved verifykernelversion to common
2021-10-29 16:43:48 +02:00
2d2287e189
check kernel version before enabling the gipo 3 chipenable pins
2021-10-29 12:25:30 +02:00
76dc6db5c0
jungfrau: api changed from set/getFilterCell to set/getNumberOfFilterCells, storagecells command line changed to extrastoragecells, fixed wrong numberof arguments parsing message
2021-10-21 11:59:10 +02:00
b39c64032d
clang format
2021-10-19 14:49:43 +02:00
4de7bb51ed
updated all .h files with license notice and copyright notice
2021-10-14 18:10:56 +02:00
6b0e6a72df
changed speed to readoutspeed, added g2 speeds (108, 144)
2021-10-07 18:39:18 +02:00
34fb823675
changing ports only in shared memory and not going to detector/receiver server to change current tcp port
2021-10-06 14:24:57 +02:00
7d927a794e
moduleid made into dec not hex
2021-10-05 13:23:09 +02:00
ec2a03132a
g2: asic defaults refactored instead of hard coded
2021-09-27 15:31:24 +02:00
a3f579b4cc
jungfrau: removed chip version variable in server adn instead set it in fpga
2021-09-27 13:55:43 +02:00
