bbf8ab4b88
binary in
2020-08-05 09:49:13 +02:00
321ed13659
merge from developer
2020-08-04 17:43:38 +02:00
bb3951c201
binaries in
2020-08-04 16:57:06 +02:00
d25f9093d5
binary in
2020-08-04 12:02:37 +02:00
6f5635a402
gotthard2: vetoref taken as decimal and not hex in server
2020-07-30 12:03:36 +02:00
f358492e09
all binaries in
2020-07-29 16:53:21 +02:00
54ad92a2bf
binarires in
2020-07-29 13:26:55 +02:00
df3ae7f409
gotthard2: reversing order of adc channels to chip
2020-07-28 15:08:13 +02:00
410f38c804
jungfrau calibrated settings in
2020-07-28 09:26:20 +02:00
3b0f68c3c4
gotthard2: fix of ext burst mode global settings
2020-07-23 17:05:43 +02:00
Erik Frojdh
5faf3c7336
format
2020-07-23 14:01:59 +02:00
Dhanya Thattil
ad297e9c51
Readlink ( #117 )
...
* gotthard config file path using readlink
* gotthard2
* eiger
* eieger, mnythen3, moench
* binaries in
* moved readlink to a common function
* binaries in
2020-07-23 12:17:46 +02:00
023924c4cc
updatd gotthard2 module id for new hdi
2020-07-22 11:22:58 +02:00
b46809e1c0
binaries in
2020-07-20 17:36:55 +02:00
2d68b61f00
binaries recompiled
2020-07-17 12:59:37 +02:00
ae9499047b
powerpc and nios binaries in
2020-07-16 16:36:49 +02:00
8dd9bb6ea3
blackfin binaries
2020-07-16 16:21:00 +02:00
293fda0c7a
mythen3, gotthard2: bug fix- changing wrong pll phases when changing frequency
2020-07-13 15:47:43 +02:00
42b7f6fa7c
binary in
2020-07-08 11:35:46 +02:00
28b3fb4101
binaries
2020-07-03 17:15:24 +02:00
c5a9ff3024
binaries in
2020-07-02 15:53:57 +02:00
3156e6f50e
binaries
2020-07-01 13:13:52 +02:00
ccf54f29b6
binaries
2020-07-01 12:52:31 +02:00
e571f7bb3e
WIP
2020-07-01 09:10:49 +02:00
aacc61b058
WIP
2020-06-30 17:11:51 +02:00
279986d77c
WIP
2020-06-30 12:09:23 +02:00
f1cbf49449
binaries in
2020-06-30 09:06:15 +02:00
ae88af2a72
fix
2020-06-23 12:10:40 +02:00
5c42792580
binaries in
2020-06-23 11:00:51 +02:00
991acc7c07
binaries
2020-06-18 17:54:57 +02:00
f14c2d06a5
binaries in
2020-06-18 17:41:32 +02:00
8adddfb083
binaries in
2020-06-18 12:42:53 +02:00
b5b50a2061
binary in
2020-06-17 09:11:44 +02:00
Dhanya Thattil
f078e6147d
Merge branch 'developer' into eiger
2020-06-16 16:55:49 +02:00
d5ae9a22f4
mythen3: changed system vco from 1.25GHz to 1GHz and hence the sytem clock dividers defaults
2020-06-16 15:00:02 +02:00
ffb1a59df0
binary
2020-06-16 12:53:34 +02:00
e0c056be09
eiger fix
2020-06-15 09:22:26 +02:00
64a94b962a
binaries in
2020-06-10 17:32:43 +02:00
ab72d342c9
formatting
2020-06-10 17:29:28 +02:00
200186ddde
binaries in, std=gnu99, for loop variable declaration inside for loop
2020-06-10 17:27:02 +02:00
Dhanya Thattil
f5160b0978
exposing receiver thread ids to client ( #102 )
...
* exposing receiver thread ids to client
Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
2020-06-09 16:18:37 +02:00
2a2bb5f63a
binary in
2020-06-08 14:12:06 +02:00
fd948f1a00
updated binaries
2020-06-05 09:06:49 +02:00
c6ff50d753
merge vetoheader
2020-05-29 10:50:33 +02:00
f0a318777c
mythen3 bnaries in
2020-05-28 13:11:32 +02:00
e727b97d75
gottahrd2 binary in
2020-05-28 09:46:12 +02:00
46daa7e2de
merge from developer (mythen3 branch)
2020-05-27 14:19:33 +02:00
e229fee6ba
gotthard2: hv soft max uptdated to 500v
2020-05-26 14:59:48 +02:00
44a88893ba
mythen3: hv soft max uptdated to 500v
2020-05-26 14:58:41 +02:00
7ba877446c
gotthard2 binary
2020-05-25 12:21:44 +02:00
