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mythen3, gotthard2: bug fix- changing wrong pll phases when changing frequency
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@ -1710,7 +1710,7 @@ int setClockDivider(enum CLKINDEX ind, int val) {
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}
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// phase is reset by pll (when setting output frequency)
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if (ind >= READOUT_C0) {
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if (ind < SYSTEM_C0) {
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clkPhase[READOUT_C0] = 0;
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clkPhase[READOUT_C1] = 0;
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} else {
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@ -2500,4 +2500,4 @@ int getTotalNumberOfChannels() {
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}
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int getNumberOfChips() { return NCHIP; }
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int getNumberOfDACs() { return NDAC; }
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int getNumberOfChannelsPerChip() { return NCHAN; }
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int getNumberOfChannelsPerChip() { return NCHAN; }
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@ -1929,7 +1929,7 @@ int setClockDivider(enum CLKINDEX ind, int val) {
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clkDivider[ind]));
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// phase is reset by pll (when setting output frequency)
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if (ind >= READOUT_C0) {
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if (ind < SYSTEM_C0) {
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clkPhase[READOUT_C0] = 0;
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clkPhase[READOUT_C1] = 0;
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} else {
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@ -5,8 +5,8 @@
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#define APIGUI 0x200409
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#define APICTB 0x200703
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#define APIGOTTHARD 0x200703
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#define APIGOTTHARD2 0x200703
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#define APIJUNGFRAU 0x200703
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#define APIMOENCH 0x200702
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#define APIEIGER 0x200703
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#define APIMYTHEN3 0x200708
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#define APIGOTTHARD2 0x200713
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#define APIMYTHEN3 0x200713
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